Letter pubs.acs.org/NanoLett
A Nanomechanical Fredkin Gate Josef-Stefan Wenzler,† Tyler Dunn,† Tommaso Toffoli,‡ and Pritiraj Mohanty*,† †
Department of Physics, Boston University, 590 Commonwealth Avenue, Boston, Massachusetts 02215, United States Department of Electrical and Computer Engineering, Boston University, 8 St. Mary’s Street, Boston, Massachusetts 02215, United States
‡
S Supporting Information *
ABSTRACT: Irreversible logic operations inevitably discard information, setting fundamental limitations on the flexibility and the efficiency of modern computation. To circumvent the limit imposed by the von Neumann−Landauer (VNL) principle, an important objective is the development of reversible logic gates, as proposed by Fredkin, Toffoli, Wilczek, Feynman, and others. Here, we present a novel nanomechanical logic architecture for implementing a Fredkin gate, a universal logic gate from which any reversible computation can be built. In addition to verifying the truth table, we demonstrate operation of the device as an AND, OR, NOT, and FANOUT gate. Excluding losses due to resonator dissipation and transduction, which will require significant improvement in order to minimize the overall energy cost, our device requires an energy of order 104 kT per logic operation, similar in magnitude to state-of-the-art transistor-based technologies. Ultimately, reversible nanomechanical logic gates could play a crucial role in developing highly efficient reversible computers, with implications for efficient error correction and quantum computing. KEYWORDS: Nanoelectromechanical systems, reversible computation, logic gate, Fredkin gate, nanomechanical computing
A
on the energy efficiency of irreversible logic, regardless of the technology being employed.1−5 In a logically reversible operation,6−12 by contrast, each possible input state maps to a unique output state. This bijective mapping allows for unambiguous recovery of the input bits. Since it does not discard bits, a logically reversible gate offers the potential for indefinite improvements in computational efficiency,13,14 free of the limit set by the VNL principle.13 In the context of this work, reversibility thus refers specifically to the logic being performed. Full physical reversibility represents a stricter condition: the operation must be logically reversible, and in addition, it must be performed in a way which maintains thermodynamic equilibrium of the system throughout the computation. Such a fully reversible process would be lossless, but the intermediate criterion of logical reversibility removes the cap on efficiency set by the (VNL) principle. Today, energy dissipation per gate operation of even the most advanced transistors is much larger than the VNL limit, Ediss ∼ 104 kT.15 However, if technology continues to improve at the current rate according to Moore’s law, then the VNL limit will become relevant in the next couple of decades, preventing any further performance improvement.9,16−18 For this reason, the implementation of reversible logic is an active front for research in many computational technologies.
n increasingly relevant consideration pursuant to optimizing computational efficiency is the loss of information
Table 1. Fredkin Gate Truth Tablea inputs C 1 1 1 1 0 0 0 0
A 1 1 0 0 1 1 0 0
outputs B 1 0 1 0 1 0 1 0
C′ 1 1 1 1 0 0 0 0
A′ 1 0 1 0 1 1 0 0
B′ 1 1 0 0 1 0 1 0
a
The table demonstrates the bijective mapping of its three inputs (C, A, B) into its three outputs (C′, A′, B′). The gate involves conditional switching of its outputs (A′, B′) when the control channel C is activated (1). If the control channel C is inactivated (0), then the output channels (A′, B′) are the same as the input channels (A, B). The logic is reversible as output channels can equivalently be used as input channels, and vice versa, generating the same truth table.
associated with irreversible logic operations.1 In this context, information refers to knowledge about the state of individual bits (1 or 0) involved in the computation as a whole. Loss of information occurs when an observer discards a previously known bit, and as a consequence, entropy increases by kT ln 2. By the very definition of thermodynamic temperature this increase in entropy results in an energy dissipation of kT ln 2 and sets a firm limit, the von Neumann−Landauer (VNL) limit, © 2013 American Chemical Society
Received: September 1, 2013 Revised: November 30, 2013 Published: December 11, 2013 89
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Figure 1. Schematic and operation of the Fredkin gate. (a) The device, which consists of silicon (thickness 500 nm) with top gold electrodes (thickness 40 nm), features four nanomechanical beams (A1, A2, B1, B2) of dimensions 20 μm × 300 nm. Capacitive actuation and detection are achieved via parallel electrodes situated 450 nm to either side of each resonator.17 With a DC bias placed on each beam, a high-frequency voltage at an input electrode (A or B) drives in-plane motion through electrostatic forcing. A resonating beam in turn induces current at an output electrode (A′ or B′), which is amplified and converted into a voltage signal. (b) The full frequency response for each beam exhibits a Lorentzian line shape, with resonance frequency f 0 ≈ 3 MHz and quality factor Q ≈ 200. As shown here for beam B1, the resonance shifts with bias voltage. Utilizing the beams as mechanical filters, we exploit this tuning by driving and detecting at a single frequency fop, whichdepending on the bias voltagemay be on or off resonance. The corresponding high (1) and low (0) voltage states at channels A′ and B′ define the output bits. The presence (1) or absence (0) of a drive signal at frequency fop defines the input bits at channels A and B, as shown in a. Frequency fop is chosen to coincide with the resonance frequency of any beam when DC-biased with voltage Vo (Vo = 15 V). By intentionally tuning two beams (A1/B1) on resonance and two beams (A2/ B2) off resonance to start, we perform the desired logic through application of an additional control bias (VC = 20 mV) via control channel C. The control voltage state, off (0) or +VC (1), determines which pair of beams resonate at frequency fop, and it can be used to effectively redirect an input signal to the desired output, which is the core function of the Fredkin gate. (c) Wiring schematic of the Fredkin gate with sensing electronics. The middle part shows the top-view of the chip containing nanomechanical elements. Input/output (I/O) ports A, B and A′ and B′ connect to the network analyzer (NWA). (d) Schematic diagram of a single suspended beam. In this electrostatic approach, the beam is driven by applying a voltage to one of the side electrodes. The motion of the beam is detected by sensing the current on the other side electrode. This current needs to be amplified for easy detection usually by an operational amplifier. Further details of the electrostatic mechanism are discussed in the Supporting Information.
However, logically reversible gates with a high speed, small size, and a scalable manufacturing process are yet to be realized. Currently, nanoelectromechanical systems (NEMS) are emerging as a promising platform for next generation mechanical computing. To date, they exhibit GHz resonance frequencies f 0 with attractive quality factors (Q > 104).19 Although mechanical transition times (Δt = Q/f 0) preclude these systems from matching the speed of transistor technologies, resonance frequencies are predicted to reach the THz region at the ultimate limits of scaling.12 In fact, whereas transistors face problems with leakage as scaling continues, NEMS are predicted to be scalable even to the molecular level,
making them well-suited to take advantage of logical reversibility. Moreover, NEMS are CMOS compatible, and have already been demonstrated to operate as switches and conventional irreversible logic gates.20−26 An important and natural future direction for this technology, then, is the evolution toward reversible logic architectures. Ultimately, reversible nanomechanical logic gates could play a crucial role in developing highly efficient computers, with implications for efficient error correction and quantum computing, which by its very nature requires reversibility.27 The universal nature of the Fredkin gate makes its experimental realization tantalizing: any reversible logic can 90
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Figure 2. Experimental realization of the Fredkin gate truth table. (a) When drive signals are applied to both inputs A and B (1), a high voltage state (1) is detected at both A′ and B′, either through beams A2 and B2 when the control voltage is on (1) (TT line 1) or through beams A1 and B1 when it is off (0) (TT line 5). Note, the oscillation of the output at gate B′ derives from a smaller signal size of beam A2 compared to B1. However, both the response of beam A2 and B1 are well above the off level as highlighted by the dashed line. (b) When only input A is excited, a (1) is measured at A′/B′ through beam A2/A1 when C is set to 1/0 (TT lines 2 and 6). (c) Similarly, when only input B is excited, a (1) is measured via beam B2/B1 at A′/B′ when C is 0/1 (TT lines 3 and 7). (d) Finally, when neither A nor B is excited, neither A′ nor B′ exhibits an output signal (TT lines 4 and 8).
be formed from one or multiple Fredkin gates. Furthermore, it can serve as a building block for both practical and conceptual computational architectures for reversible computing, as elucidated by Feynman over three decades ago.6 The bijective truth table (TT) of the Fredkin gate is shown in Table 1. At the heart of the gate is the conditional switch of its outputs A′/B′ when control channel C is activated. To experimentally demonstrate this logic, we have designed and fabricated the core of a nanoelectromechanical Fredkin gate, depicted in Figure 1a. The device consists of four identical doubly clamped silicon beams (A1, A2, B1, B2), with three inputs (C, A, B) and three outputs (C′, A′, B′). The dynamics of the Fredkin gate operation are shown and explained in Figure 1. In essence, we drive and detect the four beams at a single frequency and tune the resonant structures to pass or reject signals with a desired logic. While the resonance frequencies of the four beams are nominally identical, it is possible for the four frequencies to vary slightly in the presence of process variation, as is the case for our device. To remedy this, the primary bias V0 on each beam can be tuned independently to ensure that all four resonances coincide, and only one drive/detection frequency is required (please see Supporting Information for details). Switches are then performed by shifting the mechanical resonances through an additional control voltage VC. Figure 2 displays and explains the experimental reproduction of the Fredkin gate truth table (TT). Here, we monitor the voltage state at frequency fop at output channels A′, B′, and C′ and selectively apply excitation signals at the same frequency to input channels A and B, while periodically switching C on and off. We note that a parasitic background signal has been subtracted from each switching plot. The Fredkin gate truth table is reproduced when the input ports (A, B, and C) and the output ports (A′, B′, and C′) are exchanged, which proves logical reversibility. It is easily confirmed that the Fredkin gate can be operated as a logically reversible AND-, OR-, NOT-, and FANOUT-gate, as shown in Figure 3. All other logic circuits can be built with multiple Fredkin gates as building blocks.7
This universality is an attractive feature realized here for the first time in a scalable mechanical logic gate. It bears mentioning, however, that significant technical challenges remain to operating a gate efficiently enough to capitalize on the advantages of this logic. The primary obstacle in the current device is poor energy transmission efficiency, resulting from impedance mismatch and mechanical dissipation. These losses can be quantified by an effective transmission coefficient γ, determined from transmission measurements to be γ ∼ 10−7. Thus, the vast majority of the incident RF power is lost, making the operational energy cost Eop = (pout/γ)(Q/fop) ≈ 109 kT per logic operation. Although this loss cannot be fully eliminated, it can be significantly reduced from levels in the current experiment via device design and/or choice of transduction technique. Efforts to maximize energy transmission in MEMS and NEMS are ongoing. The flexibility to cascade multiple gates is limited by the fact that the input of channel C is incompatible with the inputs of channels A and B, and additional energy consumption would be associated with the signal conditioning necessary to make the channels compatible.28−30 Other considerations highlight potential advantages of nanomechanical logic. Leakage currents, which are only of concern through the sacrificial layer, can be made arbitrarily small in this device by further decreasing lateral dimensions and increasing the oxide layer thickness. An additional consideration is the energy necessary to fully shift the resonance and make a switch. As one means to optimize this, we drive one of the four beams at frequency fop, modulate the control channel voltage by VC at an arbitrary frequency 0.5 Hz, and measure the response of the beam at its output gate. The corresponding square wave output signal and its fast Fourier transform (FFT) are depicted in Figure 4a(i). Any modulation of the background due to VC provides the potential for an unintended bit in a given logic operation, and to quantify this, we also measure an off-resonance signal modulation depicted with its FFT in Figure 4a(ii). Defining the height of the FFT at 0.5 Hz in panels (i) 91
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Figure 4. Fredkin gate characterization. (a) (i) Output signal measured on resonance in response to the DC bias modulation and its FFT. The signal S is defined as the height of the FFT at 0.5 Hz. (ii) Signal measured off resonance in response to the DC bias modulation and its FFT. The noise signal N is defined as the height of its FFT at 0.5 Hz. (b) S/N, S, and N as a function of the control channel modulation VC. The dashed lines serve as a guide to the eye.
requires 20100 kT.13 Since the minimum control voltage necessary to tune the resonance and perform a switch scales inversely with Q (please see SI for details), an Esig of this order or lower should be readily achievable with increased attention paid to resonator dissipation.31 Moreover, both the switching energy and the operational energy scale with the device dimensions (please see SI for details), making nanomechanical technology well-suited to the pursuit of ultraefficient computing. In comparison, typical switching energy in spintorque based nanomagnetic logic cells32,33 is ∼107 kT. In the current generation 22 nm node CMOS logic cells,15 this energy scale approaches 105 kT. Another advantage of our nanomechanical architecture is that the single Fredkin gate consisting of four beams, shown in Figure 1, can be used to perform standard logic operations AND, NAND, OR, and NOR. This is similar to the magnetic random access memory (MRAM) cell,34 which can generate the four basic logic functions. Furthermore, the essential aspect of our logic implementation is the use of nanomechanical structures for switching. Electrostatic actuation and detection technique used here may not be ideal, as it requires at least one support transistor or an operational amplifier for each output. In future implementations, piezoelectric, piezoresistive, or dielectric detection methods will be explored.
Figure 3. Fredkin gate as an AND-, NOT-, OR-, and FANOUT-gate. (a) With input B fixed as a 0, inputs A and C produce AND logic at output B′. (b) To perform a NOT operation on input C, A and B are set to 0 and 1, and B′ is taken as the output. (c) If input A is fixed as a 1, output B′ produces OR logic from inputs B and C. (d) Finally, with inputs A and C fixed as 0 and 1, the input at C is reproduced at both A′ and C′, providing a FANOUT operation.
and (ii) as S and N, respectively, we plot S, N, and the S/N ratio as a function of VC in Figure 4b. For this device, the voltage necessary to move the entire resonance away from fopand hence maximize the S/N ratiois ∼20 mV. Given this voltage, we can estimate the energy used to perform a switch. Since Vo ≫ VC, this energy is given by Esig ≈ CgbV0VC, where Cgb, the capacitance between the gates and the beams (assumed to be parallel plate), is of the order Cgb ≈ 10−16F. Using VC = 20 mV and V0 = 15 V, then, Esig ≈ CgbV0VC ≈ 104kT
an energy comparable to that currently used by the most efficient of transistors.3 For perspective, DNA polymerization, the cellular version of a reversible FANOUT operation, 92
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In fact, our nanomechanical Fredkin gate represents the first successful demonstration of a universal, logically reversible gate based on a scalable technology. Although resonator dissipation and transduction remain significant challenges to approaching the promise of a fully reversible gate, such intermediate steps are crucial. As conventional irreversible logic gates continue to rapidly approach the VNL limit, logically reversible gates offer the only means to bypass this firm limit on energy efficiency. The ability alone to perform AND, OR, NOT, and FANOUT operations with low power consumption make this novel mechanical logic gate interesting. With improvements in design, this and similar NEMS-based gates could play a vital role in developing highly efficient nanomechanical computers, with implications for quantum computing, which relies on ultraefficient, reversible logic components by its very nature.
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ASSOCIATED CONTENT
S Supporting Information *
Description of the electrostatic method and a derivation of Vc. This material is available free of charge via the Internet at http://pubs.acs.org.
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AUTHOR INFORMATION
Corresponding Author
*E-mail:
[email protected]. Notes
The authors declare no competing financial interest.
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ACKNOWLEDGMENTS This work was supported by the NSF. REFERENCES
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