Article pubs.acs.org/cm
A Rapid and Facile Soft Contact Lamination Method: Evaluation of Polymer Semiconductors for Stretchable Transistors Hung-Chin Wu,†,‡,⊥ Stephanie J. Benight,†,⊥ Alex Chortos,§ Wen-Ya Lee,† Jianguo Mei,† John W. F. To,† Chien Lu,† Mingqian He,∥ Jeffery B.-H. Tok,† Wen-Chang Chen,‡ and Zhenan Bao*,†,§ †
Department of Chemical Engineering, Stanford University, Stanford, California 94305, United States Department of Chemical Engineering, National Taiwan University, Taipei 10617, Taiwan § Materials Science and Engineering, Stanford University, Stanford, California 94305, United States ∥ Corning Incorporated, Corning, New York 14831, United States ‡
S Supporting Information *
ABSTRACT: Organic stretchable electronics have attracted extensive scientific and industrial interest because they can be stretched, twisted, or compressed, enabling the next-generation of organic electronics for human/machine interfaces. These electronic devices have already been described for applications such as fieldeffect transistors, photovoltaics, light-emitting diodes, and sensors. High-performance stretchable electronics, however, currently still involve complicated processing steps to integrate the substrates, semiconductors, and electrodes for effective performance. Herein, we describe a facile method to efficiently identify suitable semiconducting polymers for organic stretchable transistors using soft contact lamination. In our method, the various polymers investigated are first transferred on an elastomeric poly(dimethylsiloxane) (PDMS) slab and subsequently stretched (up to 100%) along with the PDMS. The polymer/PDMS matrix is then laminated on source/drain electrode-deposited Si substrates equipped with a PDMS dielectric layer. Using this device configuration, the polymer semiconductors can be repeatedly interrogated with laminate/delaminate cycles under different amounts of tensile strain. From our obtained electrical characteristics, e.g., mobility, drain current, and on/off ratio, the strain limitation of semiconductors can be derived. With a facile soft contact lamination testing approach, we can thus rapidly identify potential candidates of semiconducting polymers for stretchable electronics.
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INTRODUCTION
Conjugated polymers are especially attractive candidates to act as the active semiconductor material in stretchable transistor devices because of their stretchability and ability to achieve high mobility values.22−25 Even though the strain-dependent properties of each component (especially the active semiconducting polymer layer) are critical parameters, only limited work has been done to date in fabricating fully stretchable organic FETs due to (1) complicated processing steps and (2) challenges to integrate all the layers of the device functioning together.3 O’Connor et al. have evaluated the strain tolerance of poly(3hexylthiophene) (P3HT) and poly(2,5-bis(3-alkylthiophene-2yl)thieno[3,2-b]thiophene) (PBTTT), both widely used conjugated polymers for organic electronics.25−27 Their method involves transferring the conjugated polymer film to poly(dimethylsiloxane) (PDMS), applying a strain to the assembled sample stack, and subsequently transferring the film back to a silicon substrate for measuring the electronic properties of the strained film. For the film under each strain
Organic stretchable electronics have been the focus of attention from the organic materials community in recent years1−5 due to their ability to be stretched,6−10 twisted,11−13 or compressed.12,14 For these reasons, they are highly attractive for commercial applications. In addition, stretchable devices possess mechanical compliance to function with bending strain or tensile strain and operate on complex (e.g., nonflat) surfaces. Stretchable electronic devices have been demonstrated for fieldeffect transistors (FETs), 7 , 1 4 light-emitting diodes (LEDs),12,13,15 and solar cells.6,9,16 Methods to enable stretchability include inducing buckled structures,6,17,18 using elastic interconnect materials19 and wavy structures,1,6,20 and controlling intentional fracturing.21 Furthermore, stretchable electronic devices have the potential to be biocompatible and integrated to function with human movement. These strategies for stretchable designs, however, are typically only applicable to a single layer within the device. Since functioning electronic devices are usually comprised of several different layers, integrating these numerous layers into a single stretchable device is not an easy task. © 2014 American Chemical Society
Received: May 15, 2014 Revised: July 14, 2014 Published: July 15, 2014 4544
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Figure 1. Schematic illustration of our lamination method used to evaluate semiconducting polymers for stretchable electronics. The chemical structures of the polymer evaluated in this work are shown as an inset.
observed FET mobility to be over 2 cm2 V−1 s−1 on SiO2 dielectrics.23 PII2T with long branched alkyl side chains exhibited a lower mobility (0.3 cm2 V−1 s−1) as well as a lower crystallinity (no measurable transition in our obtained DSC trace) when compared to PTDPPTFT4.24 In addition, semicrystalline regioregular P3HT is investigated in this study because its stretchable properties have been previously studied and will thus serve as a reference for this study.6,9,25
level, this method, however, requires deposition of metal source/drain (S/D) contacts after having to transfer the film twice and does not allow the same samples to be repeatedly tested at different strain values. Thus, it is important to have a rapid, reliable, and repeatable method to evaluate semiconductor performance under various strain levels. Here, we report an efficient method to rapidly identify high performing polymer semiconductors by using a soft contact lamination approach. Soft contact lamination has been demonstrated as a noninvasive method used in fabrication and testing of conventional transistors,28−31 pressure dependent FETs,32 printed plastic circuits,33 and single crystal transistors.34−36 With this method, the other essential transistor components (i.e., gate, source, and drain electrodes, and gate dielectric) are fabricated on a soft support (e.g., PDMS) and laminated onto the semiconducting polymer layer to complete the device. An advantage of the soft support is that it allows both robust and conformal contact with the polymer layer. These devices showed comparable and sometimes even superior performances to transistor devices prepared via conventional spin-coating methods,22−24 demonstrating the lamination approach as an attractive alternative for evaluation of transistor devices. As such, we hypothesized that the above-mentioned merits will enable soft contact lamination as an attractive method for rapid evaluation of the strain tolerance of various semiconducting polymers. To accomplish this, we first laminate a conjugated polymer thin film onto a PDMS slab that can be subjected to different levels of strain. When subjected to a strain, PDMS is elastically deformed while the semiconducting polymer is plastically deformed. This film/slab, strained at various levels, is then placed onto a bottom gate transistor device stack consisting of an S/D electrode (Cr/Au)-deposited on a highly doped Si substrate as a gate electrode with a PDMS dielectric layer. This device structure is illustrated in Figure 1. Three previously reported semiconducting polymers, including poly(tetrathienoacene-diketopyrrolopyrrole) (PTDPPTFT4), poly(isoindigo-bithiophene) (PII2T), and regioregular poly(3hexylthiophene) (P3HT), were evaluated using this lamination method. PTDPPTFT4 was previously reported to possess a highly ordered thin film lamellar packing structure and high crystallinity (a distinct side-chain melting signal as measured using differential scanning calorimetry (DSC)) with the
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EXPERIMENTAL SECTION
Materials. All processing solvents, such as toluene, chloroform, and p-xylene, were purchased from Sigma-Aldrich and used as received. Poly(3-hexylthiophene) (P3HT, Sepiolid P200, number-averaged molecular weight, measured at 40 °C by Gel Permeation Chromatography using tetrahydrofuran as the eluent and polystyrene standards, is ∼30 kDa with a polydispersity of 2.0) was purchased from Rieke Metals. Poly(tetrathienoacene-diketopyrrolopyrrole) (PTDPPTFT4) was provided by Corning Incorporated (numberaveraged molecular weight, measured at 200 °C by Gel Permeation Chromatography using 1,2,4-trichlorobenzene as the eluent and polystyrene standards, is ∼23 kDa with a polydispersity of 1.9).23 Poly(isoindigo-bithiophene) (PII2T) was synthesized via a reported method.22,24 Poly(dimethylsiloxane) (PDMS), Sylgard 184, Dow Corning, was prepared at a ratio of 20:1 (base/cross-linker, w/w) and cured for 12 h at 120 °C as used for the laminating substrate to transfer the polymer thin films. The fabrication procedure of the PDMS dielectric layer was based on a previously reported procedure35 and utilized a 10:1 base to cross-linker ratio, spin-casting on the Si wafer at 5000 rpm for 2 min, then annealing at 120 °C for 1 h. Preparation of Semiconducting Layer. Highly n-doped Si wafers were cut into small pieces (2 cm × 2 cm). The wafers were cleaned with compressed air and washed with toluene, acetone, and isopropanol, in that order. The cleaned Si wafers were then modified with an octadecyltrimethoxysilane (OTS) self-assembled monolayer according to our reported method.37 The polymer solutions (5 mg mL−1) were prepared in chloroform (PII2T and P3HT) or p-xylene (PTDPPTFT4). These solutions were dropped onto the OTSmodified Si substrate, spin-coated at 1000 rpm for 1 min, then annealed with suitable temperature (120 °C (P3HT), 170 °C (PII2T), and 190 °C (PTDPPTFT4)) under a nitrogen atmosphere. The thickness of the polymer films, as measured by profilometry, was found to be around 50, 100, and 45 nm for P3HT, PII2T, and PTDPPTFT4, respectively. Lamination Method for Evaluating FET Characteristics. The highly doped n-type Si wafers were cut into 2.5 cm × 2.5 cm squares; then the PDMS (10:1 base to cross-linker ratio by mass) dielectric 4545
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layer was directly deposited onto the Si wafers using spin coating. The capacitance of the dielectric layer (1.16 nF cm−2) was measured with an Agilent E4980A Precision LCR Meter under ambient conditions. The source and drain electrodes were deposited as Cr (3 nm) and Au (60 nm) through a shadow mask. The channel length (L) and width (W) were 50 and 1000 μm, respectively. On the other hand, 0.4-mmthick soft PDMS (20:1 base to cross-linker ratio by mass) slabs (3 cm × 0.5 cm) were used to transfer the polymer thin films onto OTSmodified substrates after 15 min of UV ozone treatment. The polymer/PDMS active layers were directly laminated onto source/ drain electrode-deposited devices with the PDMS dielectric layer after variant tensile stain was applied. All of the electrical characteristics of the stretched polymer active layers were measured with a Keithley 4200-SCS semiconductor parameter analyzer connected to a probe station at room temperature under a nitrogen atmosphere. Characterization of Thin Film Surfaces. The Agilent Cary 6000i UV/vis/NIR spectroscope equipped with a rotational polarizer was used to measure the absorption intensity with the polarization parallel (A∥) and perpendicular (A⊥) to the stretching direction. The dichroic ratio is calculated as R = A∥/A⊥. The polymer thin films under strain were visualized using a Leica DM4000 M optical microscope. Scanning electron microscopy (SEM) was performed using an FEI Magellan 400 XHR microscope with a 5 kV accelerating voltage and 25 pA current.
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RESULTS AND DISCUSSION
Soft Contact Lamination Method. Figure 1 illustrates the processing flow of the soft contact lamination approach used to evaluate semiconducting polymers for stretchable electronics. For sample testing, each of the polymers was first spin-coated onto an octadecyltrimethoxysilane (OTS)-modified Si substrate. The as-cast polymer thin films were annealed under optimal processing temperature and then transferred to an elastomeric PDMS slab (processing details are described in the Experimental Section), and the two combined layers were subsequently stretched incrementally (up to 100%). When the film was held at each strain level, the corresponding transistor characteristics were tested. The stretched polymer/PDMS layers were subsequently laminated onto the prefabricated device stack. Since this process does not require the electrodes and dielectric layer to be stretched, the stretchability of the semiconducting polymers using this device configuration can be repeatedly interrogated with various laminate/delaminate cycles under different amounts of tensile strain without affecting the rest of the device structure. Therefore, this is an effective method to enable specific evaluation of only the semiconducting polymer. For each of our fabricated FETs, the electrical properties of each studied polymer were characterized under various strains. From our obtained transistor characteristics, e.g., mobility, drain current, and on/off ratio, the stretching limitation of semiconductors can be extrapolated. In addition, we performed both optical microscopy and scanning electron microscopy (SEM) to study the cracks formed on the thin film surface. The formation of these cracks correlates with the exhibited degradation in the observed electrical properties. Field-Effect Transistor (FET) Characteristic. The results from the various fabricated transistors are shown in Figure 2 and illustrate the typical p-channel FET characteristics of the PTDPPTFT4 and PII2T polymers. Further details of the on/ off current levels and output characteristics are given in the Supporting Information (Figure S1). We tested electrical characteristics at tensile strain values from 0% to 100%. The electrical device characteristics are summarized in Table 1. The drain current of PTDPPTFT4 dropped significantly as the strain was increased (Figure 2a). Figure 2c shows the trend of
Figure 2. FET characteristics under stretching. (a) Transfer curves of PTDPPTFT4 at different strain levels, (b) transfer curves of PII2T at different strain levels, (c) mobility of the polymer FETs for various amounts of strain applied, (d) threshold voltage (top) and on/off current ratio (off). (e) Mechanical endurance of stretchable FETs with 5 and 20% strain applied for 200 cycles of applying strain and releasing strain. 4546
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Table 1. Strain-Dependent FET Characteristics of PTDPPTFT4 and PII2Ta PTDPPTFT4 strain level [%] 0 5 7.5 10 12.5 15 20 30 50 100 a
mobilityb [cm2 V−1 s−1] 1.49 6.52 4.01 2.43 1.29 1.19 8.63 9.87 5.32 3.77
× × × × × × × × × ×
−1
10 10−2 10−2 10−2 10−2 10−2 10−3 10−3 10−4 10−4
PII2T
on/off ratio 2 9 6 2 2 2 2 9 3 5
× × × × × × × × × ×
4
10 103 104 104 104 104 104 103 103 103
Vth [V] 1.5 −0.55 3.1 −0.49 2.5 −2.8 0.79 0.04 2.7 1.6
mobilityb [cm2 V−1 s−1]
on/off ratio
Vth [V]
−2
5.07 × 10 2.10 × 10−2
5
2 × 10 8 × 104
−27 −23
2.29 × 10−2
1 × 105
−24
3.02 2.51 1.69 1.93 1.52
× × × × ×
10−2 10−2 10−2 10−2 10−2
2 1 8 8 9
× × × × ×
105 105 104 104 104
−25 −27 −27 −25 −29
The polymer thin films were fabricated under optimal conditions. bThe mobility was averaged from at least six devices with three different batches.
small buckles (Figure S10) and nanoscale cracks (Figure S11) mainly formed vertically to the stretching direction, impeding good charge transport. Therefore, lower mobility is observed as the source/drain direction perpendicular to the strain direction of the polymer film. Moreover, the devices were stretched for 200 cycles at both 5% and 20% strain ratios to examine the stability and reproducibility of FETs with our soft contact lamination method. The PTDPPTFT4 and PII2T-based FETs under both 5% and 20% strain ratios exhibited stable performances (Figure 2e), and the mobilities are comparable to the values before the cycling operation commenced. Also, no significant changes could be observed during the laminate/delaminate process, indicating the decrease of the mobility is directly related to the changes of the polymer thin films (Figure S4, Supporting Information). In addition, P3HT was evaluated by this lamination system and exhibited much more stable mobility (decay ∼1 order of magnitude when films were subjected to 50% strain) than PTDPPTFT4 (decay was 2.5 orders of magnitude when films were subjected to 50% strain; Figure S5 in Supporting Information). Our FET with P3HT gave a mobility of 5 × 10−2 cm2 V−1 s−1 when no strain was applied (at a low on/off current ratio of ∼101). The mobility then decreased to ∼5 × 10−3 cm2 V−1 s−1 when 10% strain was applied. It was observed that the mobility remained the same when 50% strain was applied. These values are much lower and less stable than the PII2T-based device (the mobility maintained the same order of magnitude under strain for the PII2T-based device). The mobility of P3HT after stretching to 30% strain was reported to be ∼3 × 10−2 cm2 V−1 s−1.25 It was previously reported that P3HT mobility was highly dependent on molecular weight and film morphology.43 Since we are using a different batch of P3HT from the previous reported work, the lower mobility and on/off ratio value in our measured devices may be attributed to the different material origin. Polarized UV/Vis Properties. To investigate the relationship between FET characteristics and the ductility of the studied polymers, we employed UV/vis spectroscopy together with a rotational polarizer to measure and calculate the dichroic ratio (R).25 The dichroic ratio (R) is the polymer film absorbance with polarized incident light parallel to the stretching direction (A∥) divided by the light perpendicular to the strain direction (A⊥), i.e., R = A∥/A⊥. The dichroic ratio, R, can be used to detect polymer chain alignment under strain. Thin films of the PTDPPTFT4, PII2T, and P3HT on PDMS substrates were investigated, as shown in Figure 3. It has
mobilities as a function of strain. At 0% strain for PTDPPTFT4, the device reached a mobility value of 0.15 cm2 V−1 s−1 but then promptly decreased to 6.5 × 10−2 cm2 V−1 s−1 as 5% strain was applied, 8.6 × 10−3 cm2 V−1 s−1 as 20% strain was applied, and 3.7 × 10−4 cm2 V−1 s−1 as 100% strain was applied. On the contrary, the PII2T-based FETs exhibited a different trend in mobility change (Figure 2b). The mobility was observed to be stable in the range between 0% and 100% applied strain. We note that the PII2T device showed a stable mobility around 1 × 10−2 cm2 V−1 s−1 even under 100% strain, which is comparable to that of the pristine film with no strain applied (5 × 10−2 cm2 V−1 s−1), indicating PII2T can maintain high charge transport properties even when a large strain is applied. It is also important to note that the on/off current ratios and threshold voltages (Figure 2d) of FETs based on both polymers were kept in a stable region, indicating that both FETs exhibit steady operation even when the polymers are subjected to a high degree of tensile strain (100%). In addition, mobilities of the transistors based on PTDPPTFT4 and PII2T decreased at a similar rate in both parallel and perpendicular stretching directions (Figure S2 in the Supporting Information). This result is contrary to the findings reported by DeLongchamp et al.,25 in which they found the mobility increased in the perpendicular direction and decreased in the parallel stretching direction. However, it is consistent with some studies on a pentacene-based device under strain.38 In addition, as a comparison, the electrical properties of PII2T were also investigated using the reported method of DeLongchamp et al.25 (Figure S3, Supporting Information). The trend of mobility change in the biaxial strain direction is similar to the results from our lamination method. This validates the lamination method reported here as a simple and reliable method for evaluating the semiconducting material under mechanical strain. The average molecular weights for the P3HT polymers used in the two studies are different, which may be responsible for the observed different behavior. In the case of polymers, stretching usually results in alignment of the polymer backbone along the stretching direction unless cracks are developed. The effect of polymer alignment on charge transport has been studied with various polymers aligned using surface induced alignments.39−42 Some studies found enhancement of charge transport along the backbone alignment direction, while others found enhancement along the π−π stacking direction, depending on the detailed morphology in each case. In our case, the degree of alignment was not as high as that observed in the DeLongchamp work. The decrease of mobility in the perpendicular direction may be related to the 4547
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applied. The R values of P3HT and PII2T are increased greatly from 1 (0% strain applied) to 1.6 and 1.5 as 50% strain is applied, respectively. However, the R of PTDPPTFT4 only reaches 1.05 even at 50% strain. This difference indicates that P3HT and PII2T can be stretched more easily to be aligned along the stretching direction and, therefore, are more tolerant to applied tensile strain and more stretchable than PTDPPTFT4. This result also suggests P3HT and PII2T should exhibit much more stable charge transport under stretching, consistent with our FET results. Strain-Dependent Surface Morphology. While R provided insights into the molecular mechanism for accommodating strain, direct visualization of the strain-dependent surface morphology can be accomplished using optical microscopy and scanning electron microscopy (SEM). We employed optical microscopy to observe large changes on the polymer surface when 0%, 50%, and 100% strain are applied, as depicted in Figure 4. Additional plots detailing the morphological changes can be found in the Supporting Information. The studied polymers exhibit distinct surface morphological changes when held at 0% to 100% stretching. For samples in which no strain was applied, smooth surfaces were observed for all three polymers. Conversely, the surface morphologies showed significant changes when held at 50% and 100% strain. PTDPPTFT4, the highly crystalline material, exhibited severe film cracking after stretching. Specifically, cracks were observed even at a low tensile strain (
