Article pubs.acs.org/cm
Atomic Layer Deposition of SrTiO3 Films with CyclopentadienylBased Precursors for Metal−Insulator−Metal Capacitors Woongkyu Lee,† Jeong Hwan Han,† Woojin Jeon,† Yeon Woo Yoo,† Sang Woon Lee,† Seong Keun Kim,†,§ Chang-Hee Ko,‡ Clement Lansalot-Matras,‡ and Cheol Seong Hwang*,† †
WCU Hybrid Materials Program, Department of Materials Science and Engineering and Interuniversity Semiconductor Research Center, Seoul National University, Seoul 151-744, Korea ‡ Air Liquide, 28, Wadai, Tsukuba-Shi, Ibaraki Pref., 300-4247, Japan ABSTRACT: The characteristics of the atomic layer deposition (ALD) of SrTiO3 (STO) films were examined for metal−insulator−metal capacitors, with Cp-based precursors Sr(iPr3Cp)2 and Cp*Ti(OMe)3 [Cp* = C5(CH3)5] employed as the Sr and Ti precursors, respectively. While the Sr precursor has a higher reactivity toward oxygen on the Ru substrate compared with another Ti precursor, with a 2,2,6,6-tetramethyl-3,5heptanedionato ligand, which results in the highly Sr excessive STO film, the enhanced reactivity of the present Ti precursor suppressed the unwanted excessive incorporation of Sr into the film. A possible mechanism for the Sr overgrowth and retardation is suggested in detail. By controlling the subcycle ratio of SrO and TiO2 layers, stoichiometric STO could be obtained, even without employing a deleterious reaction barrier layer. This improved the attainable minimum equivalent oxide thickness of the Pt/STO/RuO2 capacitor to 0.43 nm, with acceptable leakage current density (∼8 × 10−8 A/cm2). This indicates an improvement of ∼25% in the capacitance density compared with previous work. KEYWORDS: SrTiO3, atomic layer deposition, DRAM, capacitor, Ru, RuO2
1. INTRODUCTION Dynamic random access memory (DRAM) is one of the most important components in personal computers, servers, and mobile electronic devices. Highly scaling DRAM devices is vital for faster, smaller, and lower-power operation. However, even with a reduced size of the capacitor in DRAM, the capacitance and leakage current should be maintained at a certain level (25 fF/cell and 1 fA/cell) for fluent operation of the memory. Since the capacitance is determined by the permittivity, thickness of the dielectric, and the overlap area of the two electrodes, a material with a high dielectric constant is necessary for nextgeneration DRAM. The dielectric material presently being used in mass production is composed of a ZrO2/Al2O3/ZrO2 stacked layer, where ZrO2 is used for increasing the dielectric constant, and Al2O3 is used for suppressing the leakage current.1−3 However, to scale-down DRAM to the design rule of
