Editorial pubs.acs.org/cm
Best Practices for Reporting Organic Field Effect Transistor Device Performance rganic field effect transistors (OFETs) are of significant interest for applications in low-cost, flexible, large-area electronics. Soluble conjugated polymers allow for facile, low temperature, roll-to-roll processing to fabricate a variety of optoelectronic devices including plastic solar cells, biodegradable sensors, radio frequency identification tags, and direct view displays. A review of the literature indicates that more than 1400 papers with “organic field effect transistors” or “OFETs” have appeared in publications since 2005 (Web of Science, May 21, 2015). Further, a wide range of materials, device fabrication parameters, processing conditions, and characterization metrics have arisen to study the properties of polymer semiconductors.1,2 As a result, standardized reporting requirements are essential to ensure reliable and repeatable studies on the fabrication and characterization of OFETs. Such standardization is also a prelude for making rational materials or device performance comparisons. Of additional importance are recent developments concerning charge transport mechanisms in organic electronic devices that differ from the established theories for metal-oxide-semiconductor field-effect transistor (MOSFET) devices.3 As device physics models that best characterize organic materials electrical performance continue to evolve, it is crucial to have a constant framework for comparisons with prior literature. While previous publications make note of standards for device fabrication and electrical characterization,4 they are often not comprehensive. Here, we hope to summarize our thoughts as to the essential reporting requirements for studies associated with OFETs.
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the lower or upper region side of the semiconductor, resulting in different charge transport pathways. Hence, the layered device structure comprising the substrate, gate electrode, source/drain electrodes, dielectric, semiconductor, and passivation layers all need to be clearly defined. What materials were used and exactly how were they processed? The number of accumulated charges at the semiconductor−dielectric interface is proportional to the gate voltage and capacitance of the dielectric, which can be determined from the insulator thickness and dielectric constant. Thus, these dielectric characteristics must also be reported. It is important to thoroughly describe each device fabrication step with the respective processing sequence. Typically, fabrication starts with a substrate cleaning routine, and authors should indicate what kind of cleaning agents were used, whether the substrates were cleaned in an ultrasound cleaning bath, piranha etch, plasma treatment, or UV-ozone. How were they cleaned and for how long? Substrate hydrophobicity might be modified after these cleaning processes and influence subsequent thin-film deposition and device performance. OFET performance is determined primarily by the semiconducting material, which can be deposited by a diversity of processing techniques including, but not limited to, drop casting, spin coating, blade coating, or inkjet printing. Although the experimental parameters associated with these approaches are different, authors are responsible for ensuring that all the reported information is sufficient to guide the readers to evaluate and/or reproduce the reported work. For instance, for a spin coating process, the solvent, spin speed, duration, processing environment, and postdeposition thermal and/or solvent treatment are all necessary details. Any precoating process steps must also be noted. Before current flow initiates in the active channel, charges have to be injected from the source electrode into the semiconductor by overcoming the potential barrier and contact resistance. This barrier height is decided by the difference between the semiconductor HOMO/LUMO levels and the metal electrode work function.6 Thus, readers must also be informed as to the selection of, and deposition process for, the source/drain electrode material, along with the channel dimensions. Finally, it should be noted whether the experiments involved any electrode or dielectric treatment or posttreatments such as use of self-assembled monolayers or thermal annealing, respectively, to improve OFET performance. Details regarding the deposition process should be provided.
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SEMICONDUCTING MATERIALS Intrinsic material properties have a significant impact on transistor performance irrespective of processing or device configuration. Conjugated polymer molecular weight (MW) is one of the key factors to be carefully considered. For example, it has been demonstrated that the charge carrier transport performance of P3HT thin-films is positively correlated with MW since longer polymer chains increase opportunities for charge hopping to neighboring chains, resulting in enhanced mobility.5 In order to avoid any contradictions between independent research work caused by the variance of intrinsic material properties, authors must provide all details surrounding the material, including the source of materials, purification process, storage method, and any other factors such as regioregularity, MW and polydispersity, and deposition solvent that might may impact experimental results
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OFET OPERATION AND DATA ACQUISITION7,8 Key parameters representing organic semiconductor charge carrier transport characteristics include charge carrier mobility, threshold voltage, and on−off ratio, all of which should be presented to readers. Statistical information such as the number
OFET FABRICATION OFETs can be classified into four architectures: (a) bottomgate bottom-contact, (b) bottom-gate top-contact, (c) top-gate bottom-contact, and (d) top-gate top-contact. Depending on device configuration, when a bias is applied to the gate electrode, charge carriers are expected to accumulate near the dielectric/semiconductor interface which could be located at © 2015 American Chemical Society
Published: June 23, 2015 4167
DOI: 10.1021/acs.chemmater.5b01982 Chem. Mater. 2015, 27, 4167−4168
Chemistry of Materials
Editorial
of devices used for parameter calculation should be provided, along with the standard deviation. Device characterization requires two different device measurements. One of these measurements acquires multiple drain current (ID) versus drain voltage (VD) curves with varied gate voltage (VG); these are referred to as output curves. The second measures ID versus VG with fixed VD, and the ID−VG curve obtained from operation is commonly called the transfer curve. Both the output curves and transfer curve should be reported in a publication. The fixed VD used to sweep the transfer curve should also be noted. From the OFET device output curves, it is possible to judge the boundary between the linear region and saturation region of device operation. Ideally, charge should be accumulated in the semiconducting layer once a nonzero VG is applied. However, in most of cases for a variety of reasons, some particular value of VG is required for charge accumulation. For example, the presence of deep charge traps or band bending provoked by mismatch between the semiconductor HOMO/LUMO and the electrode Fermi level requires application of nonzero extra voltage to accumulate conductible charges within the semiconductor layer. This necessary gate voltage required to turn on the device is referred to as the threshold voltage (VT). An OFET device operates in the linear region when (VG − VT) ≫ VD. During linear operation, the charge concentration profile is uniform throughout the semiconducting layer. Bias applied between the source and drain electrodes is not large enough to generate a gradient of accumulated charges. Accordingly, ID and VD show a linear positive correlation in the linear region of operation. For charge carrier mobility calculation in this region, eq 1 can be used, ⎛ L ⎞⎛ ∂ID μLin = ⎜ ⎟⎜ ⎝ WVDC ⎠⎜⎝ ∂VG
⎞ ⎟ ⎟ VD ⎠
Table 1. Checklist of Reporting Requirements for Organic/ Polymer Devices
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μSat
⎞2 ⎟ ⎟ VD ⎠
AUTHOR INFORMATION
Notes
Views expressed in this editorial are those of the author and not necessarily the views of the ACS.
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(1)
where L and W represent the channel length and width, respectively. When (VG − VT) < VD, the OFET device operates in the saturation region where VD is large enough to induce a gradient of accumulated charges by (VG − VT), and ID does not change as VD changes. In this case, eq 2 should be used for the calculation of mobility from the transfer curve. ⎛ ⎛ 2L ⎞⎜ ∂ ID ⎟ =⎜ ⎝ WC ⎠⎜ ∂VG ⎝
The Georgia Institute of Technology, Atlanta, Georgia, United States
REFERENCES
(1) Ward, J.; Lamport, Z.; Jurchescu, O. Versatile Organic Transistors by Solution Processing. ChemPhysChem 2015, 16, 1118−1132. (2) Zhao, Y.; Guo, Y.; Liu, Y. 25th Anniversary Article: Recent Advances in n-Type and Ambipolar Organic-Effect Transistors. Adv. Mater. 2013, 25, 5372−5391. (3) Kim, C.; Bonnassieux, Y.; Horowitz, G. Compact DC Modeling of Organic Field-Effect Transistors: Review and Perspectives. IEEE 2014, 61 (2), 278−287. (4) IEEE standard test methods for the characterization of organic transistors and materials. IEEE Std 1620-2008; 2008. (5) Kline, R. J.; McGehee, M. D.; Kadnikova, E. N.; Liu, J.; Fréchet, J. M. J. Controlling the Field Effect Mobility of Regioregular Polythiophene by Changing the Molecular Weight. Adv. Mater. 2003, 15, 1519−1522. (6) Zaumseil, J.; Sirringhaus, H. Electron and Ambipolar Transport in Organic Field-Effect Transistors. Chem. Rev. 2007, 107, 1296−1323. (7) Newman, C.; Frisbie, C. D.; Filho, D.; Bredas, J. L.; Ewbank, P. C.; Mann, K. R. Introduction to Organic Thin Film Transistors and Design of n-Channel Organic Semiconductors. Chem. Mater. 2004, 16, 4436−4451. (8) Sirringhaus, H. 25th Anniversary Article: Organic Field-Effect Transistors: The Path Beyond Amorphous Silicon. Adv. Mater. 2014, 26, 1319−1335.
(2)
A summary or checklist of important reporting parameters is presented in Table 1. These are suggested as principal, minimum requirements for any publication that discusses and/or compares OFET device performance. Now that there is a reliable commercial supply of some polymer semiconductors, consideration might also be given to selecting one of these materials to use and report as an internal laboratory standard material to more reliably compare materials performance attributes. Polymer semiconducting technologies offer significant advantages for many applications ranging from energy and sustainability to health and security. The design of robust materials and processes depends on availability of reproducible and complete experimental details.
Dalsu Choi Ping-Hsun Chu Michael McBride Elsa Reichmanis, Associate Editor 4168
DOI: 10.1021/acs.chemmater.5b01982 Chem. Mater. 2015, 27, 4167−4168
