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George B. Kauffman California State University Fresno, CA 93740
Chemical Etching of Group III–V Semiconductors Najah J. Kadhim and Stuart H. Laurie School of Applied Sciences, De Montfort University, The Gateway, Leicester, LE1 9BH, UK D. Mukherjee School of Electrical, Electronic and Information Engineering, South Bank University, Borough Road, London, SE1 0AA, UK
Chemical etching (the chemical dissolution of atoms from a solid surfaces) of semiconductor materials plays an essential role in the fabrication of microelectronic devices. Etching is a very important step in the fabrication of devices such as light-emitting diode (LED) displays and infrared (IR) detectors. This process is used to define the areas required for doping or forming channels in the fabricated device, for shaping and polishing, and for characterizing structural features. Shaping refers to the dissolution in areas defined by a masking film, a particularly important stage in the fabrication of multilayered devices such as semiconductor lasers. Shaping can also be accomplished by dry etching processes, such as by ion or laser bombardment. These latter methods are undoubtedly becoming increasingly more important but their present disadvantages (nonselectivity and damage to the wafer crystals) mean that wet chemical processes will still be used for some time. With chemical etching the etch depth can be designed to be just tens of angstroms or up to a few hundred angstroms. In this article we shall only be concerned with the wet chemical methods used in the etching of GaAs. The coverage will be somewhat selective in order to illustrate the range of solutions and mechanisms that can be used. Table 1 illustrates some of the etch solutions (etchants) that have been used. Although such an important topic will have been reviewed many times before, these reviews will not have recently come to the attention of the nonspecialist reader, as is evident from the reviews cited here (1–6 ). The Use of Wet Chemical Etching in Integrated Circuit (IC) Technology Today, chemical etching is one of the standard techniques for processing integrated circuit technology. Normally, ICs on wafers are implemented by coating the wafer with a thin photoresist layer (a radiation-sensitive dilute organic layer), which is then delineated into patterns on the wafer through the mask, using UV radiation. Photoresist patterns are created on the wafer, which is then dipped in the wet chemical solution. The chemical etch dissolves the exposed surface of the wafer through chemical reaction (up to a depth of ca. 1 µm). Wet chemical etching is usually isotropic (the etching rate is the same in all directions). In practice, the film underneath the mask should be one-third or less of the required resolution. Therefore a major disadvantage with wet
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chemical etching is the fact that when very fine patterns have to be produced, there is a loss of resolution of the etched patterns. Chemical Etching Chemical etching is a process used to remove controlled amounts of materials from the original substrate. The etched material can be in the form of a mask or even dirt! A reactive chemical attacks surface atoms; the new species formed then either dissolve in the etchant solution or escape as a gas. An example of this is the etching of InP with HCl (6 mol L᎑1) which proceeds via the reaction: InP(s) + 3HCl(aq) → InCl3(aq) + PH3(g)
(1)
An initial step in this reaction is the breaking of an InP bond: Cl
H
Cl
H
P
In
P
+ In
(2)
Our own studies (7) have involved aqueous methyl iodide as an etchant. (CAUTION: Methyliodide [iodomethane] CAS registry No. 74-88-4, is highly volatile [bp ca. 42 °C] and highly toxic. Inhalation of its vapor should be avoided. Always handle in a fume cupboard and wear protective clothing and gloves.) Surprisingly, this relatively mild reagent can dissolve a number of metallic and nonmetallic elements. With GaAs, a room-temperature dissolution rate of As of up to 300 µ g min᎑1 has been observed; the mechanism involves formation of intermediate methylarsenic species, which then become solubilized and hydrolyzed. Factors Influencing Rate and Profiles of Chemical Etching While the basic theory behind the various processes is well understood, in practice there are so many influencing factors that predictions and reproducibility of the etch rate and profile (shape of the etched surface) can be difficult. Here we outline some of the major factors involved.
Chemical Composition of the Semiconductor The nature of the group III-V elements is obviously a major determinant, but the nature of any dopants is also important. A striking example of the influence of dopants is
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seen with n-doped GaAs1 for which deposition of thin layers of gold atoms (chemiplating) takes place at nonilluminated areas while etching (e.g., with simple salt solutions or dilute acids) occurs at illuminated regions; however, the opposite behavior occurs with p-doped2 materials.
Surface Contamination and Oxidation Any semiconductor material exposed to the atmosphere will grow an oxide layer and probably a carbon layer. These are troublesome impurities. Oxide layers can normally be removed by thermal annealing (~800 °C). One study suggests that continuous thermal etching is the most effective method for reducing surface oxide (8). A carbon layer, on the other hand, is not easy to remove and will affect the characteristics and properties of any surface treatment and thus the performance of the device. Careful storage is obviously important. The oxides of As are highly reactive and easily dissolved, even in water and alcohols. Gallium oxides are readily soluble in alkaline solutions only. Therefore, before etching, the GaAs material must be cleaned. A simple established treatment of working sequentially with acetone, methanol and deionized water is normally sufficient. Care must be taken to remove residual solvents (carbon contamination). Our own preference has been for a sequential trichloroethylene, H2SO4, H 2O treatment, and then drying in a stream of nitrogen gas. Crystal Orientation Semiconductors of the III-V group are normally used in single-crystal form. The crystal structures are all of the zinc blende type, in which each atom is tetrahedrally surrounded by four near neighbors of the other atom type. One can view the structure along a particular axial direction as in Figure 1, which shows the AB…AB…AB layer arrangement. By convention the group III atoms are designated A and the group
V atoms, B. It is evident that the closely spaced atomic planes AB are held together by three covalent bonds between the A and B atoms, but the B…A planes are held together by only a single bond per A or B atom. Consequently, the GaAs crystals can be cleaved along the weaker B…A directions. Because of differences in polarity between the A and B atoms, the A{111} plane, occupied only by Ga atoms, will behave differently from a B{111} plane, which has exposed As atoms. In consequence, the rate of chemical etching depends very much on the nature of the reacting crystal plane. This difference is evident in differences in oxidation rates and, from our own observations, on the preferential attack on the As surface by CH3I, forming volatile methylarsenic species, while the Ga surface remained virtually untouched.
Defects and Surface Morphology A major obstacle to the successful fabrication of the semiconductor multilayer devices is the presence of structural defects, either inherent in the semiconductor or induced during the fabrication process. The group III-V materials are relatively fragile and therefore easily subject to surface damage. Extreme care is required at the initial polish and etching stages, not only to avoid surface contamination but also to avoid surface damage. Inherent defects can affect both the etch profile and the etch rate. In fact, etching can be used to reveal any defects present (9), a property used long before the advent of semiconductors to reveal crystallographic properties of natural minerals. The wafers, as supplied by the manufacturers, are usually treated with some preparatory recipe to remove surface contamination. This preparatory treatment does not necessarily remove surface defects. A mechanical polishing and chemical etching are frequently used to remove such defects.
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Figure 1. Representation of zinc blende structure of GaAs and othe r group III-V semiconductors showing the AB...A B...AB layer arrangement.
The electron micrographs shown in Figure 2 illustrate some of the practical problems that can be encountered. Figure 2a shows the surface morphology of a substrate before chemical etching; a high density of defects is seen to be present in the substrate. The scanning electron microscope (SEM) analysis shows contamination by a carbonaceous compound. This was probably left behind by the polishing process carried out by the manufacturers. Figure 2b shows the same substrate after etching with H2SO4/H2O2/H2O. It indicates that the substrate surface is very rough, with a similar high density of dark spots and nonuniform areas. Although the density of the surface defects has dropped as a result of etching (Fig. 2b), their total elimination was very rarely observed. The etching process has itself contributed some of the defects seen in Figure 2b. Substrate preparation and surface cleaning before the molecular beam epitaxy (MBE)3 growth process are essential steps for producing a good quality of epitaxial layer (10, 11). Normally the chemical etching is responsible for removing damage introduced to the substrate after mechanical polishing, to produce an atomically clean surface before growth. However, the purity of the various laboratory agents used in the etching process and that of the laboratory atmosphere
a
b
c
d
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have an important role in this process. Figures 2c and 2d show typical examples of the micrographs obtained for substrates prepared under improper laboratory conditions. The impurities present in the substrate in Figure 2c can be variously associated with the solvents and deionized water used in the preparatory stage, lints from cleaning tissues, and airborne particles in general. A particular example of spherical particles that are very often observed can be seen in Figure 2d; the shape of these impurities is characteristic of fungal spores. The presence of these impurities will favor unequal etching of the substrate surface, leading to a nonuniform surface. Increasing the temperature of treatments can lead to nonuniform surfaces. At 55 °C a number of undesirable etch pits are evident (Fig. 3a), but at room temperature a favorable surface is obtained (Fig. 3b). In neither of these examples was there any stirring or agitation of the solution. Types of Etchants in Use It is not possible to list here all the etchants that have been suggested in the literature, since there are just too many. A representative sample is given in Table 1 under the three types of etching processes, namely, polishing, isotropic etching (etching rate the same in all directions), and anisotropic etching. The latter is sometimes referred to as structural or preferential etching. The table shows that there is some overlap between these areas, as changes in composition or the temperature used can give different forms of etching. Polishing and isotropic etching should both lead to smooth surfaces in a finite time. The anisotropic etchants preferentially attack and dissolve certain crystal planes or defects. Acid etchants, because of the generally exothermic nature of their reactions, produce isotropic etching. High viscosity is a desirable property for a good polishing etchant—hence the use of H2SO4 and glycerol for this purpose. Many of the reagents used, especially H2O2, Br2, and aqueous NH3, deteriorate with time so it is vitally important in these cases to prepare the solutions fresh and to use high-quality reagents. This was one of the reasons for our examining aqueous methyl
Figure 2. Scanning electron micrographs of GaAs (a) before and (b) after the chemical etching process; (c) surface showing the presence of airborne and other particles, and (d) fungal spores from the laboratory environment.
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Figure 3. Scanning electron microscopy of GaAs (a) defect formation due to etch pits after annealing at 55 °C; (b) the same etchant at room temperature giving the desired smooth and featureless surface.
a
b
iodide, because it has a long shelf-life. For multilayer devices, selective chemical etching is possible and desirable—for example, in the selective dissolution of elements or compounds. For example, concentrated HCl solutions have been used to dissolve InP selectively, leaving other layers, such as In x Ga1᎑ x As y P1᎑ y , untouched. The opposite effect is achieved by etching with a CeIV/H2SO4 mixture. Similar selectivity can be achieved with layered GaAs, Al x Ga1᎑ x As devices. Conclusions Chemical etching is undeniably an important stage in the fabrication of today’s many semiconductor devices. Errors at this stage will severely impair the performance of the end product. In his 1982 article, Heimann (1) concluded that “…the soil is fertile to promote etching from an art to a science!” We hope this article has shown that, despite all the pitfalls, etching can be controlled and can be precise. What of the future? Undoubtedly, new recipes will come along; but it is difficult to see where any major improvements can occur in the wet etching area. Future improvements will probably lie in refinement of the dry etching methods such as laser and plasma etching, perhaps with in situ microscopic examination and control.
Notes 1. In n-doped GaAs, some of the Ga (group III) atoms have been substituted with group IV atoms, increasing the number of valence electrons and consequently the negative charge, n. 2. p-Doping is an alternative to n-doping. In p-doped GaAs, atoms having fewer valence electrons are substituted; p indicates an increase in positive charge. 3. Molecular beam epitaxy is a technique by which a beam of atoms or molecules deposited at a substrate surface under ultrahigh vacuum produces a well-defined layer of atoms or molecules on the substrate surface.
Literature Cited 1. Heimann, R. B. Crystal Growth Prop. Appl. 1982, 8, 173–224. 2. Mukherjee, S. D.; Woodard, D. W. In Gallium Arsenide; Howes, M. J.; Morgan, D. V., Eds.; Wiley: Chichester, 1985; pp 119–160. 3. Stirland, D. J.; Straughan, B. W. Thin Solid Films 1976, 31, 139–170. 4. Adachi, S; Oe, K. J. Electrochem. Soc. 1984, 131, 126–130. 5. Chand, N.; Karlcek, R. F. J. Electrochem. Soc. 1993, 40, 703–705. 6. VLSI Technology, 2nd ed.; Sze, S. M., Ed.; McGraw Hill Series in Electrical Engineering, Electronics, and Electronic Circuits; McGraw-Hill: New York, 1988. 7. McDonagh, R. Ph.D. Thesis, De Montfort University, UK, 1993. 8. Yoon, H. J.; Choi, M. H.; Park, I. S. J. Electrochem. Soc. 1992, 139, 3229–3234. 9. Kodama, M. Phys. Status Solids A 1993, 1210, 481–490. 10. Kadhim, N. J.; Meta, M.; Mukherjee, D. J. Mater. Sci. Lett. 1993, 12, 623–625. 11. Kadhim, N. J.; Mukherjee, D. J. Mater. Sci. Lett. 1996, 15, 1330–1331.
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