Digital servo device for laboratory control and measurement

Aids to software development for single-board microcomputers. Israel R. Bonnell , Richard J. Dalle-Molle , James D. Defreese. Analytica Chimica Acta 1...
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ANALYTICAL CHEMISTRY, VOL. 51, NO. 11, SEPTEMBER 1979

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Digital Servo Device for Laboratory Control and Measurement Applications Rich Dalle-Molle and James D. Defreese” Department of Chemistry, University of Kansas, Lawrence, Kansas 56045

The tracking analog-to-digital converter (TADC) is presented as a digital functional equlvalent of the analog operational amplifier (OA), Le., as a digital OA. Its advantages and disadvantages relative to the analog OA are discussed. Specific measurement and control applications of the TADC are presented and include an automatic output offset null circuit for high accuracy measurement systems, a photomultipliertube gain programmer, a filter with a programmable frequency response, a programmable current-controlled power supply for hollow cathode lamp pulsing, and a data compression type acquisition system.

Most modern (and many not-so-modern) pieces of laboratory instrumentation are or contain servo systems. Electronic balances, X-Y and strip chart recorders, and feedback stabilized power supplies are but a few of the more obvious examples. At the heart of many of these systems is the tracking analog servo or, as it is more commonly known, the operational amplifier (OA). Although this device has found a home in virtually every corner of the world of measurement and control, its use in given situations may not be the best solution to the problem a t hand. Alternatives t o the OA do exist, and this paper discusses and demonstrates the utility and versatility of one such alternative. The tracking digital servo, or tracking analogto-digital converter (TADC)(I,Z) , is a functional equivalent of an OA. The TADC is described here in terms of its functional subunits, and comparisons are made between the OA and the TADC. These comparisons highlight the advantages of the TADC for particular types of applications, some of which are demonstrated experimentally.

INSTRUMENTATION Comparison of OA and TADC. Any system which detects a difference between the actual and desired states of a controllable quantity and then feeds the difference information back to a controlling device in such a way as to cause the difference to become zero is classified as a servo system ( 3 ) . A block diagram of an OA is shown in Figure 1A. If a voltage is applied to the (+) input, and if it is different from that which is present a t the (-) input, the difference will be sensed by the difference amplifier. The difference signal is fed to a high-gain stage which drives the signal at the (-) input via the output stage until it is equal to the signal a t the (+) input. When no difference (within the resolution of the device) exists between the (+) and (-) inputs, the system is balanced and stable. A glance back to the definition of servo system will show that this device is indeed a servo, in this case a servo voltage follower. Figure 1B is a block diagram of the TADC. Again, if a difference signal exists between the (+) and (-) inputs, the difference amplifier will sense it. Instead of going t o a high-gain analog stage, however, the difference information is fed to two comparators in the up/down gate circuit. These comparators sense the sign and magnitude of the difference 0003-2700/79/0351-1755$01.OO/O

signal, and pass this information on to a digital gain stage consisting of a clock, a gate, and an up/down counter. The counter feeds its information to a digital-to-analog converter (DAC), the output of which is an analog signal proportional to the digital input from the counter. The gain stage will act to vary the count in the counter until the analog signal fror.1 the DAC is equal to the signal a t the (+) input to within one count. Although the gain stage of this device is totally different from that of the OA, the voltage follower function performed is the same. While not shown explicitly in Figure lB,the digital output from the counter in this configuration may be used as a direct measure of the input voltage. This is in fact the analog-to-digital conversion function of the TADC. Without going into detail, we simply state that the TADC can be configured in any manner that one would normally configure an OA. The only functional difference is in the internal gain stage. As such, the TADC can tie considered to be a digital operational amplifier. Tracking ADC Operation. Figure 2 is a more detailed diagram of the TADC, with the device shown in a generalized control application. The reference and primary feedback signals are brought in to the difference amplifier. Although voltage encoded signals may be brought directly to the comparators’ inputs (in which case the comparators act as difference amplifiers), the use of the difference amplifier a t the input is advantageous for the following reasons. First, it facilitates the use of current encoded signals through its ability to be configured as a current follower. Note that one cannot successfully bring current signals to both comparators simultaneously. Second, the difference amplifier may be chosen to have very good input bias and offset current specifications for high sensitivity work. These specifications are usually poor for fast comparators. Third, and most important, the difference amplifier can be configured with gain. Thus, if the change in output from the controlled system for a one least significant bit (LSB)change in the manipulated variable is small (say 1 mV), the gain of the difference amplifier will provide sufficient drive for the comparators. This also helps minimize the effects of noise a t the comparator inputs, and makes less critical the setting of the comparators’ respective threshold levels (described below). The signal, having been conditioned by the difference amplifier. is now presented to the comparators. The comparator thresholds, which are determined by the resistor network associated with each device ( 4 ) ,are set to differ by the equivalent of 1 LSB when the system is in balance. This is accomplished as follows. The “up” comparator threshold is set to + 1 / 2 LSB equivalent when the output of the cornparator is “high‘. The resistor network is set t o give ‘/4 LSB equivalent of hysteresis when the output of the comparator is “low”. The “down” comparator’s threshold is similarly set, but with a value of - 1 / 2 LSB equivalent when the cutput is “low”. Referring to Figure 3, conside; a situation in which the difference amplifier output is positive by more than ’ 1 LSB equivalent. The comparator outputs uill be “low” and this information tells the gain stage to “count up”. When the difference amplifier output falls below 1 / 4 LSH equivalent, C 1979 American Chemical Society

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Figure 1. Functional block diagrams of (A) operational amplifier and (B) tracking analog-to-digitalconverter, both in voltage follower con-

figurations the “up” comparator output will go from “low” to “high‘, and the hysteresis in this comparator will cause the threshold level to become + 1 / 2 LSB equivalent. As long as the signal stays between the thresholds of the “up” and “down” comparators (+l/z and -1/2 LSB, respectively) the system is in functional balance, and the outputs of the comparators close the count gate. The system holds until some change in input occurs, a t which time the state of the comparators changes and the system reactivates itself. The up/down gate contains the logic necessary to route the clock signal t o the proper input of the up/down counter. Digital information from the comparators is presented to the “D” inputs of a 7474 flip-flop. The information is transferred to the outputs of the flip-flops on each 0 1 transition of the clock. The two-gate delay of the clock signal prior to its presentation to the NAND gate inputs assures that the flip-flop outputs change while the NAND gates’ other inputs

-

are low. This prevents spikes at the outputs of the NAND gates. When the output of either flip-flop is “high”, the clock signal is routed to the appropriate counter input, and counting occurs in the proper direction until the flip-flop output goes low. If the outputs of both flip-flops are low, both gates are closed and counting ceases. This condition occurs when the system is in balance or when the onfoff input is low. The counter used in this work is comprised of two or three (depending on the number of bits required) 4-bit presettable up-down counters (74193 I.C.). The counter is configured as a dead-end up-down counter in order to prevent over- and under-ranging ( 5 , 6 ) .A carry pulse from the most significant bit causes “1’s” to be loaded into the counter and a borrow pulse acts to clear the counter to all “0’s”. The counter output is the input to the DAC. The DAC used depends on the application. For relatively low resolution control or measurement, an 8-bit DAC may be used. Higher resolution may be obtained with a larger number of bits. For control applications, DAC linearity is not important since the relationship between DAC input and output is not critical. Measurement applications, however, require a DAC with good linearity specifications since one is taking the digital input as a direct measure of the analog output. DAC monotonicity is important in both types of application. The analog output of this device may be used to control a given load directly, or some form of buffering may be necessary, e.g., current booster, current-to-voltage converter, etc. Although the TADC described above is complete and functional, the device used in the present work was designed to allow maximum application flexibility and computer compatibility. It was constructed on a circuit board which plugs directly into an ADD 8080 microcomputer system (7, 8). The DAC is a DAC-08 (Precision Monolithics, Santa Clara, Calif.) 8-bit multiplying DAC. The multiplying capability and complementary negative-current outputs of this component make it a good choice for a variety of applications. The additional components added to the basic system include an extra DAC-08, two operational amplifiers, address decoding logic, and latches and bus drivers for parallel communication with the ADD 8080 system. The extra DAC accepts output from the computer and is used either to set the reference level of the TADC system for control applications or to drive the DIGITAL OUTPUT

CONTROLLED SYSTEM primary ,feedback

‘out or

\

n-BIT

”out

manipu lot ed variable

Figure 2. Detailed diagram of the TADC in a generalized control application

DAC

n%lT DEAD-END UP/DN COUNTER UP

ANALYTICAL CHEMISTRY, VOL. 51, NO. 11, SEPTEMBER 1979

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Table I. Evaluation of Tracking ADC Relative to Analog OA disadvantages (1)cost

advantages (1) Can be used as ADC

( 2 ) Can only follow

( 2 ) Internal gain essentially

infinite when difference signal is present at inputs

relatively slow signal ( 3 ) Control resolution might not be as fine

( 3 ) Bandwidth easily and

similarities (1)Input characteristics determined by input difference amplifier ( 2 ) Control system can be turned on or off

under digital control

accurately controlled by digital clock

as analog OA

( 4 ) Slew rate at turn-on

independent of bandwidth ( 5 ) Control signal can be

maintained indefinitely where continuous active operation is not feasible (track/infinite hold)

COMPARATOR +1/4 L S B

COMPARATOR -1/2 LSB

COMPARATOR "up"

bt

1

"DOWN" COMPARATOR

1

1

1

0 COUNT UP

B

t STOP

: C O U N T DOWN

Figure 3. Comparator logic. (A) Threshold levels at comparator (+) inputs. Positive feedback causes levels to change as hypothetical signal from difference amplifier (diagonal line) crosses each threshold. (B) Comparator outputs under same conditions and their effect on the function of the counter gates

reference input of the TADC DAC to give the TADC system variable full scale output in measurement or control applications. The extra operational amplifiers are uncommitted, and can be configured in any way the user desires, although they are usually used as current-to-voltage converters on the outputs of the two DACs in the system. The computer can turn the TADC system on or off under software control, check the status (counting up, counting down, in balance) of the TADC via the 7474 flip-flop outputs, write to the extra DAC for control applications, and read the TADC digital output for measurement applications. The functions of the TADC can be altered simply by changing a set of jumpers connected to appropriate points in the system.

RESULTS AND DISCUSSION Advantages and Disadvantages of the TADC. The advantages and disadvantages of the TADC relative to the OA are summarized in Table I. Although it is possible to substitute the TADC for an OA in virtually any application, the TADC does have some limitations which make its use undesirable in certain situations. Cost will in general favor the OA. A TADC as described here will generally cost from $15-$50, with the DAC making up the bulk of the price. The TADC cannot follow very fast signals. A typical OA will follow signals of DC to -1 MHz in measurement applications. In control applications, this bandwidth may be somewhat reduced, depending on the response characteristics of the system under control. The response of the TADC depends on both the clock frequency and the step size of the

DAC (change in output for 1LSB change in input). A typical 8-bit TADC will follow a i l 0 - V sine wave input of -2.0 kHz with a 1 MHz clock. As resolution is increased, the output bandwidth is reduced accordingly. The control and measurement resolution of the TADC may not be as fine as that of an analog OA, but this problem can be overcome through the use of resolution enhancement (6). For the bulk of applications, a 12-bit DAC in the TADC circuit will provide sufficient resolution. These disadvantages notwithstanding, the TADC has a number of unique features which make its use advantageous in certain situations. Since the TADC must ultimately use an analog signal as its primary feedback, a TADC measurement system is capable of supplying both analog and digital representations of input signals. This would require no components other than those of the TADC. Because the rate of change of voltage or current a t the analog output (or count a t the digital output) is controlled directly by the input clock frequency, the bandwidth of the TADC is directly under digital control. In measurement applications, this means that the TADC can provide filtering of the input signal. The frequency response of this filter may be varied over orders of magnitude by simply changing the clock frequency. To obtain the same type of versatility from an all-analog system would require a large number of passive components and a cumbersome switching arrangement. In control applications, the digital bandwidth control feature of the TADC allows one to quickly and accurately match the response of the servo system to the controiled system. Thus, it is possible to maximize the response of the TADC servo system while avoiding overshoot and ringing. If the up/down count gate is closed via the external control option, the system is turned off. The counter will hold the count which was present after the last clock edge was gated, and the analog output will thus hold its value until the gate is again opened. When operated in this fashion, the TADC acts as a track-and-infinite-hold amplifier. The infinite hold is a direct result of the digitally encoded nature of the analog output. One may use this feature to construct a peak detector, for example, with the added advantage of direct digital readout. Another aspect of the infinite hold capability is its use in control circuitry. In situations in which it is necessary to control a given variable continuously, but it is not possible to monitor the controlled variable continuously, one typically uses some type of capacitive hold element to maintain the control signal. Since this type of system is plagued by capacitor and OA leakage currents, it is necessary to sample the

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ADC

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