Instrumentation
Discrete Time Analog Signal Processing Devices Gary Horlick Department of Chemistry University of Alberta Edmonton, Alta., Canada T6G 2E1
A new class of integrated circuits (IC) t h a t has exceptional potential for performing sophisticated real time analog data processing operations is just beginning to become available. With these new devices an analog signal can be sequentially sampled, and each sample stored as an analog level in the device. Some devices can store over 1000 samples, but storage capacities in the range of 100-200 are more common. T h e analog levels can be sequentially read out, and in some devices parallel readout of the storage cells is possible. T h u s , these devices can be thought of as analog shift registers or delay lines with serial electrical input and serial (Figure la) or parallel (tapped) electrical outputs (Figure lb). There are a host of important applications for such devices. These applications are based primarily on two types of operations t h a t can be implemented on analog signals with discrete time analog signal processing devices. T h e first basic type of operation is the short-term storage and hence' delaying of analog signals. T h e development of an analog delay line has been a long desired goal of electronic engineers, and no truly effective solution had been found for this problem until the recent development of analog delay lines in integrated circuit form. A former approach might have involved analog-to-digital conversion of the signal, storage in a digital shift register memory, and readout via a digital-toanalog converter, i.e., a transient recorder. T h e development of analog delay lines in integrated circuit form has reduced the transient recorder to a 16-pin IC. Applications abound in the communication, audio, and video fields for short-term signal storage, time base compression and expansion, reverberation, speed change or correction, and video delay. Although conceptually simple operations, they are difficult to perform by all electronic means.
Figure 1. Block diagram of analog delay line (a) and tapped analog delay line (b)
Another major application area is correlation instrumentation. In the implementation of auto- and cross-correlations, signals frequently must be delayed or stored for short periods of time. T h e second basic operation implemented with these devices is transversal filtering. Although the idea of transversal filtering is not particularly new (7), the direct implementation of a transversal filter on an analog signal has been difficult because of the need to temporarily store a short section of the analog signal. The nature of a transversal filter as constructed from a tapped analog delay line is shown in
Figure 2. The output of a transversal filter is the weighted sum of several sequential signal values, i.e., a crosscorrelation. Several sophisticated and powerful filtering operations can-be performed directly on analog signals with such a filter. Some typical t a p weights are shown in Figure 3. With the t a p weights shown in Figure 3a, the most recent signal value is given the most weight, and the past signal values are given exponentially decreasing weight—in other words, the signal is low pass filtered. In many cases a conventional low pass filter response is undesirable. Unique "low pass" filter
ANALYTICAL CHEMISTRY, VOL. 48, NO. 9, AUGUST 1976 · 783 A
Figure 2. Transversal filter
responses, shown in Figure 3b (double-side exponential) and c (sin x/x), are clearly easy to achieve with a tapped analog delay line. These filters are smoothing filters, but they will not skew peak-like signals as will a conventional low pass filter. The tap weights shown in Figure 3d are for a first derivative filter and in Figure 3e for a bandpass filter. The bandpass can be tuned by varying the clock rate on the tapped analog delay line. Analytical chemists are perhaps most familiar with this type of filtering in terms of Savitzky-Golay filters (2) which are digital transversal filters. In fact, the tap weights shown in Figure 3d are those of a SavitzkyGolay 11-point first derivative filter. This general type of filtering has been widely applied to chemical signals both directly and in the Fourier domain (3) by use of digital computers. The potential advantages of performing transversal filtering in real time with a tapped analog delay line IC chip are truly overwhelming. Matched filtering, tunable notch and bandpass filtering, cross-correlations, pattern recognition, low and high pass filtering, and resolution enhancement can all be implemented with ease by use of a transversal filter. The technology of these new integrated circuits is based on devices such as diode arrays, charge coupled devices (CCD's), and bucket brigade devices (BBD's). Over the last few years, such devices have been developed primarily as all solid-state electronic image sensors (4-6). Linear image sensors based on these devices can be considered as analog shift registers with parallel optical inputs and a serial electrical output. Although imaging applications have dominated, many workers have utilized these devices for analog signal processing, and
applications in this area are rapidly increasing. In the next sections these integrated circuit technologies will be discussed from the point of view of analog signal processing capability. Bucket Brigade Devices
Figure 3. Typical tap weights for transversal filter
The bucket brigade device was developed directly in response to the need for a simple and effective analog shift register that could be made as an integrated circuit (7, 8). The basic nature of the bucket brigade device can be illustrated with the three-element bipolar BBD shown in Figure 4a. The signal samples (V\, V", V s lu ) are
stored on capacitors interconnected by transistor switches. Note that only half of the elements store signal samples, capacitors C2, C4, and Ce. The other capacitors (Ci, C3, and C5) are all charged to + V volts which are fed into the array by transistor Q7.
Figure 4 . (a) S c h e m a t i c of bipolar bucket brigade device, (b) S c h e m a t i c of MOS bucket brigade device (p-channel)
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Assume t h a t a new signal sample ( V, < V) is present on t h e i n p u t ca pacitor C I N as t h e first cycle of t h e two-phase clock starts. P h a s e φ\ of t h e clock t u r n s on transistors Qi, Q :! , and Q 5 by raising t h e base voltage to + V volts. T h i s , in t u r n , raises t h e voltage a t t h e collector of each of these t r a n sistors to + 2 V volts as each associ ated capacitor was initially charged to + V volts. Concentrating on transistor Qi, c u r r e n t now flows from Ci to C I N until t h e voltage on C I N is equal t o + V volts at which point t h e base-emitter junction of t h e N P N transistor ceases to be forward biased. T h e voltage re maining on capacitor Ci is V — (V — V s ) = Vs. T h u s , in effect, t h e signal m a g n i t u d e has been transferred to ca pacitor C] by charge deficit transfer in a direction opposite to t h e a p p a r e n t signal movement. T h e second phase of the clock transfer (φ2) shifts t h e signal value to capacitor C2 and recharges capacitor Cj to + V volts. Although originally conceived in t e r m s of a bi polar device, t h e bucket brigade con cept was soon implemented with M O S technology which uses field effect transistors for switches (8, 9). A M O S bucket brigade device is shown in Fig ure 4b. T h u s , t h e basic B B D is effectively an analog shift register. In addition to signal delay applications, there was, at t h e time t h e B B D was developed, con siderable interest in t h e development of an all solid-state image sensor. It was recognized by t h e early workers t h a t t h e b u c k e t brigade architecture could provide a solution to t h e prob lem of scanning an array of photodiodes, and m a n y of t h e first applica tions of B B D ' s were in this area (10). T o convert t h e bucket brigade de vice to a t a p p e d analog delay line for transversal filtering applications, some m e a n s of tapping off t h e signal values at specific delays are required. Sangster (8) discussed a t a p p e d con figuration for t h e B B D , and more re cently a design has been presented in which source followers are connected directly to t h e storage capacitors to t a p off t h e signal values (11, 12). T h i s results in a binary weighted t a p p e d analog delay line in which each t a p weight can either be 0 or 1. Such a " n o n w e i g h t e d " transversal filter is just a b o u t as useful and powerful as a fully weighted version. Examples are presented in refs. 11 a n d 12 of matched correlation filters for signal detection with a binary weighted tapped analog delay line. Also bucket brigade devices with a limited n u m b e r of taps spaced down t h e delay line are useful for some types of transversal filtering. A tunable b a n d p a s s filter has been built from a 20-stage B B D with only two taps, one at stage 10 and t h e second at stage 20 (13), and a tunable
matched filter for pulse-code modula tion has also been built using B B D ' s and only two taps (14). In a recent interesting application of BBD's as delay lines, a T V ghostsuppressor circuit has been built (15). T h e B B D is used to store a synthetic ghost generated from t h e received sig nal t h a t can be used to subtract out the real ghost. Several bucket brigade devices are now available commercially from Reticon Corp., 910 Benicia Ave., Sunny vale, Calif. 94086. T h e y have single and dual 512-element analog delay lines a n d a 64-element t a p p e d analog delay line. Only binary weights (0 or 1) can be applied to each t a p p e d value. Charge Coupled Devices
T h e charge coupled device (76, 17) is a relatively new concept in integrat ed circuit technology and has applica tion to both analog delay (18, 19) and solid-state imaging (4, 20) devices. Unlike t h e bucket brigade device, there is no discrete component analog for t h e charge coupled device (CCD). T h e CCD concept involves storage and shifting of charge in potential wells at t h e surface of a semiconduc tor. T h e nature and operation of a three-phase CCD are shown in Figure 5. T h e device consists of a n array of metal-insulator-semiconductor capac itors. T h r e e capacitors constitute one effective storage cell. Charge is stored by making one set of electrodes more positive t h a n the other two sets (Fig
ure 5a) and shifted by making t h e ad jacent set more positive (Figure 5b). T h u s , t h e device is an almost ideal an alog shift register. Charge can be introduced into t h e CCD by photon generated electronhole pairs; thus, it can be used as an image sensor. In fact, most of t h e ini tial interest in these devices centered around their image sensing capabili ties (4, 20). However, charge in t h e form of samples of an analog signal can also be introduced electronically with a diode and gate electrode (19), and considerable interest is now being generated by t h e potential application of these devices to analog signal pro cessing (21-23). T h e use and charac teristics of CCD's for delaying analog signals have been discussed in detail (19). As with bucket brigade devices, CCD's are being developed with t a p p e d o u t p u t s and applied to matched filtering (24) and cross-corre lation signal processing (25). Charge coupled devices with analog inputs are not yet readily available in a range of configurations. Some types of devices are available from Fairchild Semiconductor, 464 Ellis St., Moun tain View, Calif. 94040. An interesting CCD device is available from G E C Semiconductors Ltd., E a s t Lane, Wembley, Middlesex, England H A 9 7 P P . It is a 100-element CCD (CD100) t h a t can be used both as a line imager a n d as an analog delay line, i.e., it is capable of accepting both optical and electrical inputs.
Figure 5. Schematic of CCD analog shift register storage (a) and transfer modes (b) ANALYTICAL CHEMISTRY, VOL. 48, NO. 9, AUGUST 1976 · 785 A
Silicon Diode Arrays
In the late 1960's, considerable ef fort was under way to develop all solid-state image sensors. One type of semiconductor architecture that was successful before CCD's and BBD's were developed was an array of silicon photodiodes with on chip shift register controlled electronic scanning (26-28). The nature of silicon photodiode ar rays and their use in scientific and in dustrial applications have recently been reviewed (5, 29). Devices of this nature are now available as analog delay lines, serial analog memories, and tapped analog delay lines from Reticon. The nature of a serial analog memory (SAM-128V) based on diode array technology is illustrated in Fig ure 6. The device consists of an array of capacitors (ρ η junction diodes) ac cessed by FET switches which are controlled by shift registers. The gen eral architecture of these devices is fundamentally different from that of the BBD's and CCD's where scanning is controlled by phased clocks. Fry discusses these various scanning methods in his review (5). For the SAM-128V, readin is controlled by a 128-bit digital shift register and read out by an independent 128-bit digital shift register. On readin, FET A (see stage 1 in Figure 6) is closed, charging the capacitor. On readout, FET Β is closed, supplying power to FET C which then acts as a source follower to nondestructively read out the value of the analog signal stored on the capaci tor. Even though readout is nonde structive for this particular device, the memory must still be considered "dy namic" in the sense that the signal level on the capacitor is degraded by what amounts to be "dark" current, i.e., thermally generated electron-hole pairs; thus, the memory must be peri odically refreshed. Storage time at room temperature is rated at about 40 ms for the SAM-128V, although a new device (SAM-128 Lit) is now available with a room temperature retention time of 5 s. The architecture of the serial analog memory makes it considerably more versatile than the simple CCD and BBD analog delay lines. For example, zero "delay" is possible since a read out cycle can be initiated simulta neously with a readin cycle. With an analog delay line based on a true ana log shift register approach, the mini mum delay is that time necessary to clock a sample through the complete register. The SAM is more flexible in that not only is zero delay possible but also any delay in units of clock period up to the retention time limitations of the device. This feature has facilitated the construction of an autocorrelator for processing noisy periodic signals
Figure 6. Schematic of serial analog m e m o r y (SAM)
Figure 7. Tapped analog delay line. Resistor sizes proportional to reciprocal of tap weights given in Figure 3d
based on the SAM-128V (30). Because of the flexibility of the shift register control, the SAM can be used as a binary weighted tapped analog delay line. If a bit exists in the nth stage of the readout shift register, then the nth storage cell will be read out. If a specific binary sequence is clocked into the readout shift register, the output will be the summation of the products of the binary sequence and the stored analog signal values. This amounts to the rapid cross-corre lation of a stored analog signal with a binary sequence. This type of correla tion is particularly applicable to pat tern recognition. Another variation of the serial ana log memory is the analog random ac cess memory (ARAM-64). In this de vice the readin shift register is re placed by a 6-bit readin address de coder allowing random access to the storage cells on the readin cycle. Readout is still sequential. Operations such as first-in last-out can be imple mented which reverses a signal in time. This is necessary for convolution data processing. Speech scrambling and security systems are clearly other application areas for this device.
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A fully weightable tapped analog delay line (TAD-12) is also available from Reticon. Its architecture is not, however, a series of taps along a sim ple analog delay line, but it is com posed of 12 separate delay lines. The first has one effective storage cell, and the subsequent delay lines are each two storage elements longer than the previous delay line. The analog signal is fed simultaneously to all delay lines, and the "taps" are really the outputs of the 12 analog delay lines. Delays of 1, 3, 5, 7 . . . 23 clock periods are possi ble. Weighting is achieved simply by summing the tap outputs through ap propriate resistors into an operational amplifier or amplifiers. The tap weight is proportional to the recipro cal of the resistor value. A simple transversal filter constructed from a TAD-12 is shown in Figure 7. The tap weights correspond to those shown in Figure 3d. Conclusions
Clearly discrete time analog signal processing devices are destined to be widely employed in scientific mea surements and instrumentation. They
provide powerful analog signal pro cessing capability in simple integrated circuit packages. In particular, the tapped analog delay line is uniquely applicable to filtering in the most gen eral sense. The devices now available represent only the first generation (31). Device complexity and charac teristics are sure to improve in the fu ture, which will extend even further the power and utility of these devices.
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References (1) H. E. Kallmann, Proc. IRE, 28,302 (1940). (2) A. Savitzky and M.J.E. Golay, Anal. Chem., 36,1627 (1964). (3) K. R. Betty and Gary Horlick, Appl. Spectrosc, 30, 23 (1976). (4) D. F. Barbe, Proc. IEEE, 63,38 (1975). (5) P. W. Fry, J. Phys. E: Sci. Instrum., 8, 337 (1955). (6) Yair Talmi, Anal. Chem., 47, 697A (1975). (7) F.L.J. Sangster and K. Teer, IEEE J. Solid State Circuits, SC-4,131 (1969). (8) F.L.J. Sangster, Philips Tech. Rev., 31, 97 (1970). (9) W. J. Butler, M. B. Barron, and C. M. Puckette, IEEE J. Solid State Circuits, SC-8,157 (1973). (10) P. K. Weimer, M. G. Kovac, F. V. Shallcross, and W. S. Pike, IEEE Trans. Electron Devices, ED-18, 996 (1971). (11) D. D. Buss, W. H. Bailey, and D. R. Collins, Electron. Lett., 8,106 (1972). (12) D. D. Buss, D. R. Collins, W. H. Bai ley, and C. R. Reeves, IEEE J. Solid State Circuits, SC-8,138 (1972). (13) D. A. Smith, C. M. Puckette, and W. J. Butler, ibid., SC-7,421 (1975). (14) W. N. Waggener, IEEE Trans. Com mun., COM-23, 394 (1975). (15) W. J. Butler, C. M. Puckette, and N. C. Gittinger, IEEE J. Solid State Cir cuits, SC-10, 247(1975). (16) W. S. Boyle and G. E. Smith, Bell Syst. Tech. J., 49, 587 (1970). (17) G. F. Amelio, M. F. Tompsett, and G. E. Smith, ibid., ρ 593. (18) M. F. Tompsett, G. F. Amelio, and G. E. Smith, Appl. Phys. Lett., 17, 111 (1970). (19) M. F. Tompsett and E. J. Zimany, IEEEJ. Solid State Circuits, SC-8, 151 (1973). (20) G. F. Amelio, W. J. Bertram, Jr., and M. F. Tompsett, IEEE Trans. Electron Devices, ED-18,986 (1971). (21) J. J. Tiemann, W. E. Engeler, R. D. Baertsch, and C. M. Brown, Electronics, 47(23), 113(1974). (22) L. Altman, ibid. (16), ρ 91. (23) H. F. Benz and C. Husson, Proc. IEEE, 63,822(1975). (24) D. R. Collins, W. H. Bailey, W. M. Gosney, and D. D. Buss, Electron. Lett., 8 (13), 328 (1972). (25) J. J. Tiemann, W. E. Engeler, and R. D. Baertsch, IEEE J. Solid State Cir cuits, SC-9, 403 (1974). (26) G. P. Weckler, Electronics, 40 (9), 75 (1967). (27) R. H. Dyck and G. P. Weckler, IEEE Trans. Electron Devices, ED-15, 196 (1968).. (28) P.J.W. Noble, ibid., p 202. (29) Gary Horlick and E. G. Codding, in "Analytical and Clinical Chemistry: A Series of Current Topics", G. M. Hieftje and D. Hercules, Eds., Plenum, New York, N.Y., in press. (30) K. R. Betty and Gary Horlick, Anal. Chem., submitted for publication. (31) D. Ludington and H. Lobenstein, Electronics, 49 (10), 98 (1976).
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