AC-Impedance Spectroscopic Analysis on the Charge Transport in

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AC-impedance spectroscopic analysis on the charge transport in CVD-grown graphene devices with chemically modified substrates Bok Ki Min, Seong Ku Kim, Sung Ho Kim, Min-A Kang, Suttinart Noothongkaew, Edmund Martin Mills, Wooseok Song, Sung Myung, Jongsun Lim, Sangtae Kim, and Ki-Seok An ACS Appl. Mater. Interfaces, Just Accepted Manuscript • DOI: 10.1021/acsami.6b03705 • Publication Date (Web): 30 Aug 2016 Downloaded from http://pubs.acs.org on September 10, 2016

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ACS Applied Materials & Interfaces

AC-impedance spectroscopic analysis on the charge transport in CVD-grown graphene devices with chemically modified substrates Bok Ki Min,†,‡ Seong K. Kim† , Seong Ho Kim†, Min-A Kang†, Suttinart Noothongkaew†, Edmund M. Mills§, Wooseok Song†, Sung Myung†, Jongsun Lim†, Sangtae Kim§, and Ki-Seok An†*

†

Thin Film Materials Research Center, Korea Research Institute of Chemical Technology

(KRICT), Yuseong P. O. Box 107, Daejeon 305-600, Republic of Korea ‡

Department of Physics, Sungkyunkwan University, 2066 Seobu-ro, Jangan-gu, Suwon-si,

Gyeonggi-do 440-746, Republic of Korea §

Department of Chemical Engineering and Materials Science, University of California, Davis,

California 95616-5294, United States

KEYWORDS CVD-grown graphene, ac-impedance spectroscopy, self-assembled monolayers (SAMs), charge transport, ac conduction

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ABSTRACT A comprehensive study for the effect of interfacial buffer layers on the electrical transport behavior in CVD-grown graphene based devices has been performed by ac-impedance spectroscopy (IS) analysis. We examine the effects of the trap charges at graphene/SiO2 interface on the total capacitance by introducing self-assembled monolayers (SAMs). Furthermore, the charge transports in the polycrystalline graphene are characterized through the temperature-dependent IS measurement, which can be explained by the potential barrier model. The frequency-dependent conduction reveals that the conductivity of graphene is related with the mobility, which is limited by the scattering caused by charged adsorbates on SiO2 surface.

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Graphene has attracted a lot of attention as a potential material for the next-generation nanoelectronics devices due to its exceptional transparency, flexibility, mechanical strength, and extremely high carrier mobility associated with its linear dispersion relationship.1-5 Typically, there are three methods to synthesize the single layer graphene: exfoliation from bulk graphite,6 thermal decomposition of silicon carbide (SiC),7 and chemical vapor deposition (CVD) on copper (Cu) foil as the catalyst.8, 9 Among these methods, the CVD technique is the most suitable for industrial large scale growth. However, graphene produced by CVD technique typically contains the structural disorders with relative small domain size compared to exfoliated graphene samples.10 Due to its polycrystalline structure, the charge transport in CVD-grown graphene is limited by the grain boundary with relatively high potential barrier.11-15 Especially, for the CVD-grown graphene-based field effect transistors with typical SiO2 as the gate dielectric layer, the device performance is limited by the interaction between the graphene and SiO2 such as the electron-hole fluctuation caused by the charged adsorbates on SiO2 surface.16-19 To avoid the performance degradation by extrinsic scattering from graphene/SiO2 interface, the interface engineering techniques such as introducing the selfassembled monolayers (SAMs) between the graphene and SiO2 substrate were often considered.19-22 In this regard, a comprehensive study on the charge transport mechanism in CVD-grown graphene affected by the structural disorder and the charge interaction when in contact with other materials is very important. In many research groups, the charge transport mechanism was investigated through the electrical measurement by dc signals.11-15 However, the dc measurements have number of limitation to be used for analysis of the interfacial properties in graphene-based devices. In contrast, the electrical properties and their interfaces in contact of the graphene-based electrical devices can be effectively studied with alternating-

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current (ac) impedance spectroscopy (IS), if an appropriate equivalent circuit model is available. Recently, some researchers have attempted to uncover the interfacial phenomena at low-dimensional contacts such as the graphene/semiconductor interface23, 24 and the dielectric with graphene interlayer using the IS analysis.25 These results successfully showed that the IS analysis is a powerful method to study the interfacial issues even in low-dimensional materials. In this report, we investigate the effect of the interfacial buffer layers on the electrical transport behavior in CVD-grown graphene based devices using IS. An appropriate equivalent circuit model for graphene devices with the typical SiO2 as gate dielectric is proposed. As will be demonstrated below we have successfully unveiled the variation of trap charge capacitance in graphene devices with chemically modified substrates. In addition, the ac and dc conduction in CVD-grown graphene device could be characterized through the temperature-dependent IS measurement. Our observation indicates that the mechanism of the dc conduction can be explained by a potential barrier model; the charge carrier transport through graphene is due to the thermionic emission at high temperature and tunneling at low temperature across the grain boundaries.11 In parallel, the dominant ac conduction occurs via transfer of charge carriers through the quantum-mechanical tunneling process. Also, the frequency-dependent conduction suggests that the conductivity of graphene is directly proportional to the mobility of the charge carrier limited by the scattering caused by charged adsorbates on SiO2 surface rather than the variation of the carrier concentration due to charge transfer. In order to observe the effect of self-assembled-monolayers (SAMs) on the electrical performance of the graphene devices, two different SAMs were used as the buffer layer between graphene and SiO2 as shown in schematic in Figure 1a. Two SAMs used in this 4


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study are HMDS-which is known to have chain length of C1 (length of a single carbon)-and OTS with chain length of C8. The chemical structures of the SAMs are shown in Figure 1b. The formation process of SAMs is described in the experimental section. The optical image of the completed graphene device is shown in Figure 1c. The XPS analysis was employed to identify the presence of SAMs on SiO2 surface. Figure 1d and 1e show the C 1s spectrum for HMDS (OTS) on SiO2, graphene on SiO2, and graphene on HMDS (OTS) treated SiO2 corresponding to peak position at 285.3 eV, 284.7 eV, and 285 eV. For HMDS (OTS) and graphene on SiO2, the C 1s spectrum is mainly dominated by the sp3 hybridized carbon bonding27 and sp2 carbon bonding, respectively. Thus, the C 1s spectrum of graphene on HMDS (OTS) treated SiO2 is slightly shifted toward high binding energy compared to that of graphene on SiO2 probably due to the superposition of two peaks. The result of XPS analysis of the C 1s core level for each sample obtained by the fitting procedure is explained in Supporting Information (Figure S1). Raman spectroscopy was performed on graphene on untreated SiO2, HMDS, and OTS as shown in Figure 1f. The characteristic graphene fingerprints, including the G-, and 2D-bands, were observed from all samples. Raman spectrum for untreated graphene showed two major peaks, a G-band peak at 1599 cm-1 and a 2D-band peak at 2697 cm-1. In Raman spectra for graphene, the positions of 2D- and G-band, the intensity ratio of 2D- and G-band, and a full width at half maximum of 2D-band are sensitively dependent on the doping level of graphene.19 The graphene on SAMs showed slight red-shifting of G-bands and 2D-bands compared to the untreated graphene. Furthermore, the graphene on OTS was noticeably more red-shifted than the graphene on HMDS. The ratio between the intensity of 2D- and G-band increases with increasing the alkyl chain length of SAMs(untreated < HMDS < OTS). Whereas, the full width at half

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maximum of 2D-band trends to opposite behavior (Figure S2). These results imply that the Fermi level of both samples was up-shifted than that of the untreated graphene, because the SAMs treatment can efficiently screen the hole-doping effects from the interaction between the graphene and SiO2.20 Prior to analysis of the charge carrier transport for graphene devices with SAMs treated SiO2, we performed the IS measurement on a standard graphene device with SiO2/Si substrate to define a proper equivalent circuit for the impedance analysis. A set of AC potential with the amplitude of 50 mV in the frequency range of 102 to 107 Hz was laterally applied across the graphene devices with different distances between the electrodes on the graphene (600, 1000, and 1400 µm) and the number of graphene layers (single and bi-layer). The obtained impedance spectra had a general RC-type shape shown in Figure 2a and b, where one semicircle which starts at a positive non-zero real impedance value was observed. The plot implies that at least two set of elements in series should exist in the equivalent circuit: one resistive element representing the contact resistance ( ) from the electrode-graphene junction and a RC (a resistive and a capacitive elements in parallel) element. Since the SiO2 layer is insulating, the resistive element in the RC is expected to be from graphene; thus, it is named as the graphene resistance ( ). As shown in Figure 2a and Figure 2b, the is dependent on the channel length and the number of graphene layers, clearly indicating that is resistance related to graphene. On the other hand, the capacitive element is complicated, because the total capacitance ( ) may be from the quantum capacitance ( ) related to the density of state near Dirac point of graphene, the trap charge capacitance ( ) from the trapped charge layer formed at the graphene/SiO2 interface, and the substrate capacitance ( ) from SiO2. However, is smaller than which implies that cannot contribute to . 6


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Thus, we suggest an equivalent circuit as shown in Figure 2a (inset) for the graphene device. The variation of will be mainly made by the trap charge density at graphene/SiO2 interface. The contribution of the capacitance from the graphene’s grain boundary can be also considered because of its polycrystalline structure. However, the charge transport from one domain to another in graphene might be dominated by the tunneling process (discussed later in this paper). Furthermore, is constant when dc bias in a range of 0 – 1 V is applied and increases when increasing the area of contact electrodes (Figure S3). These results indicate that the capacitance from the graphene’s grain boundary can be neglected, so that is mainly attributed to the substrate (e.g. SiO2 layer). In order to examine the interfacial properties induced by the trap charges at graphene/SiO2 interface, a comparison study was done between graphene with SAMs treated substrate mention above and the untreated sample (Figure 3a). Using the equivalent circuit shown in Figure 2a, each of the impedance spectra was fitted to obtain and as well as . and values obtained from the fitting result for each of the sample are plotted in Figure 3b. Just as the total resistance, is lower when the device is treated with SAMs than untreated sample, and it also decreases with increasing chain length of the SAM molecule. On the other hand, is higher for SAMs treated samples, and increases with increasing chain length. The same trend was observed from the contact resistance obtained from TLM method, which is shown in Figure 3c. for each sample is also obtained from the impedance fitting and plotted in Figure 3d. As shown in Figure 3d, obtained is higher for untreated sample compare to the SAM samples, and the value decreases with increasing chain length. The variation of trap charge density at graphene/SiO2 interface can reflect the change of , because and are in parallel. Since the SAMs with longer alkyl chain length can 7



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prevent the effect of dipolar contaminants on SiO2 surface more efficiently, the Fermi level of graphene on SAMs would be up-shifted compare to that of graphene on untreated SiO2 (initially p-doped). Thus, the contact resistance increases due to the increase of the potential barrier at graphene/metal electrode interface. On the other hand, the conductivity of graphene is influenced by the complex of the mobility and carrier concentration. At this point, the mobility is dependent on the electron scattering due to the change of carrier concentration and the scattering caused by trapped charges at graphene/SiO2 interface.21 In conclusion, the variation of graphene conductivity might be more susceptible to the change of mobility, which is limited by the scattering from the charged adsorbates on SiO2 substrate, rather than the depletion of the carrier concentration in graphene. The evidence to support this hypothesis will be examined by the frequency-dependent conduction characteristics in later. As explained in above, the resistance can be separated to the contact and the graphene resistance through the IS analysis. For these types of system, the IS analysis is advantageous because it is possible to study the charge transport in graphene without the contact issues in metal electrodes. Also, beside the dc transport, the ac transport in graphene can be identified. At first, the mechanism of dc conduction was investigated through the temperaturedependence of which is obtained by measuring the impedance in temperature range of 83 – 293 K (Figure S4). For Arrhenius relation, there are two distinct temperature dependent features as shown in Figure 4a. One is the temperature independent region in the low temperature, while the linear temperature dependence can be observed in the high temperature region. The high temperature conduction follows a thermally activated mechanism, while at low temperatures the temperature dependence essentially disappears. This is evidence of a shift to a tunneling mechanism. In general, the temperature dependence 8


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of indicates that the resistance of the graphene is controlled by the grain boundary. These results provide insight into the conduction mechanism of conduction across grain boundaries. The activation energy which is to overcome the potential barrier at grain boundaries can be extract from the Arrhenius equation 1⁄ ∝ − ⁄2 )11, where is the activation energy and is the Boltzmann constant. The activation energy from the Arrhenius relation is approximately 3 meV. This value is consistent with the previous results.10, 11 In CVDgrown graphene with polycrystalline structures, the dominant conduction mechanism can be explained by the potential barrier model. In addition, the ac conduction was examined through the Bode plot which displays the frequency dependence of the real part of the ac conductance. Figure 4b shows the real part of the ac conductance ( ) as a function of the frequency in the log scale at room temperature for the graphene devices with chemically modified substrates. As shown in figure 4b, remains constant up to a characteristic frequency and follows a power-law dependence in form of ∝ , for > . These observations indicate that the ac conduction in graphene devices can be explained on the basis of universal ac conduction expression as follows: ") = $ + &" ,28,

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where, ") is the real part of ac conductance, $ is the dc-

conductance, & is a constant, " is the angular frequency of applied field, and ' is the frequency exponent. The variation of s with temperature in disordered materials is shown to be critically dependent on the ac conduction mechanism.28, 29 The dependence of ' with temperature arises from the process which the charge carriers hop the barrier. For the graphene devices with SiO2 substrate, ' is weakly-dependent within the range of temperature (83 – 293 K) and close to unity (Figure 4b inset). That means the dominant ac conduction mechanism in graphene devices is due to charge carriers transport through the 9



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quantum-mechanical tunneling process. We also found that the shift of characteristic frequency is dependent to the chain length of SAM molecules (Figure S5). is shifted toward high frequency when the device is treated with SAMs, shifting furthermore as the chain length of SAM molecules increases. More deeply, the relationship between and $ (1/ ) was satisfied by the form = &$( (Figure S5). The value of was found to be of the order of the unity, implying that the dc-conductance is directly related to the characteristic frequency. This means that the variation of is dominated by variation of carrier mobility (effect from carrier concentration can be neglected); hence, it is limited mainly by the scattering caused by charged adsorbates on SiO2 surface. In summary, we proposed the IS analysis to examine the comprehensive electrical transport behavior and interfacial effects in CVD-grown graphene devices. In graphene device with SiO2 gate dielectric, the total impedance elements can be separated to contact resistance, graphene resistance, and capacitive elements. For capacitive elements, we examined the effects of the trap charge at graphene/SiO2 interface on the total capacitance by introducing SAMs as the buffer layer. As the results, IS analysis successfully disclosed the variation of the trap charge capacitance in graphene device. Furthermore, with the temperature-dependent IS measurement, the potential barrier model dominated by tunneling has been suggested to explain the dc conduction mechanism in CVD-grown graphene. In parallel, the dominant mechanism for ac conduction was shown to be carrier transfer through the quantummechanical tunneling process. Also, the frequency-dependent conduction revealed that the conductivity of graphene is related with the mobility, which is limited by the scattering caused by charged adsorbates on SiO2 surface rather than depletion of carrier concentration due to charge transfer. 10


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ASSOCIATED CONTENT Supporting Information. Experimental details; XPS spectra fitting results of the C 1s core level; I2D/IG ratio and 2D band width from Raman spectra; the variation of the total capacitance as a function of applied dc bias and the area of contact electrodes; result from IS measurement as a function of temperature for the graphene device; the relation of the characteristic frequency and dc-conductivity. This material is available free of charge via the Internet at http://pubs.acs.org. AUTHOR INFORMATION Corresponding Author *E-mail: [email protected]. Author Contributions B.K.M. and K.-S.A. conceived the idea and designed the experiment. S.H.K., and M.-A.K. prepared the graphene samples. B.K.M performed the experimental measurement, analyzed the results, and wrote the paper. S.K.K., J.L., W.S., E.M.M., S.N., S.M., and S.K. advised data analysis and wrote the paper. K.-S.A. supervised research. All of the authors contributed to the final paper preparation. All authors have given approval to the final version of the manuscript. Notes The authors declare no competing financial interest. ACKNOWLEDGMENT 11



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This research was supported by a grant (2011-0031636) from the Center for Advanced Soft Electronics under the Global Frontier Research Program of the Ministry of Science, ICT and Future Planning, Korea.

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Figure 1. (a) A schematic diagram of SAMs located at the graphene/SiO2 interface. (b) Chemical structures of HMDS(left) and OTS(right). (c) An optical top-view image of CVDgrown graphene device used for IS measurement. XPS C1s core spectra for graphene on (d)HMDS and (e)OTS treated SiO2 with graphene on untreated sample for comparison. (f) Raman spectra of graphene on untreated, HMDS-treated, and OTS-treated substrates.

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Figure 2. (a) Nyquist plots obtained from graphene devices with different channel lengths (600, 1000, and 1400 µm) and the proposed equivalent circuit for the graphene device(inset). (b) Nyquist plots for single and bi-layer graphene.

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Figure 3. (a) Nyquist plots from the graphene devices with different SiO2 surface treatment (untreated, HDMS, and OTS treated). (b) The fitting results of contact resistance ( ) and graphene resistance ( ) obtained from IS measurement with different SiO2 surface treatment. (c) Contact resistance ,)* measured using TLM. (d) The fitting results of the total capacitance + of each device.

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Figure 4. (a) Logarithmic plot of temperature-dependent graphene conductance 1/ for graphene device with untreated SiO2/Si substrate (Arrhenius relation). (b) Frequencydependent real conductance, "), of graphene devices with untreated, HMDS, and OTS treated SiO2. Inset shows the temperature dependence of frequency exponent, '.

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Table of Contents Graphic:

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AC-Impedance Spectroscopic Analysis on the Charge Transport in

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