“Sketch and Peel” Lithography for High-Resolution Multiscale

Apr 13, 2016 - Citation data is made available by participants in Crossref's Cited-by Linking service. For a more comprehensive list of citations to t...
0 downloads 0 Views 1MB Size
Subscriber access provided by Illinois Institute of Technology

Communication

“Sketch and Peel” Lithography for High-Resolution Multiscale Patterning Yiqin Chen, Quan Xiang, Zhiqin Li, Yasi Wang, Yuhan Meng, and Huigao Duan Nano Lett., Just Accepted Manuscript • DOI: 10.1021/acs.nanolett.6b00788 • Publication Date (Web): 13 Apr 2016 Downloaded from http://pubs.acs.org on April 14, 2016

Just Accepted “Just Accepted” manuscripts have been peer-reviewed and accepted for publication. They are posted online prior to technical editing, formatting for publication and author proofing. The American Chemical Society provides “Just Accepted” as a free service to the research community to expedite the dissemination of scientific material as soon as possible after acceptance. “Just Accepted” manuscripts appear in full in PDF format accompanied by an HTML abstract. “Just Accepted” manuscripts have been fully peer reviewed, but should not be considered the official version of record. They are accessible to all readers and citable by the Digital Object Identifier (DOI®). “Just Accepted” is an optional service offered to authors. Therefore, the “Just Accepted” Web site may not include all articles that will be published in the journal. After a manuscript is technically edited and formatted, it will be removed from the “Just Accepted” Web site and published as an ASAP article. Note that technical editing may introduce minor changes to the manuscript text and/or graphics which could affect content, and all legal disclaimers and ethical guidelines that apply to the journal pertain. ACS cannot be held responsible for errors or consequences arising from the use of information contained in these “Just Accepted” manuscripts.

Nano Letters is published by the American Chemical Society. 1155 Sixteenth Street N.W., Washington, DC 20036 Published by American Chemical Society. Copyright © American Chemical Society. However, no copyright claim is made to original U.S. Government works, or works produced by employees of any Commonwealth realm Crown government in the course of their duties.

Page 1 of 20

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

Nano Letters

“Sketch and Peel” ” Lithography for HighResolution Multiscale Patterning Yiqin Chen1#, Quan Xiang1#, Zhiqin Li1, Yasi Wang1, Yuhan Meng1 and Huigao Duan1* 1School

of Physics and Electronics, Key Laboratory for Micro-Nano

Optoelectronic Devices of Ministry of Education, State Key Laboratory for Chemo/Biosensing and Chemometrics, Hunan University, Changsha 410082, P. R. China # These

authors contributed equally to this work.

*Address correspondence to: [email protected].

Abstract: We report a unique lithographic process, termed “Sketch and Peel” lithography (SPL), for fast, clean and reliable patterning of metallic structures from tens of nanometers to sub-millimeter scale using direct writing technology. The key idea of SPL process is to define structures using their presketched outlines as the templates for subsequent selective peeling of evaporated metallic layer. With reduced exposure area, SPL process enables significantly improved patterning efficiency up to hundreds of times higher and greatly mitigated proximity effect compared to current direct writing strategy. We demonstrate that multiscale hierarchical metallic structures with arbitrary shapes and minimal feature size of ~15 nm could be defined with high fidelity using SPL process for potential nanoelectronic and nano-optical applications. KEYWORDS: Multiscale patterning, electron-beam lithography, selective 1

ACS Paragon Plus Environment

Nano Letters

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

peeling, nanogaps, plasmonics Reliable definition of artificial micro- and nano-scale structures by lithographic processes such as photolithography1,2, charge-particle direct writing, soft lithography3-5 and nanoimprint6-8 is essential in a variety of fields including electronics9,10, nano-optics11-13, and bio-science14,15. Among these well-developed lithographic methods, electron-beam direct writing (EBDW) is a key enabling technique due to its capability of fabricating original patterns with high resolution and flexibility for fundamental research, device prototyping and photomask manufacturing. With sophisticated tools, resists, software and advanced fabrication strategies16-21, EBDW has already become one of the most popular techniques in research and development of nanoscale science and technology. However, a typical EBDW process to define large-area structures is extremely time-consuming and suffers from proximity effect for the structures with sharp corners or tiny gaps22, and these two issues severely limit the broader applications of EBDW in practice. In this work, we propose and demonstrate a unique lithographic process, termed “Sketch and Peel” lithography (SPL), which can significantly extend the capability of EBDW for fast, clean and reliable patterning of multiscale metallic structures with greatly enhanced efficiency and mitigated proximity effect. The basic fabrication process flow of SPL is schematically shown in Figure 1a. Compared to conventional EBDW process that requires point-topoint exposure of the whole structure to define a solid structure (see detailed 2

ACS Paragon Plus Environment

Page 2 of 20

Page 3 of 20

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

Nano Letters

comparison in Figure S1), the key idea of SPL is that only the outline of the target structure is exposed and the central area is filled by selectively peeling off the evaporated metal layer outside and on the top of the outline. Depending on the applications, the outline could be either remained or removed. In SPL process, if the structure is sufficiently large, the effective exposure area would be significantly reduced up to hundreds of times and thus the total incident electrons could be also minimized for mitigating the proximity effect. In a typical process, after obtaining hydrogen silsesquioxane (HSQ) resist outline template (Figure 1b), a 30-nm gold layer was then evaporated onto the sample without using adhesion layer (Figure 1c). Due to the existence of HSQ template, the deposited gold layer was separated to three parts, i.e., inside, top, and outside of the template, as indicated in Figure 1a-iii. After drop-casting an adhesive polymer on the sample and curing it with UV irradiation, peeling off was then conducted. Due to the weak adhesion, the top and outside gold layer were completely stripped away and only the central gold disks remained (Figure 1d). Note that periodic 1-µm-diameter gold holes were also defined in a stripped gold film on adhesive polymer for inverse patterning, as shown in Figure S2. Figure 1e shows the gold disks after stripping the templates. From the enlarged SEM image in the inset, smooth edges which were determined by the low line-edge roughness of HSQ outline templates can be seen. 3

ACS Paragon Plus Environment

Nano Letters

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

Figure 1. Basic fabrication process of “Sketch and Peel” lithography (SPL). (a) Three-dimensional schematic flow-charts to show the methodology of SPL process. (b-e) The series of four SEM images successively present the corresponding result of 1-µm ring HSQ templates, Au-coated HSQ templates, as-stripped gold disk array, and pure gold disk array with the removal of HSQ rings. The upper-right insets clearly show the corresponding enlarged electron micrographs of single structures in the array. All scale bars are 2 µm.

The yield of the SPL process for above disk array was 100%. Figure S3 shows a dark-field optical image of the entire array including 1600 disks. All defined disks were located at the designed positions, indicating the high fidelity of this process. Particularly, no impurities or residues were seen on the substrate surface from the dark-field optical image, implying that the dry peeling off is a perfectly clean process23.

4

ACS Paragon Plus Environment

Page 4 of 20

Page 5 of 20

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

Nano Letters

Figure 2. The reliability and mechanism analysis of SPL process. (a) Photon-sieve-like pattern formed by circularly arranged gold disks with varied sizes. The size of central disk is 25 µm, and the diameter of other disks from center to edge is 10 µm, 5 µm, 2 µm, 1 µm, 400 nm, 100 nm, respectively. (b) Enlarged SEM image of gold disks arrays at utmost outside of the pattern shown in (a). (1 µm, 400 nm and 100 nm in diameter from bottom to top row). (c) The plot of yield versus disk diameter. (d) SEM images of SPL results of 500-nm-diameter gold disks using closed HSQ rings (i) and split HSQ rings with a small missing length (ii). (e) Plot showing the yield versus missing length in HSQ rings. (f) High-density gold disk array with 360 nm diameter and 140 nm inter-disk space. (g) Plot showing the yield versus interdisk space in arrays. (h-k) The schematics showing two successive possible scenarios during the peeling process: (h,j) three-dimensional view; (i,k) cross-sectional view. The cross-section line was just across the center of disk and along the direction of peeling off, indicated by the grey dashed lines in (h,j). (l) Cross-sectional SEM image of a gold-coated 1-µm-pitch HSQ grating covered by adhesive polymer. (m) High-resolution SEM image showing how adhesive polymer contacted with the gold-coated structures. Scale bar: 10 µm (a); 500 nm (b); 1 µm (d,f,l); 200 nm (m).

Further experiments demonstrate that SPL process is a versatile 5

ACS Paragon Plus Environment

Nano Letters

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

Page 6 of 20

technique for multiscale fabrication. Figure 2a-2b shows a complete photonsieve-like disk array with diameters from 100 nm to 25 µm. With a simple calculation, the actual exposure area in EBDW decreases with a factor of ~

ௗ ସ௪

for a disk, where d is the diameter of the disk and w is the linewidth of the outline. Given a common linewidth of ~15 nm, the actual exposure area of a 25-µm disk could be reduced with a factor up to 400 times, which leads to significant enhancement of the actual patterning efficiency compared to conventional EBDW process. Note that the SPL process can be achieved with existing facility and resists. Therefore, it can be also used as a complementary process to maximize the efficiency of EBL-based patterning in combination with more advanced facilities such as multiple electron-beam lithography24 and more sensitive resists such as chemical amplified resists17. A more detailed statistical study of the yield versus the disk size is plotted in Figure 2c, which shows that 100% yield was obtained for disks from 75 nm to 25 µm. When the disk was larger than 25 µm, the yield decreased when increasing the diameter of the disk. The yield for an array of disks with the diameter of 250 µm was ~ 75% and dropped to be zero for the disks with 500µm diameter (see detailed graphs in Figure S4 and Table S1). We also tested the reliability of SPL process as a function of the peeling rate and found that the peeling rate had no obvious effect on the reliability of SPL process (see detailed statistic plots in Figure S5). To ensure the fidelity of SPL process, the outlines have to be closed. 6

ACS Paragon Plus Environment

Page 7 of 20

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

Nano Letters

Experimental results show that for closed outlines, the yield was 100% for an array of disks with diameter of 500 nm (Figure 2d-i). If outlines were open with a missing part, all designed disks were stripped away during the peelingoff process (Figure 2d-ii), regardless of the azimuthal direction of the open part in the designed layout. A statistical result of the yield versus the length of the missing part is given by Figure 2e and Figure S6, which shows that only closed outlines resulted in 100% yield, while a small missing length of 80 nm, corresponding to an open angle ~ 20°, caused complete peeling off of the inside gold layer. The results imply that tiny gold channels connecting external gold layer and internal gold disks had sufficient mechanical strength and malleability to pull out the internal gold disks. Another important parameter in patterning is the density of structures. SPL process also enables fast patterning of high-density structures. Figure 2f shows a high-density gold disk array (diameter = 360 nm; spacing = 140 nm) fabricated with SPL process. Larger space enabled easier peeling off of the inter-disk gold layer, while too small space would lead to failure of SPL process, as indicated by the plot in Figure 2g. The corresponding SEM images for the statistics are shown in Figure S7. The failure can be ascribed to the insufficient mechanical strength of slim gold stripes confined in the inter-disk space. For denser metallic structures, we may design shared outlines to avoid the possible failure of SPL process, as shown in Figure S8. The peeling-off process of elastic films from solid surfaces is a 7

ACS Paragon Plus Environment

Nano Letters

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

complicated mechanical behavior25-27 and an exact mechanical model describing the peeling off process is still lacking. In SPL process, due to the existence of additional metallic layer and HSQ templates, the peeling-off process in this confined triple layer system is far more complicated, which would highly depend on the dynamic competition between the required debonding force (named as f1) of adhesive polymer from gold surface and the required debonding force (named as f2) of gold film from SiO2 substrate. Herein, a presumable mechanism is proposed based on the experimental evidences and previous theoretical work to qualitatively explain why the central disks are able to remain inside during the peeling-off process and why SPL process fails when the disks are too large. It is known that the formation of an initial breakage, indicated by the blue arrow in Figure 2h-2i, is usually helpful to detach an adhesive film from a surface, at which stress is concentrated against the adhesion force (marked by red arrow at the red region in Figure 2i-2k). For a metallic film having weak adhesion with the substrate, once an initial breakage forms from either sample boundaries or defects, it is quite straightforward to peel it off, which explains why the metallic film outside of the outlines could be easily peeled off. In contrast, if there are no initial breakages at the metal/substrate interface for forming a notch and overcoming the adhesion between the metallic film and substrate, it is difficult to directly pull the film away from the smooth substrate surface. For a closed area in SPL process, though the adhesive 8

ACS Paragon Plus Environment

Page 8 of 20

Page 9 of 20

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

Nano Letters

polymer can fill the cylindrical cavities encircled by HSQ outlines and tightly contact the surface of metallic film (as indicated by the cross-sectional SEM image of the sample in Figure 2l and confirmed by AFM topography in Figure S9), the metallic film would tend to remain in the cavities during the peeling-off process because it was hard to form initial breakages between metallic layer and substrate in such small confined regions. On the contrary, due to the surface tension, the adhesive polymer could not thoroughly fill the HSQ outline/metallic film/adhesive polymer interfacial region, as indicated by the meniscus region in Figure 2m. Previous theoretical work by Sarkar et al.28 and Shull et al.29 indicates the formed meniscuses in a small confined region are able to lead to several orders of magnitude higher stress to facilitate the detach of an elastic solid from the solid substrate. In such a confined system, the required debonding force f1 of the elastic solid from the solid substrate would significantly decrease when the confined region is sufficiently small but would increase when the confined region becomes larger.28 In our system with small HSQ outline diameters (e.g.

D < 25 µm), the required debonding force f1 was supposed to be smaller than the required minimal debonding force f2 to detach gold film from the SiO2 substrate, leading to the scenario shown in Figure 2j-2k, i.e. the central gold disks would remain after the detach of adhesive polymer. However, when the diameter of the confined region became larger (e.g.

D > 200 µm), the required debonding force f1 to detach the adhesive polymer 9

ACS Paragon Plus Environment

Nano Letters

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

would increase and eventually surpass the required debonding force f2 to detach the gold film, leading to a higher possibility of detaching of gold disks during the peeling process of the adhesive polymer, which explains why the yield decreased when increasing the diameter of disks. In this process, the outside gold film can always be stripped away due to the continuity and malleability of the whole outside gold film. In addition, for the metal on the top of the HSQ outlines, after coating of adhesive polymer, the fluidic polymer was supposed to wrap the gold caps and thus was able to provide sufficient mechanical strength to pull them away from the HSQ outlines. Enabled by improved patterning efficiency and mitigated proximity effect, structures could be fabricated over large area with high fidelity and significantly reduced time. Figure 3a shows a gold triangle array with an area of 5 mm × 5 mm which was fabricated in 5 hours using high-resolution HSQ templates. The upper-right inset is the colorful photograph of triangle array. Compared to conventional process that requires more than 50 hours based on the same resist and lithographic parameters (e.g. beam current and writing field), the overall exposure time was reduced more than 10 times. Particularly, the gold triangles have pretty sharp corners with a curvature radius of ~ 5 nm (see Figure S10), indicating the high fidelity of SPL process to reliably define high-resolution metallic patterns. Such sharp corners in metallic plasmonic structures would tremendously improve the capability of light concentration and near-field amplification. 10

ACS Paragon Plus Environment

Page 10 of 20

Page 11 of 20

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

Nano Letters

Though the reliability of SPL process decreases with increasing the size of the structures in our current experiments, it is possible to reliably define multiscale hierarchical structures by filling small structures in large structures. Figure 3b shows a photograph of an array of gold disks with diameter of 500 µm. In each disk, an array of small disks which were defined by smaller outlines were filled (see Figure S11 for details). Due to the existence of many smaller outlines inside, the initial 500-µm-diameter area was divided into many smaller filled cavities. As demonstrated in Figure 2a-2c, smaller cavities have 100% yield. Therefore, this strategy enables the capability for successful definition of hierarchical metallic structures.

Figure 3. . Various gold structures defined by SPL process. (a) SEM image of a gold micro-triangle array with edge-length of 3 µm and pitch of 6 µm. The upper-right inset presents the photograph of the colorful large-area gold triangle array (5 mm × 5 mm). Scale bar: 3 µm. (b) Photograph of gold disks array (10 mm × 10 mm) with 500 µm diameter. Scale bar: 2 mm. (c-f) SEM images of structures with different shapes: flower array in (c) pentagram in (d) the four suits of poker in (e) typical L patterns with optical-proximity-corrected features in photomask in (f). All upper-right insets in panel c to f show the

11

ACS Paragon Plus Environment

Nano Letters

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

enlarged cell of these gold structures. All structures had identical thickness of 30 nm. Scale bar in main images: 2 µm (c,d,e); 10 µm (f). Scale bar in insets: 100 nm (c,d); 500 nm (e); 2 µm (f).

SPL process is a versatile method to define arbitrary structures which have closed outlines, as demonstrated by Figure 3c-3f. Figure 3c shows a symmetric flower-like pattern with clear concave features among the petals, while Figure 3d presents an array of pentacles with sharp corners. Figure 3e shows the four suits in a deck of cards (i.e. diamonds, hearts, spades and clubs), in which all geometrical details were perfectly rendered at the nanoscale without any rounding and blurring due to the benefits from the mitigated proximity effect. Figure 3f shows an array of “L”-shape test patterns with 10 µm of arm length and 1 µm width, in which 200 nm concave and convex corners were added for potential optical-proximity-effect correction. Without using any methods to optimize the dose distribution, these small concave and convex features were clearly and reliably defined, confirming the high fidelity of SPL process for reliable multiscale fabrication. A collection of other structures defined by SPL process is provided in Figure S12. It should be noted that all above metallic patterns with nanometer details are extremely challenging to fabricate with conventional lithographic strategy due to the severe proximity effect. Metallic nanogaps are important building blocks for nano-optics and nano-electronics. With significantly mitigated proximity effect by only exposing outlines, SPL process holds the promise for fast and reliable 12

ACS Paragon Plus Environment

Page 12 of 20

Page 13 of 20

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

Nano Letters

definition of metallic nanogaps. As indicated by Figure 4a, to obtain a nanogap, only two closed outlines require to be exposed and the final nanogap is determined by the shared boundary. Figure 4b and Figure S13e show examples in which gold dimers with tiny gaps were defined using SPL process by following the mentioned designing rule with shared boundary. The gap size of ~ 15 nm in these dimers was defined by shared thin-wall HSQ structure among the gold particles. Such plasmonic dimers demonstrated apparent polarization-dependent Mie scattering spectra and surface-enhanced Raman scattering (SERS), as shown in Figure S14, indicating the strong plasmon coupling between two structures30. Figure 4c presents an array of plasmonic heptamers enabled by SPL process. The diameter of each disk was 200 nm and the gap between the disks was also ~ 15 nm. Distinct Fano resonance dip was observed in the extinction spectrum of these heptamers, as shown in Figure S15, confirming the strong interaction of the seven nanodisks in heptamer31,32.

13

ACS Paragon Plus Environment

Nano Letters

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

Page 14 of 20

Figure 4. Various metallic nanogaps fabricated by SPL process for potential optical and electronic applications. (a) Schematics showing the strategy to define metallic nanogaps with SPL process. (b-d) Representative plasmonic gold structures with ~ 15 nm gaps: plasmonic dimers with diameter of 200 nm and pitch of 1 µm in (b), plasmonic heptamer array with single disk size of 200 nm in diameter in (c), and sliced gold pies with diameter of 1 µm in (d). (e) A zone plate with maximum diameter of 15 µm, and all gaps inside were ~ 15 nm. (f) Nanogap electrodes with the gap of ~20 nm, and the diameter of each pad is 100 µm. (g) High-resolution SEM image showing the nanogap in the electrode pair. Scale bar: 1 µm (b); 2 µm (c); 1 µm (d); 2 µm (e); 20 µm (f). Scale bar in insets: 100 nm (b); 200 nm (c,d).

To further demonstrate the capability of SPL process to define metallic nanogaps, densely packed metallic elements that are impossible to define by existing methods were fabricated. Figure 4d shows an array of gold pies. Each pie had a diameter of 1 µm and was sliced into eight equal parts with sharp corners by eight tiny and uniform nanogaps. Such kinds of plasmonic nanopies have potential application in reshaping vector beam and for polarization-independent

enhancement

of

spectroscopy.

14

ACS Paragon Plus Environment

Figure

4e

Page 15 of 20

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

Nano Letters

demonstrates a metallic zone plate with a diameter of 15 µm. The size of all nanogaps in the zone plate was ~ 15 nm, comparable to the wavelength of extreme ultraviolet, implying its potential application in short-wavelength and even X-ray optics. Nanogap electrodes are of great importance for nanoelectronic and optoelectronic devices33, which could also be directly fabricated by SPL process with high fidelity. As an example, Figure 4f shows a pair of electrode pads that were defined by SPL process. The size of each pad was 100 µm. The gap was measured to be ~ 20 nm (Figure 4g) and smooth edges were obtained. In contrast, it is challenging to achieve sub-20-nm gaps with large electrode pads and smooth edges using conventional lift-off process based on positive-tone electron beam resist due to the severe proximity effect at the gap junction. Note that the yield to obtain such nanogap electrode pairs was not 100% yet in the experiment due to the reduced yield for large disks, as discussed in Figure 2c. However, as a concept, we believe this method will play an important role in the fabrication of gap electrodes by improved SPL process with higher yield for large structures in the future. A library of more metallic nanogaps with different shapes is given in Figure S13 to demonstrate the great controllability of the SPL process for nanogap definition. When using SPL process to define metallic nanogaps, it should be mentioned that though the gap is determined by the high-resolution negative15

ACS Paragon Plus Environment

Nano Letters

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

tone HSQ resist which has an ultimate resolution of 5 nm, the final gap size in our experiments was usually ~ 15 nm because of the following two reasons. On the one hand, sufficient HSQ thickness (typically 100 nm) was required to achieve reliable SPL process and thus the linewidth of HSQ outlines should be larger than 10 nm to avoid the deformation or collapse34. On the other hand, the final gap size was usually a bit larger than the original size of the HSQ template at the gap junction due to the dewetting effect of gold on the substrate surface35,36. Improved processes are required to overcome above limitations to obtain sub-10-nm gaps eventually. In conclusion, we developed a new patterning process termed “Sketch and Peel” lithography (SPL) which are able to fabricate multiscale metallic patterns from tens of nanometers to sub-millimeter scale by electron-beam direct writing (EBDW) with enhanced throughput up to hundreds of times. Due to its fabrication manner by only exposing the outlines of patterns, the proximity effect in EBDW is significantly reduced, enabling reliable definition of metallic structures with high-fidelity shapes and tiny gaps (sub-15 nm). With its high throughput and high resolution advantages, SPL process significantly extends the capability of EBDW for multiscale nanopatterning and may find broad applications in mask manufacturing, nanodevice prototyping and fabrication, and fundamental researches. As a new concept, many efforts are required in the future to understand the mechanism of the process via numerical modeling, extend the work material to semiconductors, 16

ACS Paragon Plus Environment

Page 16 of 20

Page 17 of 20

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

Nano Letters

dielectrics and other metals, and further improve the yield for large patterns via surface adhesion engineering.

ACKNOWLEDGEMENTS We gratefully acknowledge the financial support from the National Natural Science Foundation of China (Grant nos.11274107, 61204109 and 11574078), the Foundation for the authors of National Excellent Doctoral Dissertation of China (201318), and the Natural Science Foundation of Hunan Province (2015JJ1008, 2015RS4024). Thanks to Prof. Dangyuan Lei (The Hong Kong Polytechic University) for FTIR measurement. Meanwhile, we are also grateful to Prof. Karl K. Berggren at MIT and Prof. Joel K. W. Yang (SUTD in Singapore) for useful discussions during this work.

Author contribution: Y. C., Q. X., H. D. conceived the ideas and designed the experiments. Y. C., Q. X., Z. L., Y. W., Y. M. fabricated and characterized the samples. All authors analyzed the data and wrote the manuscript.

Notes The authors declare no competing financial interests.

Supporting Information Available: Materials and Methods, Figs. S1 to S15, Table S1. This material is available free of charge via the Internet at http://pubs.acs.org.

17

ACS Paragon Plus Environment

Nano Letters

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

REFERENCES 1.

Levinson, H. J.; Arnold, W. H., In Handbook of microlithography, micromachining, and

microfabrication: microlithography, Rai-Choudhury, P., Ed. SPIE: Bellingham, Washington USA, 1997; Vol. 1, pp 13-102. 2.

Smith, H. I. Proc. IEEE 1974, 62, 1361-1387.

3.

Xia, Y.; Whitesides, G. M. Annu. Rev. Mater. Sci. 1998, 28, 153-184.

4.

Henzie, J.; Lee, M. H.; Odom, T. W. Nat. Nanotechnol. 2007, 2, 549-554.

5.

Wang, D.; Yang, A.; Hryn, A. J.; Schatz, G. C.; Odom, T. W. ACS Photonics 2015, 2, 1789-1794.

6.

Gates, B. D.; Xu, Q.; Stewart, M.; Ryan, D.; Willson, C. G.; Whitesides, G. M. Chem. Rev. 2005,

105, 1171-1196. 7.

Chou, S. Y.; Krauss, P. R.; Renstrom, P. J. Appl. Phys. Lett. 1995, 67, 3114-3116.

8.

Chou, S. Y.; Krauss, P. R.; Renstrom, P. J. J. Vac. Sci. Technol. B 1996, 14, 4129-4133.

9.

Knight, M. W.; Sobhani, H.; Nordlander, P.; Halas, N. J. Science 2011, 332, 702-704.

10. Ward, D. R.; Huser, F.; Pauly, F.; Cuevas, J. C.; Natelson, D. Nat. Nanotechnol. 2010, 5, 732-736. 11. Ebbesen, T. W.; Lezec, H. J.; Ghaemi, H. F.; Thio, T.; Wolff, P. A. Nature 1998, 391, 667-669. 12. Smith, D. R.; Pendry, J. B.; Wiltshire, M. C. K. Science 2004, 305, 788-792. 13. Gramotnev, D. K.; Bozhevolnyi, S. I. Nat. Photonics 2010, 4, 83-91. 14. Kabashin, A. V.; Evans, P.; Pastkovsky, S.; Hendren, W.; Wurtz, G. A.; Atkinson, R.; Pollard, R.; Podolskiy, V. A.; Zayats, A. V. Nat. Mater. 2009, 8, 867-871. 15. Stewart, M. E.; Anderton, C. R.; Thompson, L. B.; Maria, J.; Gray, S. K.; Rogers, J. A.; Nuzzo, R. G. Chem. Rev. 2008, 108, 494-521. 16. Chang, T. H. P.; Mankos, M.; Lee, K. Y.; Muray, L. P. Microelectron. Eng. 2001, 57–58, 117-135. 17. Kozawa, T.; Yoshida, Y.; Uesaka, M.; Tagawa, S. Jpn. J. Appl. Phys. 1992, 31, 4301-4306. 18. Parikh, M. J. Appl. Phys. 1979, 50, 4371-4377. 19. Fulton, T. A.; Dolan, G. J. Appl. Phys. Lett. 1983, 42, 752-754. 20. Maluf, N. I.; Pease, R. F. W. J. Vac. Sci. Technol. B 1991, 9, 2986-2991. 21. Li, W.-D.; Liang, X.; Chou, S. Y. Nanotechnology 2012, 23, 355303. 22. McCord, M. A.; Rooks, M. J., In Handbook of microlithography, micromachining, and microfabrication: microlithography, Rai-Choudhury, P., Ed. SPIE: Bellingham, Washington USA, 1997; Vol. 1, pp 105-252. 23. Nagpal, P.; Lindquist, N. C.; Oh, S.-H.; Norris, D. J. Science 2009, 325, 594-597. 24. Slot, E.; Wieland, M. J.; de Boer, G.; Kruit, P.; ten Berge, G. F.; Houkes, A. M. C.; Jager, R.; van de Peut, T.; Peijster, J. J. M.; Steenbrink, S. W. H. K.; Teepen, T. F.; van Veen, A. H. V.; Kampherbeek, B. J. In MAPPER: high throughput maskless lithography, Emerging Lithographic Technologies XII, San Jose, 2008; Schellenberg, F. M., Ed. Proceeding of SPIE: Advanced Lithography: Vol. 6921, pp 69211P. 25. Gay, C.; Leibler, L. Phys. Rev. Lett. 1999, 82, 936-939. 26. Ghatak, A.; Chaudhury, M. K.; Shenoy, V.; Sharma, A. Phys. Rev. Lett. 2000, 85, 4329-4332. 27. Newby, B. Z.; Chaudhury, M. K.; Brown, H. R. Science 1995, 269, 1407-1409. 28. Sarkar, J.; Shenoy, V.; Sharma, A. Phys. Rev. Lett. 2004, 93, 018302. 29. Shull, K. R.; Flanigan, C. M.; Crosby, A. J. Phys. Rev. Lett. 2000, 84, 3057-3060. 30. Duan, H.; Ferná ndez-Domı́nguez, A. I.; Bosman, M.; Maier, S. A.; Yang, J. K. W. Nano Lett. 2012,

18

ACS Paragon Plus Environment

Page 18 of 20

Page 19 of 20

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

Nano Letters

12, 1683-1689. 31. Hentschel, M.; Saliba, M.; Vogelgesang, R.; Giessen, H.; Alivisatos, A. P.; Liu, N. Nano Lett. 2010, 10, 2721-2726. 32. Fan, J. A.; Wu, C.; Bao, K.; Bao, J.; Bardhan, R.; Halas, N. J.; Manoharan, V. N.; Nordlander, P.; Shvets, G.; Capasso, F. Science 2010, 328, 1135-1138. 33. Li, T.; Hu, W.; Zhu, D. Adv. Mater. 2010, 22, 286-300. 34. Duan, H.; Yang, J. K. W.; Berggren, K. K. Small 2011, 7, 2661-2668. 35. Kim, D.; Giermann, A. L.; Thompson, C. V. Appl. Phys. Lett. 2009, 95, 251903. 36. Trevor, D. J.; Chidsey, C. E. D. J. Vac. Sci. Technol. B 1991, 9, 964-968.

19

ACS Paragon Plus Environment

Nano Letters

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

Table of Content graphic

The “‘Sketch and Peel” lithography for the fabrication of photon-sieve like multiscale gold disks array. Scale bar: 1o µm.

20

ACS Paragon Plus Environment

Page 20 of 20