Depletion Mode MOSFET Using La-Doped BaSnO3 as a Channel

Jun 13, 2018 - A field-effect mobility of ∼70 cm2 V–1 s–1, a record high transconductance value of >2mS/mm at room temperature, and the on/off r...
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Depletion Mode MOSFET using La-doped BaSnO as a Channel Material Jin Yue, Abhinav Prakash, Matthew C. Robbins, Steven J. Koester, and Bharat Jalan ACS Appl. Mater. Interfaces, Just Accepted Manuscript • DOI: 10.1021/acsami.8b05229 • Publication Date (Web): 13 Jun 2018 Downloaded from http://pubs.acs.org on June 14, 2018

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Depletion Mode MOSFET using La-doped BaSnO3 as a Channel Material

Jin Yue1,*, Abhinav Prakash1, Matthew C. Robbins2, Steven J. Koester2, and Bharat Jalan1,*

1

Department of Chemical Engineering and Materials Science University of Minnesota, Minneapolis, Minnesota 55455, USA

2

Department of Electrical and Computer Engineering University of Minnesota, Minneapolis, Minnesota 55455, USA

*Corresponding authors: [email protected], and [email protected] Keywords: Stannates perovskite, MBE, Defects, trap density, FET, high mobility 1

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ABSTRACT The high room-temperature mobility that can be achieved in BaSnO3 has created significant excitement for its use as channel material in all-perovskite-based transistor devices such as ferroelectric field effect transistor (FET). Here, we report on the first demonstration of n-type depletion-mode FET using hybrid molecular beam epitaxy grown La-doped BaSnO3 as a channel material. The devices utilize a heterostructure metal-oxide semiconductor FET (MOSFET) design that includes an epitaxial SrTiO3 barrier layer capped with a thin layer of HfO2 used as a gate dielectric. A field effect mobility of ~70 cm2V-1s-1, a record high transconductance value of > 2mS/mm at room temperature, and the on/off ratio exceeding 107 at 77 K were obtained. Using temperature- and frequency- dependent transport measurements, we quantify the impact of the conduction band offset at the BaSnO3/SrTiO3 interface as well as bulk and interface traps on device characteristics.

Wide bandgap materials with high conductivity are one of the most important materials

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breakthroughs in semiconductor technology over the past 20 years. The recent discovery of BaSnO3 (BSO) with wide bandgap, ~3 eV and conductivity exceeding 104 S/cm, has created further significant excitement in this direction,1 particularly for applications as transparent conducting and in high-power electronics.2-7 Bulk BaSnO3 has a cubic perovskite structure with a lattice constant of 4.116 Å. Doped BaSnO3 single crystal has a room temperature (RT) electron mobility as high as cm2V-1s-1 at 8 × 1019 cm-3.4 The high RT electron mobility is attributed to the small electron-phonon interaction and small electron effective mass compared to more conventional perovskites such as SrTiO3 (STO).1, 8 Thin films of BSO, on the other hand, show much smaller mobility values (≤ 183 cm2V-1s-1),4,

9-13

dislocations1, 9-10,

which can be attributed to scattering from charged defects such as threading 14

and also to electron-phonon scattering.1, 8 Fundamental understanding of the

dielectric, thermal and optical properties of BSO films has also improved1, 12, 15-19 including the study of the role of point defects on thermal conductivity and dielectric constant.12, 15 Recent optical studies have revealed that the highest conductivity La-doped BSO films (σ > 104 S/cm) also possess large transmittance > 80% in the visible-to-near-infrared range, in addition to large conductance at THz frequencies.17 Owing to this behavior, the first realization of a visible-transparent terahertz polarizer using BSO has recently been demonstrated showing the significant potential of doped BSO for THz devices.17 For electronic devices, much work has focused on FETs using BSO as an active channel 20-24

For FET operation, the band offset at the gate/channel interface, and defects in the gate dielectric,

channel or at the gate/channel interface are important factors in optimizing device performance. Specifically, defects at the interface between BSO and the gate dielectric are a significant concern if

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there is a large lattice mismatch at the interface, or when amorphous dielectrics are used. These can act as trap centers leading to undesirable performance including low field-effect mobility (μ ), reduced transconductance and degraded subthreshold slope. For example, much lower μ (15 - 50 cm2 V-1 s-1) and high trap density (1013 cm-2eV-1) were obtained in BSO FET with amorphous gate oxides including Al2O3,20 HfO2,22 and parylene,25 whereas superior μ (~ 90 cm2 V-1 s-1) was obtained in BSO-channel FETs, when nearly lattice-matched epitaxial LaInO3 was used as the gate dielectric.21 To put these results in context, the doped SrTiO3 FET with HfO2 gate dielectric shows electron mobility up to only 4.2 cm2V-1s-1 at RT.26 However, despite these trends, the detailed role of misfit dislocations and interface states in BSO heterostructure MOSFETs remains unclear. In an attempt to understand these issues in more detail, we have fabricated MOSFETs using La-doped BSO as the channel material and epitaxial SrTiO3 capped with thin HfO2 as the gate dielectric stack. The large lattice mismatch of ~5% in STO (tensile strain) on relaxed La-doped BSO channel results in lattice relaxation accompanied by misfit dislocation formation in the STO film.27 A thin HfO2 capping layer on STO was used to reduce gate leakage current. Temperature- and frequency-dependent transport measurements have been conducted to understand the effect of interface and bulk traps, as well as the band offset on the carrier dynamics. An epitaxial La-doped BSO film (16 nm) was grown as the channel material on a 64-nm-thick undoped BSO (buffer) grown on SrTiO3 (001) substrate (Crystec GmbH) using hybrid molecular epitaxy (MBE) approach described elsewhere.1, 9, 27 An epitaxial STO film (71 nm) was grown on top of the channel as a gate dielectric followed by annealing at 900°C for 2 minutes in excess oxygen rapid thermal annealing (RTA). The cation stoichiometry for these films was ensured using high

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resolution X-ray diffraction and the Rutherford Backscattering spectrometry (RBS).28 For the device fabrication, mesas were patterned to isolate the BSO channel using conventional photolithography ion milling. Subsequent to this step, oxygen annealing was repeated to decrease possible from oxygen vacancies that may have been introduced during the ion milling process. It is noted that the as-grown undoped BSO films were insulating, suggesting no measurable oxygen vacancies.1 source and drain contacts were patterned and recess-etched down to the BSO layer, followed by sputter-deposition and lift off a 20 nm Al / 20 nm Ti / 200 nm Au (top) metal stack. Finally, HfO2 (17 nm) was deposited using atomic layer deposition (ALD) to create the gate insulator on top of the barrier layer. The reactants for the HfO2 ALD deposition were tetrakis(dimethylamido)hafnium(IV) (TDMAH) and water vapor. Finally, the gate electrode was patterned and lifted-off using 20 nm Al / nm Ti / 200 nm Au (top). The channel length and width of the device were 100 µm and 200 µm respectively, as shown in the optical micrograph in Figure 1b. It is noted that HfO2 was necessary to reduce gate leakage current given the small band offset of ~0.4 eV between STO and BSO.6, 16 Frequency- and temperature-dependent transport measurements were carried out using a semiconductor device parameter analyzer (Agilent B1500A) and a cryogenic probe station CPX-VF). A depletion-mode MOSFET structure was fabricated in this study as it is a normally “on” switch when the gate-to-source voltage is zero (VGS = 0V). Depletion-mode devices are useful for applications such as constant current sources, power converter start-up circuits, bilateral switches other power applications where maximizing on-state current drive is needed and negative gate voltages can be tolerated. Figures 1c and 1f show output characteristics of the device, drain current (ID) vs.

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drain-to-source bias (VDS), as a function of gate voltage (VGS) at 300 K and 77 K, respectively. For temperatures, the device shows a typical n-type depletion mode FET behavior, i.e. ID is reduced with more negative VGS, and a linear behavior followed by a saturation (pinch-off) behavior of ID was observed with increasing VDS. Figures 1d and 1g show transfer characteristics (IDS vs. VGS) at 300 K and 77 K, respectively, at a fixed VDS = 0.5 V (which corresponds to the linear mode of operation). was varied from 0 to -8 V at 77 K, whereas the range was limited to VGS = 0 to -6 V at 300 K due to increased gate leakage current (See Figure S1 in the Supporting Information). The measurements at revealed a hysteretic behavior with a poor on/off ratio (Ion/Ioff) of ~2, whereas at 77 K, a significantly larger Ion/Ioff exceeding 107 was observed with much smaller hysteresis. These results suggest the presence of traps in the devices at RT that may freeze out at lower temperature. We will discuss this result and the possible origin of traps later using frequency-dependent C-V measurements. From the transfer characteristics, μ can be calculated using the following equation: μ = ( 

where L, W, Cox and

 



 









)    



(1)

are the channel length, channel width, gate oxide capacitance per unit

area and transconductance (gm) respectively. Using (1), we calculated μ at 300 K and 77 K 1d and 1g respectively). A maximum value of ~70 cm2 V-1s-1 was obtained. It is noted that roughly same peak value of μ was measured at 300 K and 77 K, suggesting that the dominant scattering mechanism is not phonon scattering and could be related to defect scattering, which is consistent our previous study of scattering mechanisms in doped BSO.1 An obvious drop in μ was observed -8 V < VGS V (i.e. with decreasing carrier density for 77 K suggesting scattering is likely due to charged defects, in agreement with our prior results.1 It is noted that Cox is a critical 6

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parameter in accurately determining μ and that the conventional method of measuring Cox in the accumulation regime may not yield a correct value when a large number of traps are present. We will come back to this point later. Figure 1e and 1h show gm measured at 300 K and 77 K, respectively. maximum value of gm (normalized to the channel width of 200 µm) was found to exceed 2 mS/mm, which is to-date the highest reported value for BSO-based FETs.20, 22-25 Furthermore, using linear extrapolation of IDS1/2 – VGS curves (as illustrated in Figures 1e and 1h), we calculated the threshold voltage (VTH) at 300 K and 77 K to be -8.7 V and -6.7 V respectively. We now turn to the discussion of Cox and the role of misfit dislocations as traps. To this end, we performed frequency-dependent measurements of capacitance (C) vs. VGS at 300 K and 77 K as in Figures 2a and 2b. Insets show the semi-log plot for clarity. As an upper limit to Cox, the capacitances corresponding to only HfO2 (17 nm), and HfO2 (17 nm)/SrTiO3 (71 nm) stack were calculated (assuming dielectric constant of 20 for HfO2 and 300 for SrTiO3) and are shown as dotted lines in the insets. At both temperatures, strong frequency dispersion was observed in the regime (VGS > 0 V) with capacitance exceeding even the highest value expected when on the HfO2 dielectric is considered. These results suggest the presence of a significant density of traps in the gate stack, which makes determination of Cox non-trivial. To put the later in context, we recall Si/SiO2-based MOSFETs, where Cox can be estimated to be the capacitance in the accumulation regime where measured capacitance saturates. However, in our case, the capacitance showed no sign of saturation in the accumulation regime making this conventional method of estimating Cox non applicable. It is noted that the applied VGS was limited to < 2 V due to the large gate leakage with increasing positive VGS, which is attributed to small band offset between BSO and STO gate

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dielectric.6, 16 To determine Cox in the presence of non-negligible trap response, we utilized the Kar method.29-30 According to this method, the following equation holds true for a MOS structure in the accumulation regime even when trap response and gate leakage current are non negligible:

1 dC C dV

1

1

2

=

β

2

Cox

( Cox − C ) .

(2)

Here, β is a constant.29-30 Using (2), a plot of C-1/2(dC/dV)1/2 vs. C is a straight line, whose x-intercept at C-1/2(dC/dV)1/2 = 0 should yield Cox. Figure 3a and 3b show frequency dependent C-1/2(dC/dV)1/2 vs. C plots at 300 K and 77 K, respectively. The inset to Figure 3a shows extracted value of Cox at 300 K as a function of frequency, revealing Cox (1.02 µF/cm2 at 32 kHz) first with increasing frequency and then tends to saturate at ~ 0.74 µF/cm2 at 1 MHz. Figure 3b yielded a similar values at 77 K, where Cox = 1.04 µF/cm2 at low frequency and 0.79 µF/cm2 at higher and revealing no dependence of Cox on temperature. Interestingly, these results revealed that the experimentally determined Cox at low frequency (1 kHz) is similar to the calculated Cox assuming the gate oxide is only HfO2 gate (Cox = 1.04 µF/cm2), and that the high-frequency value is close to that estimated using the full HfO2/SrTiO3 stack (Cox = 0.815 µF/cm2) (see Figure 2). These results are significant as they shed light on the interaction of electrons in the channel with traps in the STO. For instance, at low frequencies the fact that the experimental Cox is similar to that of the calculated corresponding to the HfO2 layer suggests that electrons are accumulated near the STO/HfO2 interface, where charge transport to the top interface could occur via trap-assisted tunneling, direct tunneling through the small BSO/STO barrier or from direct injection from the source/drain contacts. the increased capacitance at 300 K suggests that direct thermionic emission over the BSO/STO 8

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is also possible at high temperature. The fact that the capacitance is suppressed at high frequency supports the possibility of a trap-assisted mechanism for the surface transport. Further investigation should be directed to quantify the trap density and trap emission time constant. Our results also that a top barrier layer with larger band offset and improved lattice matching with BSO should the device performance. In summary, we have demonstrated the first depletion-mode MOSFET based on BaSnO3/SrTiO3 heterostructures. We obtained μ of 70 cm2 V-1 s-1, gm of 2 mS/mm at RT, and Ion/Ioff ratio higher 107 (at 77K). The poor turn-off performance of the device at room temperature was attributed to significant trap response, which was confirmed by capacitance measurements. We also demonstrated that the Kar method can be used to determine Cox in the presence of non-negligible trap response. These results suggest that enhanced performance of BSO-channel devices can be achieved by misfit dislocations and by employing heterostructures with larger band offsets. Acknowledgements: This work is primarily supported by the Young Investigator Program of the Air Force Office of Scientific Research (AFOSR) through Grant FA9550-16-1-0205, the UMN MRSEC program under Award Number DMR-1420013, and partially by NSF through DMR-1741801. Parts of this work were carried out at the Minnesota Nano Center and Characterization Facility, University of Minnesota, which receives partial support from NSF through the MRSEC program. A.P. would like to acknowledge the support from the UMN Doctoral Dissertation Fellowship. Supporting Information: The supporting information includes data for gate leakage at 300 K and 77 K.

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10. Raghavan, S.; Schumann, T.; Kim, H.; Zhang, J. Y.; Cain, T. A.; Stemmer, S., High-Mobility BaSnO3 Grown by Oxide Molecular Beam Epitaxy. APL Mater. 2016, 4, 016106. 11. Ganguly, K.; Ambwani, P.; Xu, P.; Jeong, J. S.; Mkhoyan, K. A.; Leighton, C.; Jalan, B., Structure and Transport in High Pressure Oxygen Sputter-Deposited BaSnO3−δ. APL Mater. 2015, 3, 062509. 12. Prakash, A.; Xu, P.; Wu, X.; Haugstad, G.; Wang, X.; Jalan, B., Adsorption-Controlled Growth and the Influence of Stoichiometry on Electronic Transport in Hybrid Molecular Beam Epitaxy-Grown BaSnO3 Films. J. Mater. Chem. C 2017, 5, 5730-5736. 13. Ganguly, K.; Prakash, A.; Jalan, B.; Leighton, C., Mobility-Electron Density Relation Probed Via Controlled Oxygen Vacancy Doping in Epitaxial BaSnO3. APL Mater. 2017, 5, 056102. 14. Mun, H.; Kim, U.; Kim, H. M.; Park, C.; Kim, T. H.; Kim, H. J.; Kim, K. H.; Char, K., Large Effects of Dislocations on High Mobility of Epitaxial Perovskite Ba0.96La0.04SnO3 Films. Appl. Phys. Lett 2013, 102, 252105. 15. Nunn, W.; Prakash, A.; Bhowmik, A.; Haislmaier, R.; Yue, J.; Lastra, J. M. G.; Jalan, B., Frequency- and Temperature-Dependent Dielectric Response in Hybrid Molecular Beam Epitaxy-Grown BaSnO3 Films. APL Mater. (under review) 2018. 16. Chambers, S. A.; Kaspar, T. C.; Prakash, A.; Haugstad, G.; Jalan, B., Band Alignment at Epitaxial BaSnO3/SrTiO3(001) and BaSnO3/LaAlO3(001) Heterojunctions. Appl. Phys. Lett. 2016, 108, 152104. 17. Arezoomandan, S.; Prakash, A.; Chanana, A.; Yue, J.; Mao, J.; Blair, S.; Nahata, A.; Jalan, B.; Rodriguez, B. S., THz Characterization and Demonstration of Visible-Transparent/Terahertz-Functional Electromagnetic Structures in Ultra-Conductive La-doped BaSnO3 Films. Sci. Rep. 2018, 8, 3577. 18. Sanchela, A. V.; Onozato, T.; Feng, B.; Ikuhara, Y.; Ohta, H., Thermopower Modulation Clarification of the Intrinsic Effective Mass in Transparent Oxide Semiconductor BaSnO3. Phys. Rev. Mater. 2017, 1, 034603. 19. Z. L. Higgins; Scanlon, D. O.; Paik, H.; Sallis, S.; Nie, Y.; Uchida, M.; Quackenbush, N. F.; Wahila, M. J.; Sterbinsky, G. E.; Arena, D. A.; Woicik, J. C.; Schlom, D. G.; Piper, L. F. J., Direct

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Observation of Electrostatically Driven Band Gap Renormalization in a Degenerate Perovskite Transparent Conducting Oxide. Phys. Rev. Lett 2016, 116, 027602. 20. Park, C.; Kim, U.; Ju, C. J.; Park, J. S.; Kim, Y. M.; Char, K., High Mobility Field Effect Transistor Based on BaSnO3 with Al2O3 Gate Oxide. Appl. Phys. Lett. 2014, 105, 203503. 21. Kim, U.; Park, C.; Ha, T.; Kim, Y. M.; Kim, N.; Ju, C.; Park, J.; Yu, J.; Kim, J. H.; Char, K., All-Perovskite Transparent High Mobility Field Effect using Epitaxial BaSnO3 and LaInO3. APL Mater. 2015, 3, 036101. 22. Kim, Y. M.; Park, C.; Kim, U.; Ju, C.; Char, K., High-mobility BaSnO3 Thin-Film Transistor with HfO2 Gate Insulator. Appl. Phys. Express 2015, 9, 011201. 23. Shin, J.; Kim, Y. M.; Kim, Y.; Park, C.; Char, K., High Mobility BaSnO3 Films and Field Effect Transistors on Non-Perovskite MgO Substrate. Appl. Phys. Lett. 2016, 109, 262102. 24. Fujiwara, K.; Nishihara, K.; Shiogai, J.; Tsukazaki, A., Enhanced Electron Mobility at the Two-Dimensional Metallic Surface of BaSnO3 Electric-Double-Layer Transistor at Low Temperatures. Appl. Phys. Lett. 2017, 110, 203503. 25. Fujiwara, K.; Nishihara, K.; Shiogai, J.; Tsukazaki, A., High Field-Effect Mobility at the (Sr,Ba)SnO3/BaSnO3 Interface. AIP Adv. 2016, 6, 085014. 26. Zhu, Z.; Luo, Z.; Xu, J.; Zhao, H.; Chen, S., Performance Improvement of HfO2/SrTiO3 Hetero-Oxide Transistors Using Argon Bombardment. IEEE Elect. Dev. Lett. 2013, 34, 927. 27. Prakash, A.; Dewey, J.; Yun, H.; Jeong, J. S.; Mkhoyan, K. A.; Jalan, B., Hybrid Molecular Beam Epitaxy for the Growth of Stoichiometric BaSnO3. J. Vac. Sci. Technol. A 2015, 33, 060608. 28. Prakash, A.; Xu, P.; Wu, X.; Haugstad, G.; Wang, X.; Jalan, B., Adsorption-controlled growth and influence of stoichiometry on electronic transport in hybrid molecular beam epitaxy-grown BaSnO3 films. J. Mater. Chem. C 2017, 5, 5730. 29. Kar, S., Extraction of the Capacitance of Ultrathin High-K Gate Dielectrics. IEEE Trans. Electron Devices 2003, 50, 2112-2019. 30. Kar, S., High Permittivity Gate Dielectric Materials. Berlin Springer: 2016. 12

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Figure Captions:

Figure 1: (a) Device schematic, (b) optical micrograph of the fabricated device, (c, d) IDS vs. VDS characteristics of the device as a function of VGS measured at 300 K and 77 K respectively, (e, f) transfer curve (IDS vs. VGS) (left axis) and field effect mobility (μ ) (right axis) at 300 K and 77 K respectively, (g, h) IDS1/2 vs. VGS (left axis) and gm vs. VGS (right axis) at 300 K and 77 K respectively.

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Figure 2: Frequency-dependent C-VGS characteristics of the device measured at (a) 300 K and (b) 77 K. Insets show semi-log plots for clarity. Dotted lines correspond to the calculated capacitance per unit area using single HfO2 layer (red) and HfO2/ SrTiO3 stack (green) as gate dielectrics.

Figure 3: (a, b) C-1/2(dC/dV)1/2 vs. C at different frequencies at 300 K and 77 K respectively. Inset to panel (a) shows extracted value of Cox as a function of frequnecy.

TOC

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Figure 1 136x75mm (300 x 300 DPI)

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Figure 2 113x59mm (300 x 300 DPI)

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ACS Applied Materials & Interfaces 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

Figure 3 109x76mm (300 x 300 DPI)

ACS Paragon Plus Environment

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