Effect of Seed Arrangements on the Quality of n-Type Monolike Silicon

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The effect of seed arrangements on the quality of ntype mono-like silicon grown by directional solidification Yu-Cien Wu, Wen-Chieh Alan Lan, Chia-Fu Yang, C. Hsu, Chen-Ming Lu, Chih Sheng Yang, and Chung-Wen Lan Cryst. Growth Des., Just Accepted Manuscript • DOI: 10.1021/acs.cgd.6b01317 • Publication Date (Web): 17 Oct 2016 Downloaded from http://pubs.acs.org on October 21, 2016

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Crystal Growth & Design

The effect of seed arrangements on the quality of n-type mono-like silicon grown by directional solidification Y.C. Wua, A. Lanab, C.F. Yanga, C. Hsub, C.M. Luc, A. Yangc, C.W. Lana* a

Department of Chemical Engineering, National Taiwan University, Taipei, Taiwan b Sino-American Silicon Productions Inc., Hsin-chu, Taiwan, ROC c

Solartech Energy Inc., Hsin-chu, Taiwan, ROC Abstract

The effect of seed arrangements on the ingot quality was studied for the n-type mono-like silicon grown by G1-scale directional solidification. It was found that the subgrains and defects were generated easily from the 0° tilt angle between seed plates. On the contrary, the seed junction with large tilt angles had little effect on the defect generation, and the best tilt angle ranged from 10° to 30°. Except the area near the 0° tilt angle, the best lifetime of the wafer after gettering could be greater than 3 ms. Color mismatch on the appearance of the solar cell made from the wafers due to seed arrangements could be an issue in practice.

Key words: directional solidification; mono-like silicon; defect growth; semiconducting silicon; solar cells PACS codes: 61.72. -y 81.30. -t 84.60.Jt *

Corresponding author: Tel (Fax): 886-2-2363-3917; E-mail: [email protected]

Parts of the results were presented in EU PVSEC-32, 2016, in the session of silicon crystallization.

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1. Introduction With the strong demand of low-cost solar cells, nowadays, multi-crystalline silicon (mc-Si) grown by directional solidification (DS) has dominated the market with a share near 60%. The recent development of the so-called high-performance mc-Si (HP mc-Si) seeded by small silicon particles having small uniform grains and non-coherent GBs has made significantly progress in reducing the dislocation clusters and their propagation [1-4]. However, during solar cell processing a better surface texturing is needed for light trapping, but the acid texturing for mc-Si wafers is far inferior to the alkaline ones for mono-Si. This significantly reduces the solar cell efficiency of mc-Si. More importantly, the low-cost diamond-wire cutting could not be adopted directly for mc-Si, because the wafer surface is too smooth to have good acid texturing in the current solar cell processing. On the other hand, the growth of mono-like ingot using splitting seeds has been very difficult in controlling the defect generation from the seed junctions [5-8], as well as the defect multiplication during crystal growth. Even seed gaps could significantly affect the defect generation [7]. Because of these challenges, the development of the mono-like technology in industry has been loosing its edge since the emergence of HP mc-Si in 2012. Recently, the dislocation generation from the seed joints has been mitigated significantly by special seed arrangements using low-symmetry random grain boundaries (GBs) [9-12], i.e., by tilt the angle between seed plates. Trempa et al. [9] considered different types of grain boundaries, and they concluded that the non-perfect highly symmetrical GBs could cause a grain boundary splitting and dislocation generation, while the low symmetrical GBs could keep their singular structure and no extensive dislocations appearing at the seed junctions. Hu et al. [10] further purposely introduced the random GBs by twisting the angle between the 2


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adjacent (100)-oriented seeds by 10

o

to 45o. From their G5 ingot growth, the

dislocations generated from the seed joints were significantly reduced. By combining the concepts of small- and large-angle GBs and the functional grain GBs, Takahashi et al. [11] proposed a novel seed manipulation for artificially controlled defect technique (SMART), and the results were promising in reducing the defects generated form the seed junctions. However, for better texturing, the growth of (100) mono-like ingot would be preferred for industry. Although the work by Hu et al. [10] was promising, the details were not disclosed and the optimum tilt angle was not discussed. In fact, the use of large rotation angles (from 30 to 60o) for splitting (100) seeds was reported in a Chinese patent application [12], but this patent application was officially rejected in 2015. Moreover, n-type silicon has been long recognized for its high efficiency in solar cells due to its high minority lifetime [13], but the commercially available wafers were all grown by the Cz method [14]. The mono-like wafers have the advantages of low cost and high throughput as the HP mc-Si; therefore, they have a great potential in replacing the Cz wafers [15-16]. As the effective lifetime of the wafers after gettering and passivation was greater than 1.5 ms, the efficiency of the heterojunction solar cells based on the low-temperature processes could be greater than 21% [17]. Of course, the key issues are still the defects and impurities from the crucible/coating during ingot growth. In this report, we purposely performed two experiments with different seed arrangements for the growth of N-type silicon ingots. The first one considered the stacking (100) seeds. This is rather often in practice when the seed is not thick enough for back melting control; the stacked seed plates or thick wafers are normally used. The second one used the rearranged sector seeds cut from a single (100) seed, where different tilt angles between the adjacent seeds could be considered. An over cut, i.e., 3



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having a perfect 0o tilt angle, was also implemented, which gave a perfect Σ1 GB. Based on this seed arrangement, the optimum tilt angle between two seeds and the junction of different tilt angles could be investigated. The wafers cut from the ingots were examined by etching and minority lifetime measurements. Gettering and passivation were further carried out to examine the wafer lifetime. The color uniformity of the solar cell made form the mono-like wafer was further examined. In the next section, the experimental procedure is briefly described. Section 3 is devoted to results and discussion, followed by conclusions in Section 4.

2. Experimental The ready-to-use Si3N4–coated G1 silica crucibles (Vesuvius Inc.), with the outer dimension of 240 mm x240 mm x310mm and the wall thickness of 15 mm, were used for ingot growth. Two seed arrangements were considered. The first one had two 200-mm-diameter (100) dislocation-free phosphorous-doped Cz seeds in stack, as illustrated in Fig. 1(a); the thickness was 20 mm each and the resistivity was 3.6 Ω-cm. The alignment of two polished seeds was adjusted as much as possible to have the same orientation, and the gap between the seeds was minimized. During crystal growth, the melting front was adjusted and monitored by a quartz rod to make sure that the initial growth interface was across two seeds. The initial solidification front is schematic by the dashed line in Fig. 1(a). After the ingot growth, the melting line could be checked by the resistivity measurement of the wafers or the cut-off plates. The second seed arrangement is illustrated in Fig. 1(b). As the schematic shown on the left hand side of Fig. 1(b), a 200-mm-diameter (20 mm in thickness) (100) seed was cut first by a high-pressure water jet evenly into nine sector pieces, but leaving a circle seed (45-mm in diameter) at the center. Then, when the seeds were placed into the crucible, some sector pieces were rearranged, e.g., the seed 5 was moved to the 4


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original position of seed 4, as shown on the right. As a result, different tilt tangles between two adjacent seeds could be obtained as indicated in Fig. 1(b). Tri-junctions of three seeds with different tilt angles along the rim of inner circle seed could also be obtained. Different seeds gaps the from 0.2 to 0.9 mm were considered, and the numbers are indicated in Fig. 1(b). Different tilt angles between the center circle seed (seed 0) and the sector seeds were also included. Moreover, an overcut of the center seed was considered as well, which was located at the junction of seeds 0, 6 and 8. The seeds before use were chemically polished (more than 20 µm) by acid for removing the surface damages. Before we loaded polysilicon chucks into the crucible, four 156mmx156mm mc-Si wafers as shown in Fig. 1(b), were placed on the inner wall of the crucible to protect the crucible coating. The seeds were also protected by the same way; several wafers were placed upon the seeds before loading the polysilicon. Several small heavily phosphorous-doped wafers (7 mΩ-cm) were used for doping, and the target resistance near the seed was set at 4.5 Ω-cm. The setup for the G1 growth was similar to the one reported before [18]. In short, 11.6 kg of high-purity silicon with the doping wafers was loaded into the coated crucible upon the seeds. The crucible was placed on a graphite heat exchanger block and the melting started at 1450℃ in the furnace. The melting stage was carefully controlled by adjusting the heating power and the interface position at the center was monitored by a quartz dipping rod. Before crystal growth, the seeds were slightly back melted and preserved. To grow the ingot, the thermal gradient was set at about 10 ℃/cm, and the solidification was carried out by elevating the insulation basket at a speed of about 6 mm/h. Argon flushing (20 slpm) was also considered to remove SiO and to reduce the back diffusion of CO, where a graphite cover was used. After crystal growth, the ingot was cut into a brick with a cross section of 156 5



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mmx156 mm; some material near the bottom and top having low lifetime was also removed. Then, the ingot was cut into wafers (200 µm in thickness) by using a commercial wire saw. The grain structures were examined by using KOH etching (50 wt% KOH aqueous solution at 90 oC). The minority carrier lifetime of both the brick and wafers was measured by the microwave photoconductivity decay technique (µ-PCD) (Semilab WT2000). To reveal the etch pit density (EPD) imaging, the wafers were etched by a mixed acid (CH3COOH: HF: HNO3: H2O=1.14: 4: 1: 2). On the other hand, for EPD counting, the wafers were chemically polished followed by Secco etching [19]. Electron backscattered diffraction (EBSD) (Horiba Nordlys F+) with a step size of 10 µm, which was installed in an SEM (Hitachi S3400) were also used to examine the grain orientations and GB types. Gettering/passivation was also carried out. The condition was similar to the extended gettering used by Kivambe et al. [20], but we conducted the process in a normal production line at Solartech Energy Inc. In short, the process consisted of 25 min 845 oC gettering and 2 h 650 oC annealing. After gettering, the wafers were chemically polished using an in-line polishing process

(HF:HNO3=1:4) and about 80µ PECVD Si3N4 (450 oC) coating was carried out on both sides of the wafers for surface passivation. PECVD Al2O3 passivation was also conducted, but it was not as good as the nitride coating. To examine the surface color of the solar cell made from the mono-like wafer, PECVD Si3N4 anti-reflection coating 6


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using was performed as well.

3. Results and Discussion For the stacked seeds, the lifetime mappings of the four faces of the brick from the grown ingot are shown in Fig. 2. Because of the thick seeds, the red zone having low minority lifetime was thick at the bottom due to the diffusion of the dissolved impurities from the crucible [21]. The lifetime near the top was also lower and this was due to the segregation of the impurities. The best lifetime was about 30 µs, which was much higher than that of normal p-type ingots (about 10 µs at most) [18]; this brick lifetime was found much high than the reported ones without passivation [15]. The wafers at certain heights in the ingot, as indicated on the right of Fig. 2, were taken for further characterizations. Figure 3 shows the grains, EPD and lifetime mappings of these wafers. As shown for H= 23.5 mm, which was slightly higher than the seeded interface; the fraction of the solidification (f) was 0.05, most of the region remained single crystalline, except near the edge. The grains grown from the 1st (center) and the 2nd seeds could not be distinguished by the KOH etching. However, if we examine the EPD mapping, a clear ring decorated with defects was appeared at the center. The defects along the ring were believed to be induced from the seed junction, as illustrated in Fig. 1(a); the junction was confirmed by the resistivity measurement. The defects inside the ring might be caused by dipping. The lifetime mapping also gave a low-lifetime ring, but it was not as clear as the EPD mapping because the lifetime in the central region was low due to metallic impurities back diffused from the seed [21]. The development of the defects became clearer at H= 52.9 mm (f= 0.31). The lifetime image was consistent with the EPD mapping. Photoluminance (PL) was also carried out, and the images were also very similar to the EPD images. At H= 7



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82 mm (f= 0.57), more grains grew in from the crucible, but the defects were not particularly high in the grains grown from the crucible wall. Although the defects spread quickly, the lifetime in general even in the high-defect area increased. We further examined the defects on the ring, at the point labeled by A. As shown in Fig. 4, many subgrain boundaries appeared in the high-defect area, and they increased with height. It should be noticed that these subgrains could not be distinguished by EBSD, because they were in the same orientation. Also, the EPD was very high there, usually greater than 1.2×106/cm2, which was calculated based on the etch pits inside the dashed box at the top images. On the contrary, the area away from the defect ring, such as point B indicated in the bottom pictures of Fig. 3, the EPD was about two orders lower, i.e, around 104/cm2. The EPD along the ring seemed to increase with height, and the EPD heighted in Fig. 4(c) was about 3.27×106/cm2 (2.65μs). Apparently, from Fig. 3, it is clear that the defects were generated from the seed joint, and dislocation density in the subgrains increased with the ingot height. The lifetime on the defect ring was also lower. Figure 5 shows the lifetime mappings of the brick from the 2nd experiment. As shown, the ingot lifetime mappings for different faces were similar to those from the first experiment. Although we used the thinner seed thickness (20 mm here), the red zone in the lower part was still quite large. As indicated by the arrows, the lifetime on the back and the left sides had lower lifetime area developed from the seeds, and they happed to be initiated from the 0o seed junctions, i.e, either the junction of seeds 1 and 2 or seeds 2 and 3. The grain structures, EPD and lifetime mappings for the wafers obtained from different heights were also examined. For the grain structures shown in Fig. 6, even the orientations were all the same in (100), the grains could still be revealed by the KOH etching; this was quite different from that in the stacked seeds (see Fig. 3). Even 8


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for the grains that remained at the same position, i.e, grains 0, 1, 2, and 3, they could still be distinguished. This was likely that the tiny tilt might cause the reflection difference in the grain image. On the other hand, as the subgrains developed near the junctions, the boundaries between the seeds, e.g., grains 1 and 2 and grain 2 and 3, became blurred. Interestingly, one could also see the shape of the center grain, the GB from the 0o seed junctions tended to stay at the same position, but the GBs from the large-tilt junctions tended to move, either inward or outward as indicated by the arrows in Fig. 6(d). Usually, the grain grows toward the heat flow, either outward or inward depending on the interface shape, and this is rather typical for random GBs. Nevertheless, for silicon the situation might a bit complicated due to the different GB energies and mobilities [22], but this is beyond the scope of this study. The GBs at H= 7.4 mm (f=0.01) and 60.2 mm (f=0.46) were examined by EBSD, and the angles and the GB types based Brandon’s criterion [23] are summarized in Table 1. The angles between grains were consistent with the original arrangement. However, some GBs had been identified to be CSL GBs because they were no longer straight lines between grains. The rearrangement of GBs having more coherent bonding would be thermodynamically feasible. The EPD mappings in Fig. 6 also showed that the defects were induced from the 0o seed junctions, and this was consistent with the first experiment. As the ingot grew higher, the defects spread. Some defects appeared in the grains grown from the crucible in Fig. 6(d), but they again were not significant. For the large angle random GBs, even with different angles and gaps, there were no significant defects appeared. As will be discussed shortly, the dislocation density generated from the random GBs was rather low. If we further examine the lifetime, the lower lifetime due to the defects induced from the GBs could also be seen, and the lifetime on the top (back) and left edges was consistent with the lifetime mapping shown Fig. 5. Again, as 9



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shown in Fig. 6(a), the same as the brick lifetime mapping, the lifetime near the seeds was also low. In addition, the lifetime inside the GBs did not certainly lower, which was unlike mc-Si that the lifetime is lower at the GBs due to metal segregation. As the ingot grew higher, as shown in Fig. 6(b), the lifetime increased, and the lifetime image near the GBs was consistent with the EPD mapping; however, due to the lifetime degradation by metals, the lifetime in the high-defect area was not certainly lower than that having lower defects. This situation was changed at the higher ingot position. As shown in Fig. 6(c), the lifetime of the whole wafer was significantly improved; however, the lifetime in the high-defect area remained low. Again, the lifetime image was still consistent with the EPD mapping. This trend remained the same for the brick height at H= 86.8 mm shown in Fig. 6(d). Surprisingly, the lifetime for the grains grown from the crucible remained as high as the mono-crystalline region. Moreover, if we examine the overcut area, the EPD and the lifetime there remained about the same as the central area. In addition, if we examine the GB (30o) between grains 0 and 6, it is also interesting that the defects there remained low, even at the position up to H=86.8 mmm shown in Fig. 6(d). In general, the area near 0o-tilt seed junctions and their nearby regions had much more defects than elsewhere. To further investigate the defects, we also examined them near the GBs by using a microscope. Figure 7 (a) shows the defects near different GBs for H=13.5 mm; the layout of the seeds was put at the center for reference. Again, near the GBs from the 0o-tilt junctions among grains 0, 1, 2, and 3, there were some subgrain boundaries, as well as subgrians (sg). This was consistent with the first experiment. The EPD near the subgrain boundaries was also very high, i.e., greater than 3×106/cm2; the dislocations clusters were found near the subgrain boundaries. Subgrain boundaries were also found near the GB between grains 0 and 1 and 8; the magnification for the photographs with a red frame (with the scale bar of 1000 µm) was different from the 10


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rest (scale bar 200 µm). On the contrary, all the GBs from the junctions with large tilt angles remained clear, and no subgrains were found. As shown in Fig. 7(b) for H= 33.6 mm, for the area near the large-angle tilt GBs, the EPD was in the order of 105/cm2, as shown by the points A and C. However, away from the GBs, the EPD was around 104/cm2, e.g., point D. At the higher ingot height, similar trend was observed. Again, as shown in the upper right photographs, subgrains were found near the GBs from the 0o-tilt junctions. The tri-junctions of the GBs away from the 0o-tilt junctions remained clear, as shown in the lower three photographs. The defects shown in Fig. 7(c) for H=60.2 mm, respectively, were also similar to the previous figure. However, more subgrains appeared neat the 0o-tilt junctions, as shown by the three photographs with the red frame. Again, the EPD was greater than 106/cm2. As compared with the area having subgrains and low lifetime, they were in good correspondence. Interestingly, the EPD elsewhere, such as points A, C, and D, remained about the same order around 103-105/cm2, and the value varied a lot from area to area depending on the sampling. To further compare the EPD and lifetime for the GBs from different seed junctions, we systematically measured the average EPD at a same position from the center for different tilt angles. The results for EPD are summarized in Fig. 8(a), and the sampling points are illustrated inside the figure; we took an average of the five EPD values as indicated. As shown, one could see that the EPD near 20o tilt angle had smaller EPDs. Similar trend could be found for lifetime for the height having lower impurities, i.e., at f= 0.46 (H=60.2 mm), as shown in Fig. 8(b). If we further compare the GB types shown in Table 1, apparently the GBs from 40o tilt angle would form Σ5 GBs, while others formed low-symmetry CSL GBs. It is thus presumed that the tilt angle have higher GB energy might induce less defects. We also examine the EPD of different tilt angles angle near tri-junctions. Again, away from 0o and 40o tilts, the 11



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EPD seemed to be slightly lower. In order to examine how much lifetime could be improved by gettering, two wafers obtained form experiments 1 and 2 were examined, as shown in Fig. 7. After gettering and surface passivation, the lifetime of both wafers was significantly improved except the area having higher EPDs caused by the dislocation clusters induced by the 0o-tile junctions. The best lifetime in the wafers was up to 1.26 and 3.16 ms, respectively, in Figs. 9(a) and (b). The horizontal bands having lower lifetime were caused by the in-line surface polishing, and the patterns were consistent with the rollers. They were nothing to do with the wafer quality. Moreover, the degradation of the lifetime by the random GBs was not obvious. In general, beside the area near the 0o-tile junctions, the wafer lifetime in Fig. 9(b) was better than that reported for the non-contact crucible process [20]. This indicates that with a proper arrangement of the seeds, getting high-lifetime mono-like wafers after gettering is feasible. Finally, the wafers were processed in a normal p-mono cell line having alkaline etching. The front side of the solar cell is shown in Fig. 10(a). As shown, except the non-(100) grains from the crucible wall, the color was vert uniform. However, the 45o-view shown in Fig. 10(b) had clear difference in color for different grains, even for the grains having (100) orientation. Moreover, the high-defect area also showed different colors. Nevertheless, the color difference might be mitigated after encapsulation for solar modules. However, such color difference in the solar level still could not be ignored in production.

4. Conclusions We carried out N-type silicon ingot growth by considering different seed arrangements. It was found that the 0o seed junctions could easily induce defects, even 12


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with the minimized gap between the seeds. However, no significant defects were found near the overcut region (a perfect Σ1 GB). The seed arrangement with large-angle tilt junctions by simply rotating the seed around the axis turned out to be the best way to reduce the defects, and the optimum tilt angle is from 10o to 30o, and the GBs developed from there had a higher energy. The GBs developed from the seed junctions showed some CLS symmetry, e.g., Σ5 GBs were developed from the 40o seed junctions. The defects near tri-junctions showed similar behaviors. After gettering, besides the high-defect area near the 0o seed junctions, high minority lifetime could be obtained for the whole wafer including the area near GBs. Apparently, all the large-angle seed junctions we arranged had little effect on the minority lifetime of the ingot. Moreover, some color difference was found from the side view for the solar cell made from the mono-like wafers. This might need to be taken into consideration for production.

Acknowledgments This work was supported by the Ministry of Science and Technology of Taiwan and Sino-American Silicon Products Inc, as well as the National Energy Program-Phase II. The RTU crucibles provided by Vesuvius were highly appreciated. We also thank Gigastorage Co. for the assistance of slicing service and PL imaging of the wafers.

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[14] Lan, C.W. In Crystal Growth for Solar Cells; Nakajima, K. and Usami, N., Eds., Springer: Berlin, 2009; Chapter 2, pp 25-39. [15] Jouini, A.; Ponthenier, D.; Lignier, H.; Enjalbert, N.; Marie, B.; Drevet, B.; Pihan, E.; Cayron, C.; Lafford, T. and Camel, D. Prog. Photovolt: Res. Appl. 2012, 20, 735–746. [16] Oliveira, V.A.; Pihan, E.; Camel, D.; Jouini, A. presented in part at The 8th International Conference on Crystalline Silicon Solar Cells, Bamberg, Germany, May, 2015. [17] Jay, F.; Muñoz, D.; Desrues, T.; Pihan, E.; de Oliveira, V. A.; Enjalbert, N.; Jouini, A. Sol. Energ. Mat. Sol. Cells 2014, 130, 690–695. [18] Hsieh, C.C.; Wu, Y.C.; Lan, A.; Hsu, H.P.; Hsu, C.; Lan, C.W. J. Cryst. Growth 2015, 419, 1-6. [19] d’ Aragona, F. Secco. J. Electrochem. Soc. 1972, 119, 948. [20] Kivambe, M.; Powell, D. M.; Castellanos, S.; Jensen, M. A.; Morishige, A. E.; Nakajima, K.; Morishita, K.; Murai, R.; Buonassisi, T. J. Cryst. Growth 2014, 407, 31–36. [21] Gao, B.; Nakano, S. and Kakimoto, K. Cryst. Growth Des. 2012, 12, 522-525. [22] Carl, E.; Danilewsky, A.; Meissner, E. and Geiger, T. J. Appl. Cryst. 2014, 47, 1958–1965. [23] Brandon, D. Acta Metall. 1966, 14, 1479-1984.

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Table 1 Measured tilt angles and GB types at different ingot heights

Tilt angle

0∘

H = 7.4 mm (f = 0.01)

_

H = 60.2 mm (f = 0.46)

_

10∘

20∘

30∘

40∘

10.58∘

20.84∘

30.23∘

40.25∘

(non-Σ)

(Σ13a+Σ37a)

(Σ17a+Σ5)

(Σ5)

10.83∘

20.59∘

29.9∘

40.3∘

(non-Σ)

(Σ13a+Σ37a)

(Σ17a+Σ5)

(Σ5)

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Figure captions Fig. 1

(a) Schematic of the stacked seeds and the initial growth interface; (b) the 2nd seed arrangement: the schematic of the original sector seeds were shown on the left and the photograph of the rearranged sector seeds in the crucible was shown on the right.

Fig. 2

Lifetime mappings of the brick (156 mmx156 mmx 134 mm) after cutting off the red zone for the 1st experiment. The positions of the wafers for examination were shown on the right.

Fig. 3

Grains, EPD and lifetime mappings of the wafers from the 1st brick: (a) f= 0.05 (23.4 mm); (b) f= 0.32 (H= 52.9 mm); (c) f= 0.57 (H= 82 mm).

Fig. 4

Microscopic images of the high-defect area (point A in Fig. 3): (a) f= 0.05 (H= 23.4 mm); (b) f= 0.32 (H= 52.9 mm); (c) f= 0.57 (H= 82 mm).

Fig. 5


Fig. 6

Grains, EPD and lifetime mappings of the wafers from the 1st brick: (a) f= 0.01 (H= 8.5 mm); (b) f= 0.23 (H=33.6 mm); (c) f= 0.46 (H= 60.2 mm); (d) f=0.69 (H=86.8 mm). The arrows in (d) indicate the GBs that grew away form the original circular GB.

Fig. 7

Microscopic images of EPD near the GBs: (a) H=13.5 mm; (b) H= 33.6 mm; (c) H= 60.2 mm; sg means subgrains.

Fig. 8

(a) Averaged EPD on the GBs (4-cm from the center seed) for different tilt angles at different ingot heights; (b) lifetime on the GB (4-cm from the center seed) for different tilt angles at different ingot heights.

Fig. 9

The lifetime mapping of the wafers after gettering and passivation: (a) wafer at H= 52 mm (1st experiment); (b) wafer at H=60.5 mm (2nd experiment). 17



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Fig. 10 The appearance of a solar cell made from the mono-like wafer: (a) top view; (b) 45o view.

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Fig. 1 (a)

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Fig. 1 (b)

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Fig. 2

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Fig. 3

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Fig. 4

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Fig. 5

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Fig. 6

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Fig.7(a)

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Fig. 7(b)

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Fig. 7(c)

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Fig. 8

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Fig. 9

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Fig. 10

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For Table of Contents Use Only The effect of seed arrangements on the quality of n-type mono-like silicon grown by directional solidification Y.C. Wu, A. Lan, C.F. Yang, C. Hsu, C.M. Lu, A. Yang, C.W. Lan

The minority lifetime mappings of two N-type wafers at the height H of 52.0 and 60.5 mm of the ingots grown, respectively, from two different seed arrangements. The low lifetime regions (red) were due to dislocation clusters induced form the 0o tilt junctions of the stacked seeds (left) and the splitting seeds (right).

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Table 1

16



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Figure captions Fig. 1 (a) Schematic of the stacked seeds and the initial growth interface; (b) the 2nd seed arrangement: the schematic of the original sector seeds were shown on the left and the photograph of the rearranged sector seeds in the crucible was shown on the right. Fig. 2


Fig. 3

Grains, EPD and lifetime mappings of the wafers from the 1st brick: (a) f= 0.05 (23.4 mm); (b) f= 0.32 (H= 52.9 mm); (c) f= 0.57 (H= 82 mm).

Fig. 4

Microscopic images of the high-defect area (point A in Fig. 3): (a) f= 0.05 (H= 23.4 mm); (b) f= 0.32 (H= 52.9 mm); (c) f= 0.57 (H= 82 mm).

Fig. 5


Fig. 6

Grains, EPD and lifetime mappings of the wafers from the 1st brick: (a) f= 0.01 (H= 8.5 mm); (b) f= 0.23 (H=33.6 mm); (c) f= 0.46 (H= 60.2 mm); (d) f=0.69 (H=86.8 mm). The arrows in (d) indicate the GBs that grew away form the original circular GB.

Fig. 7

Microscopic images of EPD near the GBs: (a) (a) H=13.5 mm; (b) H= 33.6 mm; (c) H= 60.2 mm; sg means subgrains.

Fig. 8

(a) Averaged EPD on the GBs (4-cm from the center seed) for different tilt angles at different ingot heights; (b) lifetime on the GB (4-cm from the center seed) for different tilt angles at different ingot heights.

Fig. 9

The lifetime mapping of the wafers after gettering and passivation: (a) wafer at H= 52 mm (1st experiment); (b) wafer at H=60.5 mm (2nd experiment). 17


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Fig. 10 The appearance of a solar cell made from the mono-like wafer: (a) top view; (b) 45o view.

18



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Fig. 1 (a)

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Fig. 1 (b)

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Front

Back

Right

Page 38 of 48

Left H=82.0mm (f=0.57) H=52.9mm (f=0.31) H=23.5mm (f=0.05)

30 μs

3 μs

Fig. 2

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f= 0.05(H= 23.4 mm)

F=0.31 (H= 52.9 mm)

f=0.57 (H= 82.0 mm)

Grains

EPD

Lifetime

A

A

A

B

B

B

Avg= 2.017 us

Avg= 2.784 us

Avg= 3.046 us

(a)

(b)

(c)

Fig. 3

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EPD=1.28×106/cm2 (2.048 μs)

EPD=2.19×106/cm2 (2.4μs)

Page 40 of 48

EPD=3.27×106/cm2 (2.65μs)

50 μm

300 μm

(a)

(b)

Fig. 4

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(c)

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Front

Back

Right

Left H=113.0 mm H=86.8mm H=60.2 mm H=33.6 mm H=8.5 mm

Junc1on of seeds 1 and 2

3 μs

Junc1on of seeds 2 and 3

30 μs

Fig. 5

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f= 0.01 (H=8.5 mm)

Page 42 of 48

f= 0.23 (H=33.6 mm) f= 0.46 (H=60.2 mm) f= 0.69 (H=86.8 mm)

Grains

EPD

Lifetime

Avg=1.598 us

(a)

Avg=2.325 us

Avg=3.070 us

Avg=3.132 us

(b)

(c)

(d)

Fig. 6

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H=13.5 mm

EPD=3.8x106/cm2 0°

2

1

1

0°

6

0°

50um 0°

2

0

0

0°

30°

30°

6

30°

3 3

0°

8

0

0

0°

sg

40°

30°

1000um

0°

0

40°

5

10°

40°

9

10°

0

40°

5 40°

8

0 7

10°

10°

10°

7

4 20°

Fig. 7(a)

26


0

10°

9

10°

4

20°

200um


1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

H=33.6 mm D: EPD=1.4x104/cm2(2.48us)

0°

C

30°

1

B: EPD=4.5x106/cm2(2.43us)

6 0

A BB

Page 44 of 48

30°

30°

6

30°

A

8

B

0

D

0°

A: EPD=3.6x105/cm2(2.36us) 0°

3

40°

5

sg

0

9

10°

1000um

8 10°

C: EPD=2x105/cm2(2.09us)

5 40°

40°

7

0

10°

10°

0

10°

4

7

0 10°

20°

Fig. 7(b)

27


10°

9

C

4

20° 200um

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H=60.2 mm

sg

D: EPD=4.8x103/cm2(3.3us)

0

A B C

1

30°

6

B: EPD=2.2x106/cm2(2.75us) A 30° 6

8

1000um

0 D

sg

1000um

A: EPD=1.2x105/cm2(3.23us)

8

sg

sg

3

B

30°

30°

40°

10°

5

10°

9

1000um

C:EPD=8x104/cm2(3.18us) 40°

5 40°

10°

0

0

0 7

10°

10°

10°

4

7

10°

20°

Fig. 7(c)

28


9 C

4

20°

200um


1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

Fig. 8

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H=52.0 mm

H=60.5 mm

Avg. = 623.61 μs (max=3.16ms)

Avg. = 418.92 μs (max=1.26ms) 10

1000 (a)

(b) Fig. 9

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Fig. 10

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Effect of Seed Arrangements on the Quality of n-Type Monolike Silicon

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