Field-effect Charge Transport in Doped Polymer Semiconductor

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Organic Electronic Devices

Field-effect Charge Transport in Doped Polymer SemiconductorInsulator Alternating Bulk Junctions with Ultrathin Transport Layers Yupeng Hu, Laju Bu, Xudong Wang, Ling Zhou, and Guanghao Lu ACS Appl. Mater. Interfaces, Just Accepted Manuscript • DOI: 10.1021/acsami.8b13601 • Publication Date (Web): 23 Oct 2018 Downloaded from http://pubs.acs.org on October 27, 2018

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ACS Applied Materials & Interfaces

Field-effect Charge Transport in Doped Polymer Semiconductor-Insulator Alternating Bulk Junctions with Ultrathin Transport Layers Yupeng Hu, † Laju Bu, † Xudong Wang, † Ling Zhou, † and Guanghao Lu*,†,‡ † Frontier Institute of Science and Technology, Xi'an Jiaotong University, Xi'an 710054, China. ‡ State Key Laboratory of Electrical Insulation and Power Equipment, Xi'an Jiaotong University, Xi'an 710049, China. Y. Hu and L. Bu contribute equally to this work.

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ABSTRACT: Conjugated-polymer field-effect transistors are attractive for flexible electronics. However, relatively high chemical doping (oxidation) concentration of p-type polymer semiconductor is usually not compatible with good transistor performance, due to poor switching off capability and short-channel performance. Here, we propose a combined simulation and experiment investigation on charge transport in semiconductor-insulator alternating bulk junction composed of repeating semiconductor and insulator regions, which shows a better transistors performance at higher doping level, as compared with traditional planar transistors. Moreover, the doped semiconductor transport layers in the junction should be less than 2 nm thick to ensure the sufficient pinch-off capability. Using some semiconductors including poly(3-hexylthiophene) (P3HT), we utilize a fast solvent evaporation approach to obtain semiconductor-insulator alternating bulk junctions with ultrathin (thickness < 2 nm) semiconductor crystallites and with vertical gradients of both morphology and electronic properties. Doping with a concentration up to 1019 cm-3 simultaneously induces the improvement of field-effect mobility, on/off ratio and subthreshold swing, which leads to a long-term (> 1 year) stability, without lowering short-channel performance. Moreover, these heterojunctions are optically transparent, nearly colorless and flexible, thus could be exploited for wide electronic and photonic applications.

KEYWORDS: field-effect transistors, conjugated-polymers, ultrathin layers, charge transport, doping.


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INTRODUCTION Polymer field-effect transistors (FETs) 1-4 could be potentially applied in next-generation flexible electronics via low-cost solution processing. The state-of-the-art mobility (higher than 1 cm2V-1s1)

of the polymer FETs has exceeded that of amorphous silicon.5, 6 However, the air stability of

such polymer FETs is still essentially not high enough to ensure their commercial applications. Ptype semiconductors, which basically have low ionization potential, are usually sensitive to oxygen, since oxidation induces chemical doping.7,8 Weakly or moderately doped polymer semiconductor layers have been wildly used to tune the performance of organic FETs2,9,10 and solar cells.11 However, relatively high doping concentration drastically degrades the performance of such devices.10,11 For FETs, higher doping level which typically contributes to higher on-current, represents significantly more free charges distributed within the entire semiconductor film, and therefore could unfortunately reduce on/off ratio, increase parasitic current and deteriorate shortchannel performance. Therefore, current research efforts are mainly focusing on the improvement of device reliability via exploiting new semiconductor polymers with higher chemical stability, optimizing device configuration or applying device encapsulation to avoid doping.8 Nevertheless, effective methods to improve the performance and reliability of FETs with substantially doped semiconductor layer will be beneficial for the organic electronic community. Recently, polymer semiconductor: insulator blends have been widely investigated.12 Although blends system could decrease the cost of semiconductor, the performance of device may be degraded by insulator diluting the current density of the film.13,14 However, by phase separation, crystalline ordering of semiconductor polymer poly(3-hexylthiophene) (P3HT) could be improved by blending with semicrystalline polyethylene, thus the field-effect mobility of the blends was comparable to that of neat semiconductor, even with a low semiconductor content.10,15-21 Moreover, Self-organization


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of the two components may make insulator in the bottom of the blends acting as gate dielectric layer to block leak current,21-23 in the top of blends acting as encapsulating layer.24 Yet, for semiconductor: insulator blends the physical correlation of charge transport with doping and geometry of transport pathways is still unclear and rarely studied, which is also a critical factor to affect the performance of the device. We carefully assume that gate-induced charge accumulation/depletion and charge transport in semiconductor: insulator blends are different from those in conventional planar FETs with 2-dimensional (2-D) semiconductor-dielectric interface. From this viewpoint, developing semiconductor-insulator bulk junctions with 3-dimensional (3D) architectures provides insights into charge transport in organic electronics. Furthermore, both top lattice insulator and bottom lattice insulator exist periodically, contributing to a non-coplanar charge transport channel. In this work, a joint simulation and experiment study is proposed to investigate the gate-induced charge accumulation/depletion and transport in polymer semiconductor-insulator alternating bulk junction. Our study shows that ultrathin semiconductorinsulator alternating superlattice could be used to largely improve the transistor performance even at a high doping level (> 1018 cm-3), as compared with traditional planar FETs. Using P3HT as a model semiconductor distributed within amorphous polystyrene (PS) insulating-matrix, we verify that semiconductor domains with thickness > 2 nm in insulator matrix is responsible for the lowered performance of such air-degraded polymer FETs. Subsequently, in order to avoid the formation of thick semiconductor domains within insulator matrix during film preparation, a fast solvent evaporation25 method is used to achieve ultrathin (thickness < 2 nm) semiconductor crystallites in insulator matrix. Such monolayer-like (nearly one molecule-chain layer) ultrathin domains are bridged by less crystalline chains in the sub-surface region, forming a multi-layerslike semiconductor-insulator architecture with vertical gradients in terms of both morphology and


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electronic properties. P-type doping by oxidation rapidly induces simultaneous improvement of field-effect mobility, on/off ratio and subthreshold swing. Once the doping concentration by oxidation reaches equilibrium, the device shows a long-term stability reaching 1 year, one order longer than that of neat P3HT or conventional P3HT: PS blend with thicker P3HT domains. This bulk junction is subsequently used to dramatically improve short-channel-performance26 which typically suffers from air-exposure for planar transistors. Moreover, these low-cost hybrid materials are optically transparent, flexible and nearly colorless, thus can be exploited for wide electronic and photonic applications.

RESULTS and DISCUSSION Simulation investigation of charge transport in semiconductor-insulator superlattice. Before simulating our non-coplanar model, it’s necessary to study the mechanism of how doping introduced by oxidation influences charge distribution and regular co-planar device performance. In this work, we studied the degradation of several thiophene-based semiconductor polymers. For clarity, here we mainly focus on P3HT as a case study. From the conductivity of neat P3HT (10-4 S cm-1) after exposure to air, we estimated the doped charge density in P3HT as high as 5×1018 cm-3. This charge density is responsible for the low on/off ratio of air-exposed FETs based on neat P3HT films. Figure. 1(a) is the charge distribution profile simulated within oxidized semiconductor film (thickness is d = 5 nm) with initial doped charge density nd =5×1018 cm-3 (dielectric, 19 nm PS on 300 nm SiO2), as calculated by one-dimensional Poisson’s equation,

e[ng ( x)  nd ( x)] d 2V ( x) ，    0 poly dx 2

(1)

with the boundary conditions,


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dV ( x) dx

x 0

Vg dielec



 poly d dielec

，

dV ( x) dx

x d

 0，

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(2)

where V(x) is the potential along location x, location 0 nm represents semiconductor-dielectric (PS) interface. e is elemental charge, ng is gate-induced hole density and nd is the charge density directly induced by chemical doping. ε0 is the vacuum dielectric constant, εpoly and εdielec are relative dielectric constant of semiconductor and dielectric. The charge density obeys FermiDirac distribution27,

ng ( x )  





g[ E  eV ( x)] dE， 1  exp[( E F  E ) / k BT ]

(3)

E is the energy of localized states, EF is Fermi level, kB is Boltzmann’s constant, T is the temperature, and g(E) is the density of states. For clarity, a Gaussian distribution is applied28, g (E) 

Nt ( E  E0 ) 2 exp[ ]， 2 2  2

(4)

where Nt is total state density, σ is width of the Gaussian distribution, and E0 is the center of the distribution. We set 1020/cm3 for Nt, 300 K for T, -5.0 eV for E0, 0.05 eV for σ, permittivity 3.5 for εdielec and 3.0 for εpoly. For dopant’s LUMO (Lowest Unoccupied Molecular Orbital) lower than that of semiconductor, electrons are mainly accumulated in dopants upon positive gate voltage. The thickness of depletion region, where the charge density could be fully depleted by gate voltage in the gate-voltage range 0 V < Vg < 40 V, is approximately 2 nm. This sublayer is typically known as buried region29, which is generally within a few nanometers from the dielectric-semiconductor interface. Furthermore, even positive gate voltage higher than 40 V could not effectively deplete the charges in the sub-region more than 2 nm away from the interface. Figure 1(b) is the measured transistor performance of P3HT film degraded by oxygen in air (source-drain voltage Vds = -5 V). The current Ids gradually decreases with the increased Vg in the positive Vg range, because poor


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subthreshold swing confirms p-type doping and that charge depletion is incomplete across the film, especially in top surface of the film. Therefore, oxidization of semiconductor film leads to poorer on/off ratio, smoother subthreshold slope, positively-shifted threshold/pinch-off voltage and degraded short-channel performance of polymer field-effect transistor.30 Figure 1 is also consistent with other general observations in planar FETs with 2-D semiconductor-insulator interface, where gate-induced charge accumulation and depletion mainly occur in a few nanometers from semiconductor-dielectric interface.29,31-33 It is a plausible method to improve the performance of degraded FETs via utilizing ultrathin semiconductor layers on an appropriate 2-D dielectric surface.34 However, from the experimental point of view, for the ultrathin film with relative high doping level, it is still difficult to utilize a planar transistor to sufficiently deplete the charge at low |Vg| due to the 2 dimensional charge depletion mechanism, while high |Vg| induces undesired gate leakage current. On the other hand, nominal ultrathin semicrystalline semiconductor polymer layer usually suffers from non-continuous morphology or poor molecular packing along in-plane charge transport direction.35,36 Therefore, we assume that nonplanar semiconductor-insulator geometry provides an alternative method to tune the charge accumulation and depletion. Subsequently inspired by metamaterials such as photonic (phononic) crystals containing regularly repeating regions of different optical (acoustic) properties for tuning light (phonon) propagation, here we propose a combined simulation and experimental investigation on alternating semiconductor-insulator bulk junction composed of repeating semiconductor and insulator regions for manipulating electrical current. This non-coplanar structure alters the structure of charge transport channel thus influencing the current flow direction, using which we can easily control the on/off manner of the device. Therefore, in Figure 2, we set up a non-coplanar FET model for


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our assumption. The length and width of the device is 100 μm and 15 cm, and the thickness of film is 4 nm. The periodic top insulator lattice is with width of 2 μm and depth of 3 nm. As for bottom lattice, the width is 10 μm with 10 nm height. The interval between top and bottom lattices is 2 μm. We then simultaneously solve two dimensional Poisson’s equation and current continuity equations,

 2V  

en

 0 poly

，

  (en E  eDn)  0，

(5)

(6)

where we set μ as a constant value for the mobility of hole and D is the diffusion coefficient acquired by Einstein relation D  k BT / e , E is the electric field. The details of equation solving are shown in method section. Firstly, we set the initial doped charge density as 5×1018 cm-3 and the semiconductor film (4 nm thick) is prepared on dielectric layer with thickness of 300 nm. Subsequently, two different types of insulator lattice (top and bottom lattice) were distributed within the film along the top and bottom parts of the film, respectively. We then simulate the charge distribution and transport in such a semiconductor-insulator alternating bulk junction. For the linear regime of the transistors (Vds = -5 V and Vg = -80 V), the gate-induced charge accumulation [Figure 2(a)] shows that charge accumulation occurs in a non-planar manner. A majority of charge either accumulated in the interface of dielectric or surface of bottom insulator lattice. For the quasi-off state [Vds = -5 V and Vg = 6 V, Figure 2(b)], the channel could be switched off effectively by the synergic function of gate and insulator domains, where the pinch-off region exists under the top lattice. It proves that the charge accumulation/depletion does not necessarily occur in the entire semiconductor-insulator interface, but could be confined within some regions spatially closer to gate, which ensures the


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rapid switching of the device. In order to further investigate the quasi-off-state, we simulate the current flow contour (Vds = -5 V and Vg = 6 V) along horizontal direction [Figure 2(c)] and along vertical direction [Figure 2(d)], basing on which we depict the current flowing direction by red arrows shown in [Figure 2(d)]. It turns out that current flows up and down between the staggered structure formed by insulator lattices and semiconductor which is nonplanar. Then, the gradual doping process of the device by air oxidation is investigated in Figure 3. Three types of OFETs were simulated, where we set Vds = -5 V and intrinsic charge mobility 0.01 cm2V1s-1.

Figure 3(a) represents the transfer curves of 12 nm conventional P3HT: PS blend with 8 nm,

6 nm for top lattices and bottom lattices, Figure 3(b) for the 4 nm UT-P3HT@PS (ultrathin-P3HT within PS) aligning with the structure in Figure 2, and Figure 3(c) for 4 nm neat P3HT. Conventional P3HT: PS blend is more sensitive to doping process, reflecting in larger threshold voltage swing and less stable than UT-P3HT@PS, on account of the thicker effective depletion thickness under the top lattices. Furthermore, as shown in Figure 3(c), the neat P3HT device with 4 nm thickness still deteriorates both in switching-off ability and stability of current compared to UT-P3HT@PS, nearly 15 V disparity in threshold voltage compared to UT-P3HT@PS. It turns out that thick domains (thickness > 2 nm) of semiconductor within insulator matrix have no significant effect on the on-current. Besides, insulator lattices in the doped film do not decrease effective field-effect mobility, which is around 10-2 cm2V-1s-1 caculated from the curves, except for the threshold voltage shift. Moreover, we study the interaction between top lattices and bottom lattices in Figure S1 by tuning the scale of both lattices. Actually, it is noted here that field-effect mobility in this work is extracted from the numerical dependence of Ids on Vg,37 and thus is different from the intrinsic mobility which is defined by average velocity of charges divided by an electric


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field. Therefore, small thickness and the stagger structure of blends synergically warrant the stability of device exposed to the air. Preparation semiconductor-insulator bulk junction with ultrathin transport layer. However, we find it currently not feasible to experimentally verify the charge transport in the periodical morphology schematically shown in Figure 2, since state-of-the-art micro-fabrication method and film preparation method could not yield simultaneously ultrathin polymer semiconductor (< 2 nm) with morphological continuity and ultrathin periodical insulator domains. Lee, J et al recently reported the similar periodically top insulator structure.24 In order to optimize the semiconductor-insulator architecture and to experimentally mimic semiconductor-insulator alternating bulk junction, we establish the P3HT: PS: o-dichlorobenzene (ODCB) quasiequilibrium tri-component phase diagram as shown in Figure 4(a), where a mixed-liquid phase region LP3HT/ODCB + LPS/ODCB is identified due to poor chemical compatibility between P3HT and PS. From the phase diagram we find that for a large P3HT: PS blending ratio (3 wt% < P3HT < 97 wt% in P3HT: PS blends), during the solvent evaporation the phase evolution could not avoid LP3HT/ODCB + LPS/ODCB phase region. That is to say, slow solvent evaporation basically induces significant island-like phase separation during solvent evaporation. Figure 4(b) is the bright-field Transmission Electron Microscopy (TEM) of conventional P3HT: PS blend (5% P3HT) prepared via conventional spincoating method with a relatively slow solvent evaporation (solvent evaporation approximately in 90 s). The domains shown by the arrows and dashed circles are P3HT thick domains, which are confirmed by the dark-field TEM [inset of Figure 4(b)]. For P3HT: PS blend prepared from a fast solvent evaporation method, a nitrogen flow over the wet film is utilized during the spincoating to accelerate the solvent evaporation (wet film dries within 30 s). Although the bright-field TEM of thus-obtained blend shows a featureless morphology [Figure


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4(c)], its electron diffraction implies a crystalline diffraction ring due to pi-pi packing, confirming that P3HT domain is crystalline, ultrathin and with short-range pi-pi aggregation. Thus, asprepared P3HT: PS blend upon fast solvent evaporation is denoted as UT-P3HT@PS (ultrathinP3HT within PS) in this work, which has P3HT content 5 wt% if not particularly stated. Shortrange intermolecular pi-pi aggregation is sufficient for charge transport, as reported recently in other semiconductor: insulator blends.38 Figure 4(d) is the light absorption spectra of sub-layers of UT-P3HT@PS measured upon etching by low-pressure oxygen-plasma which guarantees surface-selective etching without degradation of not-yet-etched materials during etching.10,39,40 For clarity, we assume that the thin film is composed of 3 sublayers including surface sublayer, sub-surface interlayer and bottom sublayer, with absorbance Asurface, Asub-surface and Abottom, respectively. The lateral dimension of P3HT, which is corresponding to the size of P3HT crystallites, is about 20 -50 nm. The transmitted light intensity (IT) after propagation through the entire film is,

I T  ( I 0  I R )10

 ( Asurface  Asub surface  Abottom )

，

(7)

where I0 and IR are incident and reflected light intensity. This treatment assumes that the absorption of UT-P3HT@PS is simply equal to the sum of the absorptions of the three sublayers.39,40 We carefully etched the film by 1-2 nm, and found that most of P3HT was removed, pointing out that the thickness of P3HT crystalline domain was less than 2 nm. In inset figure of Figure 4(d), the two absorption peaks (around 565 nm and 610 nm) of top surface sublayer are well defined, while the peak of sub-surface interlayer is 518 nm. According to the work of Spano,41 the absorption peak at 610 nm is correlated with intermolecular ordering. Figure 4(d) implies that the crystalline ordering of P3HT in surface sublayer is much higher than that in the sub-surface interlayer. From the absorption spectra at surface and sub-surface interlayers


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we find that the HOMO (Highest Occupied Molecular Orbital) of P3HT in sub-surface interlayer is ca. 0.1-0.2 eV lower than that of top surface sublayer. Actually, the absorption of sub-surface interlayer is much closer to that of regioirregular-P3HT39 than that of surface sublayer, implying that the highly ordered crystallites at the film surface sublayer are linked by less crystalline P3HT chains in the sub-surface region. From the measurements above, we propose a scheme in Figure 4(e) to show the semiconductorinsulator multi-layer architecture of UT-P3HT@PS. By comparing the sub-layer light absorption spectrum with the morphology measurements, we obtain the thicknesses of surface sublayer, subsurface interlayer and bottom sublayer that are approximately 2 nm, 2 nm and 20 nm, respectively. In-situ doping and impact of domain dimension on pinch-off capability. Heavily doped semiconductor polymer could be used as conducting materials.42,43 However, such bulk charges could induce significant bulk conductivity, which thus drastically decreases on/off ratio, shifts threshold voltages and particularly suppresses short-channel performance. Figure 5 is in-situ oxidation process experiment of conventional P3HT: PS blend, UT-P3HT@PS and neat P3HT film via exposure to “dilute air” (oxygen ~1 ppm) in terms of transistor performances. For UTP3HT@PS, it shows that oxidation induces significant increase of field-effect mobility and on/off ratio, and sharper (decrease) of subthreshold swing (Figure 5 and S2). As a comparison, from the in-situ evolution of mobility, subthreshold swing and on/off ratio, the transistor characteristics of conventional P3HT: PS are approximately a hybrid of those of UT-P3HT@PS and neat P3HT. Due to the tiny ultrathin P3HT crystallites, the oxidation could be completed within 200 minutes for UT-P3HT@PS, while the oxidation of neat P3HT is much slower, up to 1500 minutes. Thus, we assumedly propose that this difference is dominated by the absorption rate of oxygen from the diluted air environment. The transistor performance of conventional P3HT: PS is similar to that of


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UT-P3HT@PS during the first 200 minutes, and afterwards its evolution trend resembles that of neat P3HT. We ascribe this phenomenon to the fact that the morphology of conventional P3HT: PS blend is a hybrid of UT-P3HT@PS and neat P3HT, in consistent with our TEM observation (Figure 4). Therefore, the degradations of subthreshold swing and on/off ratio of conventional P3HT: PS blends are due to the thick P3HT domains in the blends which act like the P3HT domains in neat P3HT film. Figure 6(a) denotes the transfer characteristics of transistors based on conventional P3HT: PS blend and UT-P3HT@PS after exposure to air with scanning speed 10 V/s (full output and transfer characteristics, see Figure S3). Different from the transistors based on conventional P3HT: PS blend, UT-P3HT@PS device shows a hysteresis-free curve as a result of faster charge accumulation-depletion dynamic. Moreover, for conventional P3HT: PS blend, two transfer curves for Vds = -5 V and -35 V are not overlapped in the range of 0 V < -Vg < 8 V. However, such curves of UT-P3HT@PS are well overlapped, implying a better pinch-off (Figure S4) feature at low –Vg, which is corresponding to the potential profile between source and drain electrodes as measured by Kelvin Force Microscope at Vds = Vg = -5 V (Figure S5). Insets of Figure 6(a) are schemes of gate-induced charge depletion in the doped transistors in the off state for conventional P3HT: PS blend and UT-P3HT@PS, respectively. The arrow in the P3HT thick domains represents the substantial current flow though the positive gate-voltage has depleted the charges in parts of the thick domains closer to gate. Subsequently, we use Poisson’s equation (eq. 1) in combination with Fermi-Dirac distribution (eq. 3) to numerically investigate the gate-induced charge accumulation/depletion in UTP3HT@PS as a function of film-depth. For UT-P3HT@PS film, the sub-surface P3HT is less crystalline than the surface P3HT, so we set the HOMO (LUMO) offset between them as 0.1 eV.


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Charge density n(x) along the thickness direction (x direction) of P3HT: PS blend is approximately equal to the sum of charges induced by chemically doping nd(x) = n0φ(x) and gate-voltage accumulated charges ng(x), where n0 (5×1018 cm-3) is charge density in neat P3HT induced by chemical doping, and φ(x) is measured composition profile of P3HT in UT-P3HT@PS film (Figure S6). Figure 6(b) is simulated charge distribution (unit, 1018 cm-3) in UT-P3HT@PS (dielectric, 19 nm PS on 300 nm SiO2) as a function of Vg and film-depth, taking both of vertical composition gradient and HOMO gradient into account. As compared with Figure 1, Figure 6(b) shows an interesting and substantially different simulation result which proves that charges in UTP3HT@PS could be well depleted and accumulated quickly upon scanning gate-voltage. This simulation is consistent with the activation energy measurements (Figure S7). From observations and discussions above, approximately, we could numerically divide the source-drain current curves of FETs based on conventional P3HT: PS blend into two parts. Figure 6(c) is the transfer curves of air-doped FETs, where the dashed line is numerically expressed as Ids (conventional P3HT: PS blend)-Ids (UT-P3HT@PS), which is ascribed to be the source-drain leakage from thick P3HT domains. Our simulation and experimental prove that the charge accumulation/depletion does not necessarily occur in the entire semiconductor-insulator interface, but could be confined within some regions spatially closer to gate, which warrants the rapid switching of the device. Optimizing short-channel performance, long-term stability and optical transparency. Although fast solvent evaporation could be used to prepare UT-P3HT@PS when P3HT content is low enough in the blends, high P3HT concentration inevitably forms large island-like morphology due to the poor compatibility. Figure 7(a) is the dependence of subthreshold swing on P3HT


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content for slow solvent evaporation (solvent evaporation time ~90 s) and fast solvent evaporation (solvent evaporates in 30 s), respectively. Faster solvent evaporation leads to higher critical content of P3HT to obtain UT-P3HT@PS. For each P3HT: PS blending ratio, UT-P3HT@PS induces sharper (lower) subthreshold swing, as compared with conventional P3HT: PS blends with thick P3HT domains. Figure 7(b) is dependence of subthreshold swing on channel length for P3HT: PS blends with 5% P3HT. UT-P3HT@PS has a suppressed short-channel-effect and thus better shortchannel performances, as compared with conventional P3HT: PS blends. We attribute this improvement to the better pinch-off properties in UT-P3HT@PS. Figure 7(c) is the long-term stability of UT-P3HT@PS transistor in a diluted air (oxygen ~1 ppm), showing a lifetime longer than 1 year even without further encapsulation, at least one order higher than that of neat P3HT and conventional P3HT: PS blend (Figure 5) in terms of sharp subthreshold swing and high on/off ratio. Additionally, the UT-P3HT@PS is optically transparent [inset of Figure 7(c), and the spectra was obtained by subtracting the absorption of fused glass substrate] with transparency over 90% in the visible light range, which could be potentially applied in transparent electronics. In this work, possibility of subthreshold swing reduction of this device could be achieved in our future investigation, via optimization of doping concentration, dopant selection, doping concentration and morphology. Gate-stress of UT-P3HT@PS field-effect transistors especially at elevated temperature could induce charge injection into PS. Although these charges in PS act as an extra gate to modulate the charge transport in P3HT, it inevitably leads to operational instability of the device. Inspired by photonic crystals containing regularly repeating regions with different optical properties for tuning light propagation, we propose that semiconductor-insulator alternating bulk junction composed of repeating semiconductor and insulator regions is a useful system for


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manipulating charge transport.

CONCLUSIONS In this work, we propose a doped semiconductor-insulator alternating bulk junction with nonplanar ultrathin transport layer to manipulate charge transport for field-effect transistor applications. Doping rapidly induces simultaneous improvement of mobility, on/off ratio and subthreshold swing until this process reaches equilibrium which leads to a long-term (1 year) stability, which is 1 order longer than that of neat P3HT or conventional P3HT: PS blend with thicker P3HT domains. This semiconductor-insulator bulk junction significantly suppresses shortchannel-effect of doped transistors. This work shows that FETs with reliable performance could be made of intrinsically unstable (easily doped) semiconductors even at relatively high doping level. These low-cost alternating bulk junctions are optically transparent, nearly colorless and flexible, representing potential electronic/photonic applications.

METHODS To establish phase diagram, P3HT and PS were dissolved in o-dichlorobenzene (ODCB). The solution was cast on glass substrate to allow solvent to evaporate, which was monitored by an optical microscope. A glass rod was used to stir the solution during solvent evaporation to keep the concentration of the solution uniform. Once the liquid-liquid phase separation (from LP3HT/PS/ODCB to LP3HT/ODCB + LPS/ODCB) occurred, we used a glass cover slide to cover the solution, and the P3HT: PS: ODCB ratio was measured by a precision balance. The phase transition from LP3HT/ODCB + LPS/ODCB to SP3HT + LPS/ODCB was identified via color change from orange to purple. To fabricate transistors, we dissolved P3HT/PS (total concentration 8 mg/ml) in ODCB to


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prepare blends film on SiO2 (300 nm thick SiO2 on heavily n-doped silicon as gate) in glovebox. Conventional P3HT: PS blend film was prepared upon conventional spincoating method with a relatively slow solvent evaporation (spincoating for 10 s, and then wet film dried slowly in 90 s). For fast solvent evaporation, we accelerated the evaporation process by a nitrogen flow over wet film, reducing the whole time to 30 seconds. Then, to remove residual solvent/versatile dopants, these films were treated in a vacuum oven in 140 oC for 10 minutes. The gold source/drain electrodes44 were deposited in vacuum via thermal evaporation through a shadow mask with pressure below 10-6 mbar. To acquire output and transfer curves of transistors, we use an Agilent 4155C and B2902A semiconductor parameter analyzer. Formula Ids = (WCi/2Lds)μ(Vg−Vt)2 is used to calculated effective field-effect mobility μ from saturation region , where, W is the channel width (15 cm); Ci (12 nF cm-2) is the capacitance per unit area; Lds (100 μm) is the channel length; Vt is threshold voltage. The measurements were performed in dark in glovebox with 1 ppm oxygen. For gate-stress treatment to achieve nonuniform charges in PS matrix, the device was firstly applied a Vg (80 V) at 130 °C for 1 min in glovebox, and during this stress Vds was simultaneously kept at 0 V. Subsequently, the transistor was further stressed at 20 °C upon Vg scanning from 20 V to -100 V (Vd was kept at -100 V).44 Transmission electron microscopy (TEM) images were recorded using a TECNAI G2 TEM with a 200 kV acceleration voltage. The films were pealed up from the transistor after briefly exposed to HF vapor. The film was then picked up using copper grid. UV-Vis spectra were obtained by a VARIAN Cary 5000 UV-Vis-NIR Spectrophotometer. Using the same ways as device fabrication, the films were prepared on fused glass substrate by spincoating. The method for film-depth dependent light absorption is widely used elsewhere.39,40


17


Page 18 of 33

Charge transport in the repeated superlattice shown in Figure 2. Total density of state is 1020 cm-3, and the initial doped charge density is 5×1018 cm-3. We set hole mobility 0.1 cm2V-1s-1 and electron mobility 0.01 cm2V-1s-1. See Figure 2(a) for dimension and configuration of the transistor. As for 2D simulation method, finite element analysis is used for solving the Poisson’s and continuity equations. For mesh grid, we set a relative tight mesh for the interface between semiconductor and dielectric, and a sparse mesh for the other region to accelerate the calculation process. For metal semiconductor contact, we use Schottky contacts with Au electrode. For insulator interface, boundary conditions are n  J  0 and n  D  0 , where n is the normal vector of the interface and D is the electrical displacement vector difference between insulator and semiconductor. We set 0 potential for surface as the initial guess. Newton iteration is used to get the final results. Other parameters we used are listed below. Work function of 4.9 eV for Au electrode, semiconductor with gap 2.1 eV and affinity 2.9 eV, relative permittivity 3.5 for semiconductor and 3.0 for dielectric/insulator, Fermi Dirac distribution for charge distribution model.

ASSOCIATED CONTENT Supporting Information. This material is available free of charge via the Internet at http://pubs.acs.org. Detailed descriptions of film morphology and device characteristics (PDF).

AUTHOR INFORMATION Corresponding Author *E-mail: [email protected]


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Notes The authors declare no competing financial interest. Author Contributions The manuscript was written through contributions of all authors. All authors have given approval to the final version of the manuscript.

ACKNOWLEDGMENTS This work was funded by the National Natural Science Foundation of China (Grants No. 51473132 and No. 21574103). G.L. thanks Recruitment Program of Global Youth Experts (1000 plan), L. B thanks China Postdoctoral Science Foundation (2015M580841 and 2016T90910). We gratefully thank Prof. Dieter Neher, Prof. Norbert Koch, Prof. Xiaoniu Yang, Ze Yang and Prof. Yongquan Qu for experimental help and fruitful discussion/suggestion.

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(a)

(b) -1

10

10

10

0

0

10

Vg

-10 -20 -30 -40

-10

0V 5V 10 V 20 V 30 V 40 V

0

1

2 3 Location (nm)

4

-20 -30 5

-40

-2

-Ids (mA)

Charge density (1018 cm-3)

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60


-3

10

-4

10

-5

10

-80 -60 -40 -20

0

20

40

60

Vg (V)

Figure 1. Charge transport in doped planar transistor with 2-D semiconductor-dielectric interface. (a) Gate-induced charge distribution profile in oxidized semiconductor film (5 nm) in a planar transistor as simulated with initial doped charge density 5×1018 cm-3. Location 0 nm represents the semiconductor-dielectric interface. Positive gate voltage could induce more ionized dopants which accommodate electrons. (b) The measured transfer curves (Vds = -5 V) of planar transistor based on neat P3HT film oxidized in air.


1


(a)

Page 26 of 33

(b) top lattice

2 μm

cm-3 (log)

cm-3 (log)

10 μm

2 μm

bottom lattice

(c)

(d) A cm-2 I

mA cm-2

Figure 2. Simulation of charge transport in semiconductor-insulator alternating bulk junction with a dual-lattice architecture. For clarity, the dimension of dielectric and gate shown here is much smaller than what we used for simulation. (a) Charge (hole) distribution at Vds = -5 V and Vg = -80 V, the grey rectangle regions being top and bottom insulator lattices. (b) Hole distribution for quasi off-state at Vds = -5 V and Vg = 6 V. Set unit in (a) and (b), hole population as per cm3 (logarithm scale). (c, d) Current flow contour (Vds = -5 V and Vg = 6 V) along horizontal directions (c, unit is A cm-2) and along vertical directions (d, unit is mA cm-2). The dimension of the bulk junction transistor is shown in (a). S, D and G represent source, drain and gate electrodes, respectively. Initial doped charge density in semiconductor is 5×1018 cm-3. The length and width of the device is 100 μm and 15 cm, and the thickness of film is 4 nm. The periodic top insulator lattice is with


2

Page 27 of 33

width of 2 μm and depth of 3 nm. As for bottom lattice, the width is 10 μm with 10nm height. The interval between top and bottom lattices is 2 μm.

(a)

-Ids (A)

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60


(c)

(b)

10-3

10-3

10-3

10-5 Conventional PS:P3HT

10-5 UT-P3HT@PS

10-5 Neat P3HT

10-7

10-7

10-7 10-9

Doping concentration (1× 1018 cm-3) 0 1 3 5

-60

-40

-20

Vg (V)

0

20

10-9

-60

-40

-20

0

10-9 20 -60

-40

-20

0

20

Figure 3. Simulated transfer curves of three types of OFETs upon different doping concentration. (a) 12 nm conventional P3HT: PS blend device with 8 nm depth top lattices and 6 nm height bottom lattices; (b) 4 nm UT-P3HT@PS (ultrathin-P3HT within PS) device with 3 nm depth top lattices and 2 nm height bottom lattice, in consistence with Figure 2; (c) 4 nm neat planar P3HT device. Vds = -5 V and intrinsic charge mobility is 0.01 cm2V-1s-1.


3


(a)

LP3HT/ODCB + LPS/ODCB

LP3HT/PS/ODCB

0.00 1.0 0.8

0.25

0.6 0.50

1μm

lor

PS

(b)

ich o-d ne ze en ob

0.4 0.75

1.00 0.00

SP3HT+LPS/ODCB 0.25

0.50

0.2

0.75

1000 nm

0.0 1.00

P3HT

(c)

(d) 1.0

Absorbance

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

Page 28 of 33

1000 nm

PS (194 nm)

0.8

0.03

0.6

0.02

0.4

0.01

0.2

0.00

P3HT (565, 610 nm)

Bottom Surface Sub-surface

0.0

200

P3HT (518 nm)

300 400 500 600 700

400 600 800 Wavelength (nm)

(e) P3HT PS

Surface Sub-surface Bottom

Figure 4. Preparation of semiconductor-insulator alternating bulk junction. (a) P3HT: PS: ODCB quasi-equilibrium tri-component phase diagram. (b) Bright-field TEM of conventional P3HT: PS blend (5 wt% P3HT). The domains shown by the arrows and dashed circles are P3HT thick domains, and inset is its dark-field TEM. (c) Bright-field TEM of UT-P3HT@PS. (d) Light


4

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absorption spectra of different sub-layers of UT-P3HT@PS.(e) Scheme of the tri-layers architecture of UT-P3HT@PS film.


5


(a)

-1

10

-2

10

-3

2

-Ids (mA) -Ids (mA)

Vds = -100 V

UT-P3HT@PS

0

Vds = -100 V off current (mA)

10 -1 10 -2 10 -3 10 -4 10 -5 10

10

Subthreshold Swing (V/dec)

Conventional P3HT: PS blend

0

10 -1 10 -2 10 -3 10 -4 10 -5 10

-1 -1

Vds = -100 V

0

10 -1 10 -2 10 -3 10 -4 10 -5 10

Mobility (cm /V s )

(b)

-Ids (mA)

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

Page 30 of 33

Neat P3HT

-80 -60 -40 -20 Vg (V)

0

10

2

10

1

10

0


Neat P3HT

Neat P3HT

10

-2

10

-3

10

-4

10

-5

10

-6

20

UT-P3HT@PS


UT-P3HT@PS Neat P3HT


UT-P3HT@PS

0

500 1000 t (minutes)

1500

Figure 5. In-situ doping processes. (a) In-situ evolution of transfer characteristic of conventional P3HT: PS blend, UT-P3HT@PS and neat P3HT via exposure to “dilute air” (oxygen ~1 ppm). The doping time is available in (b) for clarity. (b) In-situ evolution of field-effect mobility, subthreshold swing and off-current, as obtained from (a).


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(a)

Conductivity

P3HT PS

-Ids (mA)

Dielectric Gate

0.04

0.02

Vds = -35 V

Vds = -35 V

not overlapped

Vds = -5 V

-12

(b)

-8 Vg (V)

-4

0 -16

24 18 12 6.0 0.0 -6.0 -12 -18 -24

21 18 15

-20

0 Vg (V)

20

-12

(c)

24

12 -40

0.02

overlapped

UT-P3HT@PS

40

10 -I ds(mA)

0.00 -16

0.04

Vds = -5 V

Conventional P3HT: PS Blend

Location (nm)

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60


-8 Vg (V)

-4

0

0.00

0

10

-1

10

-2

10

-3

10

-4

10

-5

10

-6

Vds = -5 V

Conventional P3HT: PS blend UT-P3HT@PS Souce-drain Leakage from thick P3HT domain

-80 -60 -40 -20 Vg (V)

0

20

Figure 6. Pinch-off properties of UT-P3HT@PS alternating bulk junction after doping in air. (a) Transfer characteristics of transistors based on conventional P3HT: PS blend and UT-P3HT@PS. The schemes represent gate-induced charge depletion in the off state of the corresponding doped transistors and the arrow in the scheme shows source-drain leakage current flow in thick P3HT domains. For clarity, the dimension of dielectric and gate shown here is much smaller than what we used for simulation and experiments. (b) Simulated charge distribution (unit, 1018 cm-3) in UTP3HT@PS as a function of Vg and location from polymer-SiO2 interface, taking vertical HOMO


7


level variation into simulation. (c) Transfer curves of UT-P3HT@PS and conventional P3HT: PS blend FETs, respectively. The dashed line is ascribed to the source-drain leakage from thick P3HT domains.

(b) Subthreshold Swing (V/dec)


100

10

UT-P3HT@PS

1 10

(c)

2 0

1

10

UT-P3HT@PS 1

90

400 600 800 Wavelength (nm)

10

100

100

150

200

UT-P3HT@PS

100

80

50

Channel length (m)

P3HT Content (%)

Transparency (%)

4

P3HT: PS blend

0

1

8 6

Conventional

10

8

10

6

10

4

10

2

10

0

on/off ratio


(a)


1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

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time (days)


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Figure 7. Electronic and optical performances of different alternating bulk junctions after doping in air. (a) Dependence of subthreshold swing on P3HT content. Solid square, slow solvent evaporation (solvent evaporation time ~90 s); open square, fast solvent evaporation (solvent evaporates in 30 s). (b) Dependence of subthreshold swing on channel length for UT-P3HT@PS and conventional P3HT: PS blend (P3HT 5%). (c) The long-term stability of UT-P3HT@PS transistor in a diluted air (oxygen ~1 ppm). Inset is its optical transparency.

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Field-effect Charge Transport in Doped Polymer Semiconductor

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