Gate- and Light-Tunable pn Heterojunction Microwire Arrays

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Gate- and Light-Tunable pn Heterojunction Microwire Arrays Fabricated via Evaporative Assembly Jae Hoon Park, Jong Su Kim, Young Jin Choi, Wi Hyoung Lee, Dong Yun Lee, and Jeong Ho Cho ACS Appl. Mater. Interfaces, Just Accepted Manuscript • DOI: 10.1021/acsami.6b15301 • Publication Date (Web): 29 Dec 2016 Downloaded from http://pubs.acs.org on December 30, 2016

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ACS Applied Materials & Interfaces

Gate- and Light-Tunable pn Heterojunction Microwire Arrays Fabricated via Evaporative Assembly Jae Hoon Park,1 Jong Su Kim,1 Young Jin Choi,1 Wi Hyoung Lee,3 Dong Yun Lee,4 Jeong Ho Cho1,2* 1

SKKU Advanced Institute of Nanotechnology (SAINT), 2School of Chemical Engineering, Sungkyunkwan University, Suwon 440–746, Korea. 3 Department of Organic and Nano System Engineering, Konkuk University, Seoul 05029, Korea. 4 Department of Polymer Science and Engineering, Kyungpook National University, Daegu, 41566, Korea. *Corresponding author: [email protected] Abstract One-dimensional (1D) nano/microwires have attracted considerable attention as versatile building blocks for use in diverse electronic, optoelectronic, and magnetic device applications. The large-area assembly of nano/microwires at desired positions presents a significant challenge for developing highdensity electronic devices. Here, we demonstrated the fabrication of cross-stacked pn heterojunction diode arrays by integrating well-aligned inorganic and organic microwires fabricated via evaporative assembly. We utilized solution-processed n-type inorganic indium-gallium-zinc-oxide (IGZO) microwires and p-type organic 6,13-bis(triisopropylsilylethynyl)pentacene (TIPS-PEN) microwires. The formation of organic TIPS-PEN semiconductor microwire and their electrical properties were optimized by controlling both the amounts of added insulating polymer and the widths of the microwires. The resulting cross-stacked IGZO/TIPS-PEN microwire pn heterojunction devices exhibited rectifying behavior with a forward-toreverse bias current ratio exceeding 102. The ultrathin nature of the underlying n-type IGZO microwires yielded gate tunability in the charge transport behaviors, ranging from insulating to rectifying. The rectifying behaviors of the heterojunction devices could be modulated by controlling the optical power of the irradiated light. The fabrication of semiconducting microwires through evaporative assembly provides a facile and reliable approach to patterning or positioning 1D microwires for the fabrication of future flexible large-area electronics. Keywords: pn heterojunction, diode, blade-coating, gate, light

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INTRODUCTION 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

One-dimensional (1D) nano/microwires have attracted considerable attention as versatile building blocks in diverse electronic,1-5 optoelectronic,6-7 and magnetic device applications.8 In particular, electronic devices that utilize these 1D nano/microwires have been widely studied because they have excellent electrical and physical properties.9-13 The hierarchical assembly of nano/microwires at desired positions is essential for developing future electronic devices by enabling dramatically enhanced data storage in a limited space. A variety of reports have described the preparation and assembly of nano/microwires using conventional top-down physical deposition or bottom-up chemical deposition techniques.14-18 The conventional synthesis and transfer of nano/microwires has required expensive and complex multistep processes that are inappropriate for applications to large-area low-cost electronics.19-20 Simple and inexpensive solution-based patterning of well-aligned microwires are strongly required for practical applications of devices based on nano/microwires. Evaporative assembly is a simple and inexpensive non-lithographic technique for patterning wellaligned 1D microwires at designated locations across a large-area substrate.21-23 This method has been widely used to fabricate various 1D microwires based on polymers,24-26 carbon nanotubes,27-28 colloidal particles,29-31 and nanorods.32 Evaporative assembly relies on controlling deposition-derived pinning and depinning processes (i.e., “stick–slip” motions) at the three-phase air–liquid–substrate contact line.33-35 Importantly, this method allows precise tuning of the microwire dimensions, including the width and spacing among microwires, through careful material selection and the manipulation of processing variables. The microwire dimensions must be tuned to optimize the electrical performances of microwire-based functional devices. The evaporative assembly method is a promising approach to fabricating microwires for use in a variety of electronic and optoelectronic devices. In this work, we demonstrated the fabrication of pn heterojunction diode arrays based on crossstacked microwires fabricated using the evaporative assembly technique. Inorganic indium-gallium-zincoxide (IGZO) and organic 6,13-bis-(triisopropylsilylethynyl)pentacene (TIPS-PEN) microwires were used as n-type and p-type semiconductors, respectively. Balanced charge transport in the n-type and p-type microwires was achieved by optimizing the formation of organic TIPS-PEN semiconductor wires and their electrical properties by controlling both the amounts of added insulating polymers and the microwire width. The resulting pn heterojunction devices exhibited ideal rectifying behavior with a forward-to-reverse bias current ratio exceeding 102, which corresponded to a low current flow under a reverse bias and a sharp current onset under a forward bias. The ultrathin nature of the underlying n-type IGZO microwires permits gate modulation, which can tune the charge transport behaviors between insulating and rectifying. The rectifying behavior of the heterojunction device could be modulated by controlling the optical powers of the irradiated light. The fabrication of semiconducting microwires through evaporative assembly can provide a facile and reliable approach to fabricating 1D microwires for the preparation of flexible large-area 2


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electronics. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

RESULTS AND DISCUSSION Figure 1a shows a schematic diagram of the procedure used to fabricate pn heterojunction diode arrays based on microwires fabricated using the evaporative assembly technique. The indium-gallium-zincoxide (IGZO) and 6,13-bis(triisopropylsilylethynyl)pentacene (TIPS-PEN) microwires were utilized as ntype and p-type semiconductors, respectively. First, the IGZO precursor solution was spin-coated onto a Si wafer (gate electrode) supporting a thermally grown 300 nm thick SiO2 layer (gate dielectric layer). The resulting IGZO film was sintered by illumination with deep-UV light under a nitrogen atmosphere to form a metal-oxygen-metal network film.23, 36-37 An angled metallic blade attached to the vertical translation stage was positioned onto the IGZO film mounted onto a linear translation stage, as shown in Figure S1. The gap between the metallic blade and the substrate was fixed to 100 µm. The poly(methyl methacrylate) (PMMA) solution was injected between the angled metallic blade and the IGZO substrate, and the solution was captured by capillary force. The nonvolatile PMMA solutes in solution migrated toward the liquid–solid contact line within the edgeward flow driven by solvent evaporation (upper panel of Figure 1b). As the substrate on the linear translation stage moved laterally through a programmed distance, the meniscus was stretched. Thus, the initial contact angle at the edge of the meniscus decreased below a critical value, at which point the de-pinning force exceeded the capillary force. As the contact line moved to a new position, the contact angle recovered its initial value, producing a PMMA microwire on the IGZO film. The repetitive moving and stopping cycles produced well-aligned PMMA microwires. The width of the microwires was controlled by varying the intermittent stopping time.22, 31 In this experiment, the moving velocity of the linear translation stage and the spacing between microwires were fixed to 1.5 mm/s and 2000 µm, respectively (lower panel of Figure 1b). The n-type IGZO microwires formed on the SiO2/Si substrate by chemically etching away the IGZO regions not protected by PMMA microwires, followed by the removal of the overlying PMMA microwires. The thickness of the IGZO microwires measured by atomic force microscopy (AFM) was 2.7 nm. The p-type semiconducting counterparts to the pn heterojunctions, that is, the TIPS-PEN microwires, were prepared on the substrate by rotation by 90°. Note that uniform TIPS-PEN microwires could not be formed using a solution containing only TIPS-PEN molecules because the small molecule properties of TIPS-PEN (not the polymer) produced an extremely low solution viscosity. The formation of the TIPS-PEN microwires was optimized by blending the polymeric PMMA (as discussed below). Figure 1c shows a photographic image of the pn heterojunction array fabricated on a 2-inch wafer. Finally, Al and Au were patterned through thermal evaporation to form contact electrodes for, respectively, the IGZO and TIPS-PEN semiconducting microwires (inset of Figure 1c). The electrical properties of the individual n-type and p-type microwires fabricated using the topcontact and bottom-gate transistor geometry through evaporative assembly were evaluated. An n-type IGZO 3



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single microwire with a width of 13.8 µm was fabricated onto the SiO2/Si substrate, and Al was thermally deposited to form source/drain electrodes, as shown in Figure 2a. Figure 2b shows the transfer characteristics (drain current (ID) versus gate voltage (VG)) of the IGZO single-microwire FETs at a fixed drain voltage (VD) of +20 V. The devices exhibited typical n-channel behavior, in which the drain current level increased with the gate voltage. The average electron mobility of the IGZO FETs was 0.52 cm2V–1s–1, the on/off current ratio was 8 × 104, and the threshold voltage was –1.6 V. The drain current level measured at VG = +60 V was on the order of a microampere. The output characteristics in Figure 2c reveal a reasonable linear and saturation behavior with increasing VD. A pn heterojunction diode required fabrication of a p-type counterpart with a current level comparable to that of the n-type IGZO microwire.38 Organic TIPS-PEN microwires were used, and Au was patterned to form source/drain electrodes. The TIPS-PEN microwires could not be formed on the SiO2 surface using toluene containing only TIPS-PEN molecules (Figure S2) due to the poor stick–slip motions of the low-viscosity TIPS-PEN solution. The surface tension of a the solution with a low viscosity is stronger than the van der Waal’s interactions between the solution and substrate, which can interrupt the stick–slip motions of the solution at the pinning line and the de-wetting of the solution. Therefore, wire formation was optimized by adding a polymeric insulating material, PMMA. Figure 2d shows optical microscopy (OM) images of the TIPS-PEN microwires blended with PMMA in various volume ratios (TIPS-PEN:PMMA = 1:4, 1:6, and 1:9). As the amount of added PMMA increased, uniform TIPS-PEN microwires with clear edges were obtained because the surface tension of the solution was effectively reduced with the assistance of polymeric PMMA during solvent evaporation. The relatively strong interactions among PMMA polymer chains compared with TIPS-PEN enhanced the formation of wellresolved microwires. Figure 2e shows the representative transfer characteristics of FETs prepared based on a TIPS-PEN single microwire fabricated using different PMMA ratios at a fixed VD = –20 V. Interestingly, the electrical properties of the TIPS-PEN FETs gradually increased with the amount of added PMMA, despite the insulating nature of the PMMA. The hole mobility of the device increased from 0.03 to 0.17 cm2V–1s–1 as the added PMMA was increased. The immiscibility between the TIPS-PEN and PMMA, which originated from the large Flory–Huggins interaction parameter, induced segregation among TIPS-PEN molecules. This led to effective π-π stacking among TIPS-PEN molecules, which promoted lateral charge transport. Unfortunately, these differences could not be detected by x-ray diffraction or atomic force microscopy because the microwires contained small amounts of TIPS-PEN. An increase in the drain current upon the addition of PMMA was also observed in the output characteristics (Figure 2f), although this increase was not comparable to that observed in the IGZO single microwires (see Figure 2c). The current level of the p-type TIPS-PEN single microwire was further optimized by varying the microwire width through control over the intermittent stopping times of the linear translation stage. Optical microscopy images of the TIPS-PEN microwires prepared with different widths are shown in Figure 2g. As 4


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the intermittent stopping time increased from 1 to 3 s, the microwire width increased linearly from 4.8 to 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

15.1 µm. Figure 2h shows the transfer characteristics of the p-type FETs prepared based on TIPS-PEN single microwires prepared with various widths. FETs prepared using TIPS-PEN microwires with widths of 15.1 µm exhibited an electron mobility of 0.20 cm2V–1s–1, an on/off current ratio of 3 × 104, and a threshold voltage of 1.9 V. The drain current level measured at VG = –60 V was found to be 0.8 µA. The output curves (Figure 2i) indicated that the drain current level increased linearly with the microwire width. Consequently, p-type TIPS-PEN semiconducting microwires performed comparably to the n-type IGZO microwires by optimizing both the amount of added insulating polymer and the width of the microwires. The optimized n-type IGZO microwires and the p-type TIPS-PEN microwires were cross-stacked to fabricate pn heterojunction diodes, as shown in Figure 3a. Au, which provides a high work function of 5.1 eV, and Al, which provides a low work function of 4.3 eV, were used as the contact electrodes for the p- and n-type microwires, respectively, to minimize rectification by the Schottky junction formed between the metal and semiconducting microwires.39-40 This was confirmed by the linear or nearly linear current–voltage behaviors of the individual n-type and p-type microwires (Figure S3). Figure 3b shows the current–voltage characteristics of a cross-stacked pn heterojunction. The Al electrode in contact with the IGZO microwire was grounded, whereas the voltage applied to the Al electrode was swept from –20 to +20 V. The devices exhibited clear current rectification due to the built-in potential formed at the IGZO/TIPS-PEN junction. Low current flow was observed in the reverse bias regime (V < 0), as the built-in potential increased at lower applied voltages, whereas the reduced potential barrier (induced by the increased applied voltage) yielded a sharp current increase in the forward bias regime (V > 0). The band structures of the pn heterojunction diodes are shown in Figure 3c. The rectification ratio, which is defined as the ratio of the forward current (IF) to the reverse current (IR), was around 102 at V = +20/–20 V. The cross-stacked pn-heterojunction diodes exhibited strong gate- and light-tunable rectification characteristics. The gate voltage dependence of the rectification behavior was investigated. Figures 3d and 3e show linear and semi-log plots of the output characteristics under various back gate voltages (VGs), respectively. As VG increased from –20 to +20 V, the current in the forward bias regime increased gradually; however, the current in the reverse bias regime remained constant, VG = +10 V. Further increases in VG beyond +10 V abruptly increased the current level by one order of magnitude. Figure 3f summarizes the rectification ratio of the device as a function of VG. The rectification ratio increased to 184 as VG increased from –20 to 10 V, although the rectification ratio decreased for VG values exceeding 10 V. The back gate voltage simultaneously tuned the doping concentrations of the vertically stacked n- and p-type semiconductors. The gate tunability of the rectifying behavior originated from the ultrathin nature of the underlying IGZO microwires (2.7 nm).41-42 The cross-stacked pn heterojunction diode characteristics as a function of the gate voltage could be understood in terms of the schematic band diagrams shown in Figure 3g. As the gate voltage increased from –20 to +20 V, the Fermi level shifted gradually upward. The pn 5



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heterojunction transitioned from a p+-n– junction at VG = –20 V to an n-n+ junction at VG = +20 V. At more negative values of VG (red regime), the currents in the forward region were limited by the electrostatic depletion of IGZO to the lightly n-doped (n–) or nearly intrinsic states, leading to poor rectification. As VG increased toward positive values, up to +10 V (green regime), on the other hand, the rectification behavior increased dramatically due to the greater number of free electrons present in IGZO in the n+-doped state. For VG > +10 V (blue regime), the small band gap in the TIPS-PEN (1.7 eV) compared with the band gap in the IGZO (3 eV) permitted electrostatic inversion of TIPS-PEN from intrinsic to n-doping states, which increased the reverse bias current.43-45 Consequently, the rectification behavior was reduced. Overall, the gate voltage effectively tuned the rectification behavior of the cross-stacked pn heterojunction diode. The light-tunable rectification behavior of the cross-stacked pn heterostructure diode was investigated. Light with different illumination powers ranging from 10 to 1000 µW and a fixed wavelength of 650 nm was directed onto the junction region, and the photocurrent of the device was measured. A wavelength of 650 nm was selected because the TIPS-PEN layer exhibited a maximum absorption peak at 650 nm, as shown in the inset of Figure 4a. Figure 4a shows the photoresponse of the pn heterojunction diodes collected at VG = 0 V under light illumination. The current increased dramatically upon light illumination. The built-in potential formed at the pn heterojunction dissociated photogenerated excitons near the depletion region, which generated a photocurrent in the devices; however, the junction area was small (208 µm2) compared to the relatively long microwire length (400 µm). The electric field induced by the small built-in potential was not strong enough to induce dissociation of the photo-generated excitons. Therefore, an external electric field was required to extract the charges at each electrode. The illuminationdependent output characteristics were obtained under various gate voltages (Figure 4b and S4). The photocurrent of the devices (Iph = Iilluminated – Idark) at VG = 20 V as a function of the gate voltage is summarized in Figure 4c. The photocurrent increased gradually with the illumination optical power. A larger number of excitons was generated in the depletion region, and these charges contributed to the photocurrent of the devices as the illumination power increased. Note that the photoresponse of the device exhibited a strong gate voltage dependence. The maximum photocurrent obtained under an illumination power of 1 mW was 0.46 µA at VG = +10 V. The photoresponsivity, which was defined as the photocurrent divided by the illumination power (Iph/P), was estimated at each gate voltage, as shown in Figure 4d. A maximum photoresponsivity of 13.7 mA/W was obtained at VG = +10 V under an illumination power of 10 µW. As a result, the light illumination effectively tuned the rectification behavior of the cross-stacked pn heterojunction diode.

CONCLUSION In summary, we fabricated a gate- and light-tunable pn heterojunction diode array using the evaporative assembly technique. The device was composed of cross-stacked n-type IGZO microwires and p6


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type TIPS-PEN microwires. The resulting cross-stacked IGZO/TIPS-PEN microwire pn heterojunction 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

device exhibited rectifying behavior with a forward-to-reverse bias current ratio exceeding 102. These rectifying characteristics could be effectively controlled by manipulating both the applied gate bias and the illumination light power. Microwire fabrication via the evaporative assembly technique and its application to the pn heterojunction device enables large-area, low-cost, and facile methodologies for the fabrication of future electronic devices.

METHODS Device fabrication: The precursor of IGZO was prepared by dissolving 0.085 M of indium nitrate hydrate (In(NO3)3xH2O, 0.0125 M gallium nitrate hydrate (Ga(NO3)33H2O, and 0.0275 M zinc acetate dehydrate (Zn(CH3COO)22H2O) in 10 mL of 2–methoxyethanol. The prepared solution was stirred at 75 °C for 12 h prior to use. The 4 mg mL–1 poly(methyl methacrylate) (PMMA) solution were prepared by dissolving PMMA (MW = 996,000) in toluene. The 4 mg mL–1 6,13–bis(triisopropylsilylethynyl)pentacene (TIPS–PEN) blended with PMMA at various volume ratios was dissolved in toluene. All solutions were filtered with a 0.5 µm polytetrafluoroethylene (PTFE) membrane. The silicon wafers were cleaned by the sonication in each of acetone, isopropanol, and deionized water for 10 min and then followed by drying with nitrogen. The IGZO solution was spin–coated onto Si wafer at 4000 rpm for 30 s and sequentially dried for 1 min on a 60 °C hot plate. The IGZO layer was sintered by using a high–density deep–UV treatment (UV253H, Filgen) under nitrogen atmosphere for 2 hr. The PMMA microwire was patterned onto the IGZO–coated Si wafer and then the unprotected regions were wet–etched using the 4 % LCE–12 solution. Subsequently, the substrate was rotated by 90° and the TIPS–PEN microwires blended with PMMA were patterned. Finally, The 40 nm– thick Au and Al top electrodes were thermally evaporated through shadow mask under 10–7 Torr. Evaporative self–assembly: The flow–coating setup consisted of an angled polymer blade attached to a vertical translation stage and linear translation stage attached to a piezo nanopositioner (Physik Instrumente (PI) GmbH & Co. KG). The blade was fixed rigidly at 40° angle to the vertical translation stage. The distance between the substrate and the blade was fixed to be 100 µm. The 12 µL toluene solution containing PMMA or TIPS–PEN/PMMA was injected between the angled blade and the substrate. The linear translation stage was moved at a velocity of 1.5 mm/s, with various intermittent stopping times. Characterizations: The optical absorption of the samples was obtained by UV–vis spectrophotometer (Agilent 8453).

The electrical characteristics of the pn heterojunction diodes were measured at room

temperature in a dark environment using Keithley 2400 and 236 source/measure units. The monochromatic laser (Susemicon) with wavelength of 655 nm was used as the light source. The optical laser power was varied from 10 µW to 1 mW using an optical attenuator (Thorlabs NDC–50C–4M) and was measured using a laser power meter (Thorlabs PM 100D). 7



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ASSOCIATED CONTENT 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

Supporting Information. The Supporting Information is available free of charge on the ACS Publications website at DOI: Photographic images of flow–coating setup; Optical microscopy image of the TIPS-PEN microwire fabricated using only TIPS-PEN solution without PMMA; Current–voltage characteristics of the IGZO microwire, the TIPS–PEN microwire, and the IGZO/TIPS–PEN heterojunction; Illumination power– dependent current–voltage characteristics of the cross–stacked pn heterojunction diodes at various gate voltages under light illumination with a fixed wavelength of 650 nm.

AUTHOR INFORMATION Corresponding Author *E-mail: [email protected]

Notes The authors declare no competing financial interest.

Acknowledgements This work was supported by the Center for Advanced Soft-Electronics funded by the Ministry of S cience, ICT and Future Planning as Global Frontier Project (2013M3A6A5073177) and the Basic Science Research Program (Code No. 2016R1C1B2013176) of the Ministry of Science, ICT and Future Planning, Korea.

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Figure 1. (a) Schematic illustration of the procedure used to fabricate the cross-stacked microwire pn heterojunction diode arrays using the evaporative self-assembly technique. (b) Schematic illustration of the formation of the PMMA microwire pattern on the IGZO film. The lower panel shows the velocity of the linear translation stage as a function of time. (c) Photographic image of the wafer-scale pn heterojunction array. The inset shows a top-view photographic image of a cross-stacked microwire pn heterojunction diode.

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Figure 2. (a) Optical microscopy image of FETs prepared based on an n-type IGZO single microwire. The lower panel shows an AFM image and the height profile of a single IGZO microwire. (b) Transfer characteristics (ID vs. VG) and (c) output characteristics (ID vs. VD) of the IGZO single-microwire FETs. (d) Optical microscopy images of the TIPS-PEN microwires prepared with various volume ratios of PMMA. (e) Transfer characteristics and (f) output characteristics of the FETs based on the TIPS-PEN single microwires prepared with various PMMA volume ratios. (g) Optical microscopy images of a TIPS-PEN single microwire prepared with various widths. (h) Transfer characteristics and (i) output characteristics of the FETs prepared using TIPS-PEN single microwires with various widths.

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Figure 3. (a) Schematic illustration of the cross-stacked microwire pn heterojunction diodes consisting of ntype IGZO and p-type TIPS-PEN microwires. (b) Current–voltage characteristics of the pn heterojunction diode. The inset shows a semi-log plot. (c) Schematic band diagram of the pn heterojunction diode. (d) Linear and (e) semi-log plots of representative current–voltage characteristics of the pn heterojunction diodes at various gate voltages. (f) Rectification ratio of the pn heterojunction diode as a function of the gate voltage. (g) Schematic band diagrams explaining the gate tunability of the pn heterojunction diode.

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Figure 4. (a) Current–voltage characteristics of the cross-stacked microwire pn heterojunction diode under dark conditions (black) or light illumination at a fixed wavelength of 520 nm and an optical power of 1 mW (blue). The inset shows the UV-vis absorption spectra of the IGZO and TIPS-PEN films. (b) Current–voltage characteristics of the pn heterojunction diodes at VG = –5 and +5 V under illumination at various optical powers and a fixed wavelength of 520 nm. (c) Photocurrent at VD = 20 V and (d) responsivity of the pn heterojunction diode as a function of the gate voltage.

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Gate- and Light-Tunable pn Heterojunction Microwire Arrays

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