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Oct 26, 2015 - ABSTRACT: Understanding charge trapping in a polymer dielectric is critical to the design of high-performance organic field-effect tran...
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Gate-bias Stability Behavior Tailored by Dielectric Polymer Stereostructure in Organic Transistors Junghwi Lee, Honggi Min, Namwoo Park, Heejeong Jeong, Singu Han, Se Hyun Kim, and Hwa Sung Lee ACS Appl. Mater. Interfaces, Just Accepted Manuscript • DOI: 10.1021/acsami.5b08414 • Publication Date (Web): 26 Oct 2015 Downloaded from http://pubs.acs.org on November 1, 2015

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Gate-bias Stability Behavior Tailored by Dielectric Polymer Stereostructure in Organic Transistors Junghwi Lee1†, Honggi Min1†, Namwoo Park1, Heejeong Jeong1, Singu Han1, Se Hyun Kim2*, and Hwa Sung Lee1* 1

Department of Chemical & Biological Engineering, Hanbat National University, Daejeon 305-719, Korea 2

Department of Nano, Medical and Polymer Materials, Yeungnam University, Gyeongsan 712-749, Korea *Corresponding author. E-mail: [email protected] (S. H. Kim), [email protected] (H. S. Lee) † These authors (J. Lee and H. Min) contributed equally. Keywords: Polymer stereostructure; organic field-effect transistor; polymer dielectric; configurational arrangement; operational stability.

Abstract Understanding charge trapping in a polymer dielectric is critical to the design of highperformance organic field-effect transistors (OFETs). We investigated the OFET stability as a function of the dielectric polymer stereostructure under a gate bias stress and during longterm operation. To this end, iso-, syn-, and atactic poly(methyl methacrylate) (PMMA) polymers with identical molecular weights and polydispersity indices were selected. The PMMA stereostructure was found to significantly influence the charge trapping behavior and trap formation in the polymer dielectrics. This influence was especially strong in the bulk region, rather than in the surface region. The regular configurational arrangements (isotactic > syntactic > atactic) of the pendant groups on the PMMA backbone chain facilitated closer packing between the polymer inter-chains and led to a higher crystallinity of the polymer dielectric, causing a reduction in the free volumes that act as sites for charge trapping and air molecule absorption. The PMMA dielectrics with regular stereostructures (iso- and synstereoisomers) exhibited more stable OFET operation under bias stress compared to devices prepared using irregular a-PMMA in both vacuum and air.

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1. Introduction For several decades, organic field-effect transistors (OFETs) have been widely investigated as the driving units in flexible displays, radiofrequency identification tags (RFID), and chemical or biological sensing applications.1-5 Significant progress in material synthesis (semiconductors, dielectrics, and conductors), device physics, and engineering has advanced the potential to pioneer emerging devices.6-12 Several issues must be addressed before OFETs, nevertheless, may be commercialized. In particular, the charge carrier mobility is low and device stability tends to be poor under environmental and operational conditions.11,16-19 In addition, operational instability under bias stressing, which manifests as a change in the drain current (ID) and a shift in the threshold voltage (∆Vth), is a pressing problem that must be resolved to improve the durability of device operation.11,13-19 Although considerable efforts have been devoted toward understanding bias stress instabilities in OFETs, an accurate understanding of the mechanisms remains unclear. Prior research has found that bias stress instability in OFETs may have several causes: environmental substances (including H2O and O2); and charge trapping in the semiconductor or dielectric, or at the interface between the two.11,13-19 Environmental causes can be readily overcome by encapsulating the device (in fact, encapsulation is mandatory for OFETs because most organic semiconductors are reactive with H2O and O2).20-22 Hence, it is necessary to specifically investigate charge trapping phenomena, such as the actual locations and lifetimes of charge traps, and the trapping–detrapping mechanism. Research into the stability of OFETs prepared with polymer dielectrics advances OFETs ahead of other systems, including inorganic-based dielectrics, because OFETs provide mechanical flexibility. Among polymer dielectrics investigated to date, fluorinated dielectric materials have allowed OFETs with improved operational stability. For instance, Hwang et al. reported on n- and p-channel top-gate OFETs that use an Al2O3/CYTOP bilayer gate dielectric to achieve excellent environmental and operational stability. However, development of non-fluorinated polymer dielectrics is still valuable. This is because non-fluorinated polymers are processed from more environmentally-friendly solvents and are less expensive. When non-fluorinated polymer dielectrics are used as gate-dielectrics, an important area of research remains to establish the relation that exists between the bias-stress instability and the energetic barriers formed at the semiconductor/dielectric interface.25-27 During prolonged periods of bias stressing, free carriers in the channel are forced to migrate toward localized

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states in the dielectric because the electric field is applied perpendicular to the channel direction. As a result, immobile charges trapped in the dielectric decrease the number of free carriers present in the channel, giving rise to bias stress instability. The magnitude of the instability depends strongly on the energetic barrier at the interface.25-27 Cho groups reported that polymer chain ends in a polymer dielectric act as trap sites for carriers that have migrated into the polymer bulk under bias stress.28 Polymer chain ends, the density of which is inversely proportional to the molecular weight (MW) of the polymer chain, can increase the free volume in the bulk and consequently lead to increased capture of water. Therefore, device instability under bias stress can be mitigated by using high-MW polymer dielectrics. The microstructure of a polymer film is strongly influenced by the stereostructure, defined as the configurational arrangements of atoms in the repeat unit of the polymer chain.29-34 Polymers have three types of stereostructures: isotactic (iso-), syndiotactic (syn-), and atactic (a-). An iso-polymer has the same configuration in all repeat units.29-34 A synpolymer also has a regular configuration that alternates from one repeat unit to the next. By contrast, an a-polymer shows no regularity in the configurations of the repeat units. The stereostructures of a polymer significantly influence the molecular packing structure of each polymer chain, which determines the physical properties of the polymers (e.g., the crystalline structure, chain dynamic, mechanical/electrical strength).29-34 Given these polymer physics, the stereostructure is likely to affect the charge trapping behavior in a polymer gate-dielectric and the electrical stability of a resulting OFET. Most previous studies have neglected the stereostructural effects in polymer gate-dielectrics. The present study investigated the effects of the polymer stereostructures in a gatedielectric on the electrical properties of OFETs. Poly(methyl methacrylate)s (PMMAs), which may exist in any of three stereoisomers (iso-, syn-, and a-polymer) with various configurational arrangements of the pendant methyl methacrylate substituents along the polymer backbone, were used as a model polymer dielectric. The additional effects of the polymers on the OFET performances were excluded by controlling the molecular weight (MW), polydispersity index (PDI), and polymer dielectric thickness in this study. These configurations were expected to affect the mechanical and electrical properties of the PMMA, as well as the device performances of the OFETs. In this study, we explored how the stereostructure of a polymer gate-dielectric correlates with the bias-stress stability displayed by bottom-gate OFETs. Insights into the charge trapping mechanisms underlying the polymer

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gate dielectrics were sought by systematically examining the relation between the polymer thickness and the current decay behavior. We found that the iso-PMMA provided the most stable OFET operation under bias stress compared to the syn- and a-PMMAs. This result could be explained in terms of the differences between the main chain configurational arrangements and the subordinate chain packing crystalline structures. This study improves our understanding of the physical mechanisms that affect long-term OFET operational stability and facilitates the design of polymer gate-dielectrics for use in OFETs with good bias stress stability.

2. Experimental 2.1. Materials and device fabrication A highly doped n-type silicon wafer with a 100 nm thick oxide layer was used as the substrate and the gate electrode. Prior to treating the SiO2 surface, the wafer was exposed to UV/ozone (253.7 nm) for 30 min. Hydroxyl groups were removed from the SiO2 surface by treating the surface with hexamethyldisilazane (HMDS, Aldrich), followed by baking (120°C, 1 h) and HMDS spin-coating. iso- (MW = 100 kDa, PDI = 1.08), syn- (MW = 100 kDa, PDI = 1.10), and a-PMMAs (MW = 100 kDa, PDI = 1.03) were purchased from Polysciences, Inc., and were spin-coated onto the SiO2 substrate from toluene solutions. The substrates were dried for 24 hr in a vacuum to remove the residual solvent and then annealed for 2 hr at 120°C to remove pinholes from the film. 50 nm thick pentacene (Aldrich Chemical Co., no purification) films were thermally evaporated onto the PMMA substrates at a rate of 0.2 Å/s and at a substrate temperature of 30°C under a base pressure of approximately 10−7 Torr. 50 nm thick Au layers were used as the source and drain electrodes with a channel length and width of 200 and 1000 µm, respectively.

2.2. Characterization The thicknesses of the PMMA film coatings on the SiO2 surface were measured using both ellipsometry (M-2000V, J. A. Woollam Co., Inc.) and an alpha-step profilometer (Dektak 150, Veeco). The root-mean-square (rms) roughness values were obtained from AFM (Digital Instruments Multimode) measurements conducted over 5 x 5 µm2 scan areas in the tapping mode using Si tips (42 N/m and 320 kHz). Two-dimensional grazing incidence X-ray diffraction (2D GIXD) studies were performed to investigate the crystalline structures of the

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pentacene films. These studies were carried out at the Pohang Accelerator Laboratory (PAL), Korea. The pentacene film morphologies were measured using AFM methods. The current– voltage characteristics and bias stress behaviors of the OFET devices were examined by operating the OFETs under a negative applied gate bias. The source electrode was grounded and the drain electrode was negatively biased. The changes in the electrical properties under light illumination were measured by directing a white beam (26 mW/mm2) onto the device during the recovery process. All electrical properties of the devices were obtained at room temperature using a HP4156A instrument under vacuum (10–4 Torr) or ambient conditions.

3. Results and discussion Prior to measuring the electrical performances of the OFETs, the surface characteristics of the polymer dielectrics were determined (including the surface energy, roughness, and functionalities). These characteristics are critical to OFET performance because they affect the morphological and crystalline structures of the semiconductor film grown on the surface, trap formation at the semiconductor/dielectric interface, and the surface potential, which can modulate the carrier density in the channel.10, 35-40 The thickness values of the films were controlled based on the results shown in Figure S1. Figure S2 shows the surface topologies of 450 nm thick iso-, syn-, and a-PMMA films prepared on 100 nm thick SiO2/Si substrates. All PMMA films exhibited smooth surface morphologies without any predominant features, and the root-mean-square roughness (Rq) values were similar, around 0.35 ± 0.03 nm. The surface energy for each polymer was 45.8 mJ/m2, as listed in Table 1. These results suggest that the surface characteristics of PMMA do not depend on the polymer stereostructure. The morphologies of the pentacene films deposited onto the PMMA dielectrics were characterized using AFM. Figures 1(a), (b), and (c) show AFM images of 5 nm thick pentacene films during the early growth stages on the iso-, syn-, and a-PMMA films, respectively. In the three cases, numerous low-dimensional islands formed during the initial stages of pentacene film growth. The step heights of these islands were 3.2 – 5.0 nm, which corresponded to a thickness of 2 – 3 pentacene layers, assuming slightly inclined standing-up pentacene molecules.35 As the thickness of the deposited pentacene continued to increase, the islands grew laterally and eventually coalesced. 10 nm thick pentacene films were found to be deposited onto the iso-, syn-, and a-PMMAs, as shown in Figures 1(d), (e), and (f), respectively. Similarities between the surface characteristics of the PMMAs prepared with

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different tacticities, as shown in Table 1, led to comparable growth of the pentacene films deposited onto the PMMA surfaces in the three cases. In general, the surface energy and roughness are crucial determinants of the growth mechanism of acene-based organic semiconductors.36-39 Our observation of similar morphological properties of the deposited pentacene films grown on the iso-, syn-, and a-PMMA surfaces is therefore reasonable and expected. The crystalline structures (crystallinity and ordering) of the pentacene films were also similar as well, as shown in Figure S3. We therefore excluded the possibility that the morphological and crystalline properties of the deposited pentacene films would affect the electrical properties and charge carrier transport in the OFETs. Interestingly, the leakage current behaviors of the iso-, syn-, and a-PMMA gate-dielectrics were closely related to their stereostructures. Figure 2 shows the current density–electric field (Ileakage vs. E) characteristics of the iso-, syn-, and a-PMMA films sandwiched between top Au and bottom heavily-doped Si electrodes (the device structure is described in the inset of Figure 2). The iso-PMMA device provided the lowest Ileakage with value of ca. ~ 10–9 A/cm2 in the voltage range from 0 to 2 MV/cm, while the syn-PMMA device exhibited Ileakage values at least 3 times larger, ca. 3 x 10–9 A/cm2 up to 1 MV/cm; however, at Ileakage values in excess of this threshold, an abrupt increase in Ileakage was observed (10–5 A/cm2 at 2 MV/cm). The aPMMA device showed a huge Ileakage at even values of E, and eventually yielded the highest value (~ 10–4 A/cm2) recorded among the three polymer cases. The Ileakage value measured in the polymer dielectrics is closely related to the packing density of the polymer chains in the bulk: denser packing among the polymer chains usually increases the dielectric strength of the polymer film.41-43 In our studies, the iso-PMMA may have had the highest packing density among the polymer chains, as compared to the syn- and a-PMMAs, due to the higher crystallinity of the iso-PMMA as a result of the regular configurational arrangements of the pendant methyl methacrylate substituents along the polymer backbone.29,31,34,44-48 This higher packing density induced by the polymer crystalline structures efficiently reduced the free volume in the polymer film,49,50 which acted as a path for Ileakage upon application of E. That is, the Ileakage behavior displayed in Figure 2 was related to the stereostructure of the PMMA, which affected the crystalline structures and the molecular packing density in the bulk PMMA films. The dielectric strength, therefore, increased in the following order, a-, syn-, and iso-PMMAs.

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Figure 3 shows the drain current–gate voltage (ID–VG) transfer characteristics of topcontact pentacene FETs prepared using iso-, syn-, or a-PMMA-coated 100 nm SiO2 dielectrics. A schematic diagram of the top-contact OFET architecture used in this work is illustrated in the inset of Figure 3(a). The dielectric systems combined top PMMA layers (450 nm) and a 100 nm thick thermally-grown SiO2/Si substrate to rule out charge injection effects from the gate into the dielectrics. The field-effect mobility (µFET) and threshold voltage (Vth) were calculated from the fits in the saturation regime (drain voltage VD = –60 V). The electrical characteristics of these OFETs were examined by measuring over 10 devices for the each PMMA case and summarized in Table 1. The OFETs prepared using each of the three PMMA polymers yielded similar µFET values, an on/off current ratio (Ion/off), and a threshold voltage (Vth), regardless of the PMMA stereostructure. As noted above, charge carrier transport in the OFETs was significantly affected by the pentacene film structures (crystalline nature and grain morphology) and the dielectric surface properties (surface functionality and roughness) at the interface between the semiconductor and the dielectric, which are directly related to charge trap formation.36-39 The results obtained here demonstrated that similar OFET performances were obtained from the iso-, syn-, and a-PMMA dielectrics, indicating that the stereostructural effects of the PMMAs did not influence the device performance. The variations in Vth revealed that the iso-PMMA case exhibited a slightly more negative Vth of –23 V, as compared to the syn- and a-PMMA cases, which yielded –21 V and –20 V, respectively (Figure 3 and Table 1). This behavior may have arisen from differences in the Ci value, which determined the charge carrier density (Q) that accumulated at the a few nanometer thick semiconductor/dielectric interface (channel region) under an applied VG, as described by Q = Ci × VG. Given that the interface trap densities induced by the pentacene film structures were quite similar, the OFET with the smaller Ci required a higher VG (more negative VG in the case of the p-type semiconductor) to fill the traps with free charge carriers. In general, the Ci of a polymer is proportional to the polarization induced by polar functionalities aligned along the external electric field.18,19 As the free volume in the polymer dielectrics decreases due to close packing among the polymer chains, the motions of each polar functionality in response to the electric field may be restricted due to steric hindrance.42,49,50 This effect decreases the Ci of the polymer film, which explains why the isoPMMA exhibited the lowest Ci and the highest Vth among the three stereoisomers.

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Interestingly, the bias stress instabilities of the pentacene-FETs prepared with iso-, syn-, or a-PMMA dielectrics showed dramatically different trends. Figures 4(a) and (b) show the time-dependent ID decays under constant bias stress in the OFETs prepared with iso-, syn-, or a-PMMA dielectrics under vacuum (~10–3 Torr) or air (humidity of 45%) conditions, respectively. A sustained VG (–40 V) and VD (–5 V) were applied to the devices over a period of 2 hr. The device structures and dimensions were identical. Under vacuum (Figure 4(a)), the iso-PMMA device showed an ID decay of 51% after a 2 hr bias stress relative to the initial state, ID(0). By contrast, ID decayed in the syn- and a-PMMA cases to 71% and 88% of their initial values, respectively. These results indicate that the regular PMMA stereostructures improved the bias stress stabilities in the OFETs. Because all pentacene FETs (iso-, syn-, and a-PMMA devices) had pentacene films with similar morphological and crystalline structures at the semiconductor/dielectric interface, the stereostructure-dependent bias stress stability behavior revealed that the ID decay due to bias stressing was closely affected by charge trapping in the bulk region of the PMMA dielectrics, rather than at the interface. We assumed that the free volumes that were altered by the PMMA stereostructure played a critical role in determining the charge trapping behaviors. Comparison of the bias stressed ID decays of the OFETs under vacuum and air conditions revealed similar degrees of ID decay in the iso- and syn-PMMA devices. On the other hand, the a-PMMA system exhibited a larger ID decay in the air than in the vacuum. This result suggests that the charge traps produced by air molecules (especially H2O, which is known to create charge traps) formed much more readily in the a-PMMA than in the iso- and syn-devices. It should be noted that the absorption and transport of air molecules into the polymer film depended significantly on the packing density among the polymer chains.28 The free volumes facilitated the penetration of air molecules and, thus, increased trap sites in the polymer. Additional physical insights into the stereostructure-dependent bias stress stabilities of the OFETs were sought by measuring the ID decay as a function of the PMMA film thickness in the pentacene-FETs. A series of iso-, syn-, and a-PMMA films with thicknesses between 50 nm and 450 nm were coated onto the 100 nm thick SiO2 substrate. (The 450 nm thick PMMA layer was analyzed, as shown in Figure 4(a).) Figures 5(a), (b), and (c) show the ID decay curves measured from the OFETs prepared based on the iso-, syn-, and a-PMMA films 50, 150, or 300 nm thick, respectively, under the application of a constant VG of –40 V or VD of – 5 V for 2 hr. The effects of air molecules on the ID decay were excluded by performing the

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measurements under vacuum conditions. The value of ID relative to ID0 after bias stressing over 2 hr (ID(t)/ID(0)) was plotted for each device as a function of the PMMA thickness in Figure 5(d). The results show that all PMMA-based FETs had similar ID(t)/ID(0) values of 0.64 for a 50 nm thick film. Deviations in the ID(t)/ID(0) values in the three PMMA cases increased with increasing PMMA layer thickness. The OFETs formed with 450 nm thick iso-, syn-, or a-PMMA films exhibited ID(t)/ID(0) values of 0.49, 0.29, or 0.12, respectively. These results revealed two meaningful facts: first, the magnitude of the ID decay under bias stress increased with the PMMA thickness. This behavior was observed in all iso-, syn-, and aPMMA cases. Thicker polymer dielectric layers reduced the gate electric field in the dielectric layer, suggesting that more charge traps formed in the thicker polymer films, despite a relatively weak applied gate electric field. The charge trapping sites clearly affected the bias stress instability in the OFETs and were mainly distributed throughout the polymer bulk region, rather than at the interface region, as mentioned above. Next, the ID decay under bias stress depended on the stereostructure of the PMMA, and this dependence became more pronounced as the PMMA thickness increased. As noted above, the polymer stereostructure can play a significant role in determining the crystalline structure and packing density of the polymer chains and, thereby, the free volume in the bulk region. The iso-PMMA had the highest crystallinity and packing density among the three PMMA polymers tested. The crystallinity decreased the free volumes in the PMMA dielectrics that generated charge trapping sites. This result is analogous to the recent results reported by Cho group, who found that the free volumes acted as charge trapping sites.28 Figure 6 shows the recovery behaviors of the charges trapped by a bias stress in the pentacene-FETs prepared using iso-, syn-, and a-PMMA coatings on the 100 nm SiO2 dielectrics. The thickness of each PMMA was identified to be 450 nm. The recovery behavior was measured by analyzing Vth shift (∆Vth) as a function of time under a bias stress, followed by recovery under dark or illuminated conditions. This study was used to examine the role of the polymer stereostructure in the FET stability.51-53 A bias stress at VG = –40 V and VD = 0 V was applied in darkness for 30 min, and a recovery process was performed at VG = VD = 0 V in darkness (Figure 6(a)) or under illumination (Figure 6(b)) over 30 min. The ∆Vth values after a 30 min bias stress in the iso-, syn-, or a-PMMA devices in the dark were –4.3, –5.6, and –7.5 V, as shown in Figure 6(a), respectively. These values corresponded to the ID decay trend under a bias stress, as described in Figure 5. (The absolute values of the ∆Vth measured

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under an applied bias stress in Figures 6(a) and (b) were somewhat different; however, we ignored these differences because the overall trends agreed.) During the recovery process in darkness (Figure 6(a)), all devices exhibited a decrease in |∆Vth| with increasing recovery time; however, none of the devices recovered their initial values (|∆Vth| = 0 V). This result is consistent with many of long-lived trapped charges being created in the device after application of the bias stress.51-53 On the other hand, illumination of the devices during the recovery process enhanced the liberation of trapped charges in all devices (Figure 6(b)). The iso-PMMA device was found to yield a |∆Vth| near 0 V, and most of the charges trapped by the bias stress became detrapped. By contrast, the |∆Vth| values obtained from the syn- and aPMMA devices after light illumination were 0.8 and 1.2 V, respectively, suggesting that long-lived trapped charges remained and could not be released under illumination. It should be noted that several studies have reported that light-induced charge detrapping provides evidence for the photo-excitation of trapped charges, especially in organic semiconductors.52-54 The light source used in the present study include a wavelength (λ) of visible light (from 400 to 700 nm) with maximum λ of 450 nm and shoulder peak between 500 nm and 650, as shown in Figure S4(a). For the case of pentacene films in Figure S4(b), the absorption patterns of UV-visible light on the glass and three (iso-, syn-, and a-) PMMAs were almost from 500 to 700 nm in a range of the wavelength; however only PMMA layer did not have the absorption properties. The results indicate that the light-illumination on the devices allows the photo-excitation of trapped charges in the pentacene films. Since all pentacene films on iso-, syn-, and a-PMMA dielectrics exhibited similar morphological and crystalline structures, the difference of |∆Vth| values of each device after illumination may be resulted from the detrapping of long-lived traps within the dielectrics, but not at the semiconductor or semiconductor/dielectric interface. This could be also supported by the results of Figure 5. The trap sites in the polymer bulk region may have originated from differences in the crystalline structures and the packing densities of the polymer chains having different stereostructures. These effects would have altered the free volumes of the polymer dielectrics, as described above. The mechanism underlying the bias stress stabilities of the PMMA dielectrics can be explained as follows: the electric field in the device under a bias stress allows mobile charges to diffuse into the free volumes of the PMMA dielectrics, resulting in charge capture. We cautiously suggest another possibility underlying the effects of the polymer stereostructure on the charge trapping behavior. Figure 6 shows that |∆Vth| of

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the a-PMMA film displayed the fastest variations, and the syn-PMMA case displayed a larger decrease compared to the iso-PMMA case. These results may have originated from a higher rate of charge penetration into the polymer dielectric bulk as well as a higher trapping density in the case of the a-PMMA compared to the syn- and iso-PMMA cases. The higher crystallinity of the iso- and syn-PMMA chains produces a denser packing density and, thus, disrupts the penetration of charges from the dielectric surface into the bulk region. The charge packing density and crystallinity, as a result of the polymer stereostructure, play an important role in the intrinsic charge trapping properties and in the OFET operation stability.

4. Conclusions In summary, we investigated the OFET stabilities as a function of the polymer dielectric stereostructure by applying a gate bias stress and by characterizing the long-term operational properties. The PMMA chain stereostructures significantly influenced the charge trapping behaviors and the trap formation in the polymer dielectrics, especially in the bulk region rather than at the polymer film surface. A regular configurational arrangement (isotactic > syntactic > atactic) of the pendant group on the PMMA backbone chain produced a closer packing structure among the polymer chains and a relatively high crystallinity within the polymer dielectric. The resultant decrease in the free volume reduced the number of sites available for charge trapping and for the absorption of air molecules. Consequently, the PMMA films with a regular stereostructure (iso- and syn-stereoisomer) exhibited more stable OFET operation under bias stressing than the devices prepared using irregular a-PMMA, in both vacuum and air.

ASSOCIATED CONTENT Supporting Information. The relationship between the film thickness and the concentration of PMMA solution; AFM images of the iso-, syn-, and a-PMMA dielectrics; 2D GIXD patterns of pentacene films; optical emission spectrum and UV-visible spectrum; repeated transfer characteristics of pentacene-FETs under off-gated bias. Acknowledgements. This work was supported by Basic Science Research Program through

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the National Research Foundation of Korea (NRF) funded by the Ministry of Education (NRF-2014R1A1A4A01009458) and the Ministry of Science, ICT & Future Planning (2014R1A1A1005896).

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Sirringhaus,

H.;

Heeney,

M.;

b)thiophene−Diketopyrrolopyrrole-Containing

McCulloch, Polymers

for

I.

Thieno(3,2-

High-Performance

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Kang, I.; An, T. K.; Hong, J. A.; Yun, H. J.; Kim, R.; Chung, D. S.; Park, C. E.; Kim, Y. H.; Kwon, S. K. Effect of Selenophene in a DPP Copolymer Incorporating a Vinyl Group for High-Performance Organic Field-Effect Transistors. Adv. Mater. 2013, 25, 524-528.

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Yan, H.; Chen, Z.; Zheng, Y.; Newman, C.; Quinn, J. R.; Dotz, F.; Kastler, M.;

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Facchetti, A. A High-Mobility Electron-transporting Polymer for Printed Transistors. Nature 2009, 457, 679-686. (9)

Kim, S. H.; Hong, K.; Xie, W.; Lee, K. H.; Zhang, S.; Lodge, T. P.; Frisbie, C. D. Electrolyte-Gated Transistors for Organic and Printed Electronics. Adv. Mater. 2013, 25, 1822-1846.

(10) Kobayashi, S.; Nishikawa, T.; Takenobu, T.; Mori, S.; Shimoda, T.; Mitani, T.; Shimotani, H.; Yoshimoto, N.; Ogawa, S.; Iwasa, Y. Control of Carrier Density by Self-assembled Monolayers in Organic Field-Effect Transistors. Nat Mater 2004, 3, 317-322. (11) Chen, Y.; Podzorov, V. Bias Stress Effect in "Air-Gap" Organic Field-Effect Transistors. Adv. Mater. 2012, 24, 2679-2684. (12) Sirringhaus, H. Device Physics of Solution-Processed Organic Field-Effect Transistors. Adv. Mater. 2005, 17, 2411-2425. (13) Hwang, D. K.; Fuentes-Hernandez, C.; Kim, J.; Potscavage, Jr., W. J.; Kim, S. J.; Kippelen, B. Top-Gate Organic Field-Effect Transistors with High Environmental and Operational Stability. Adv. Mater. 2011, 23, 1293-1298. (14) Sirringhaus, H. Reliability of Organic Field-Effect Transistors. Adv. Mater. 2009, 21, 3859-3873. (15) Bobbert, P. A.; Sharma, A.; Mathijssen, S. G. J.; Kemerink, M.; de Leeuw, D. M. Operational Stability of Organic Field-Effect Transistors. Adv. Mater. 2012, 24, 11461158. (16) Mathijssen, S. G. J.; Spijkman, M. J.; Andringa, A. M.; van Hal, P. A.; McCulloch, I.; Kemerink, M.; Janssen, R. A. J.; de Leeuw, D. M. Revealing Buried Interfaces to Understand the Origins of Threshold Voltage Shifts in Organic Field-Effect Transistors. Adv. Mater. 2010, 22, 5105-5109. (17) Lee, B.; Wan, A.; Mastrogiovanni, D.; Anthony, J. E.; Garfunkel, E.; Podzorov, V. Origin of the Bias Stress Instability in Single-Crystal Organic Field-Effect Transistors. Phys. Rev. B 2010, 82, 085302.

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(18) Lee, L.; Kim, D. H.; Kim, J. Y.; Yoo, B.; Chung, J. W.; Park, J. I.; Lee, B. L.; Jung, J. Y.; Park, J. S.; Koo, B. Reliable and Uniform Thin-Film Transistor Arrays Based on Inkjet-Printed Polymer Semiconductors for Full Color Reflective Displays. Adv. Mater. 2013, 25, 5886-5892. (19) Kim, S. H.; Hong, K.; Lee, K. H.; Frisbie, C. D. Performance and Stability of Aerosol-Jet-Printed Electrolyte-Gated Transistors Based on Poly(3-hexylthiophene). ACS Appl. Mater. Interfaces 2013, 5, 6580-6585. (20) Nam, S.; Jang, J.; Kim, K.; Yun, W. M.; Chung, D. S.; Hwang, J.; Kwon, O. K.; Chang, T.; Park, C. E. Solvent-Free Solution Processed Passivation Layer for Improved Long-Term Stability of Organic Field-Effect Transistors. J. Mater. Chem. 2011, 21, 775-780. (21) Kim, N.; Potscavage, W. J.; Domercq, B.; Kippelen, B.; Graham, S. A Hybrid Encapsulation Method for Organic Electronics. Appl. Phys. Lett. 2009, 94, 163308163308-3. (22) Meyer, J.; Goerrn, P.; Bertram, F.; Hamwi, S.; Winkler, T.; Johannes, H. H.; Weimann, T.; Hinze, P.; Riedl, T.; Kowalsky, W. Al2O3/ZrO2 Nanolaminates as Ultrahigh Gas-Diffusion Barriers—A Strategy for Reliable Encapsulation of Organic Electronics. Adv. Mater. 2009, 21, 1845-1849. (23) Hwang, D. K.; Fuentes-Hernandez, C.; Fenoll, M.; Yun, M.; Park, J.; Shim, J. W.; Knauer, K. A.; Dindar, A.; Kim, H.; Kim, Y.; Kim, J.; Cheun. H.; Payne, M. M.; Graham, S.; Im, S.; Anthony, J. E.; Kippelen, B. Systematic Reliability Study of TopGate p- and n‑Channel Organic Field-Effect Transistors. ACS Appl. Mater. Interfaces 2014, 6, 3378-3386. (24) Kalb, W. L.; Mathis, T.; Haas, S.; Stassen, A. F.; Batlogg, B. Organic Small Molecule Field-Effect Transistors with Cytop™ Gate Dielectric: Eliminating Gate Bias Stress Effects. Appl. Phys. Lett. 2007, 90, 092104-092104-3. (25) Kim, J.; Jang, L.; Kim. K.; Kim. H.; Kim. S. H.; Park, C. E. The Origin of Excellent Gate-Bias Stress Stability in Organic Field-Effect Transistors Employing Fluorinated-Polymer Gate Dielectrics. Adv. Mater. 2014, 42, 7241-7246.

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(26) Lee, B.; Wan, A.; Mastrogiovanni, D.; Anthony, J. E.; Garfunkel, E.; Podzorov, V. Origin of the Bias Stress Instability in Single-Crystal Organic Field-Effect Transistors. Phys. Rev. B 2010, 82, 085302. (27) Fabiano, S.; Braun, S.; Fahlman, M.; Crispin, X.; Berggren, M. Effect of Gate Electrode Work-Function on Source Charge Injection in Electrolyte-Gated Organic Field-Effect Transistors. Adv. Funct. Mater. 2014, 24, 695-700. (28) Choi, H. H.; Lee, W. H.; Cho, K. Bias-Stress-Induced Charge Trapping at Polymer Chain Ends of Polymer Gate-Dielectrics in Organic Transistors. Adv. Funct. Mater. 2012, 22, 4833-4839. (29) Allcock, H. R.; Lampe, F. W.; Contemporary Polymer Chemistry, 2nd ed., Prentice Hall Inc. 1992. (30) Hobson, R. J.; Windle, A. H. Crystalline Structure of Atactic Poly(acrylonitrile) Macromolecules 1993, 26, 6903-6907. (31) Cho, J. D.; Lyoo, W. S.; Chvalun, S. N.; Blackwell, J. X-ray Analysis and Molecular Modeling of Poly(vinyl alcohol)s with Different Stereoregularities. Macromolecules 1999, 32, 6236-6241. (32) Fujiyama, M.; Kitajima, Y.; Inata, H. Structure and Properties of Injection-Molded Polypropylenes with Different Molecular Weight Distribution and Tacticity Characteristics. J. Appl. Poly. Sci 2002, 84, 2142-2156. (33) Ngai, K. L.; Gopalakrishnan, T. R.; Beiner, M. Relaxation in poly(alkyl methacrylate)s: Change of Intermolecular Coupling with Molecular Structure, Tacticity, Molecular Weight, Copolymerization, Crosslinking, and Nanoconfinement. Polymer 2006, 47, 7222-7230. (34) Young, R. J.; Lovell, P. A. Introduction to Polymer, 3th ed., CRC press, 2011. (35) Lee, H. S.; Kim, D. H.; Cho, J. H.; Hwang, M.; Jang, Y.; Cho, K. Effect of the Phase States of Self-Assembled Monolayers on Pentacene Growth and Thin-Film Transistor Characteristics. J. Am. Chem. Soc. 2008, 130, 10556-10564.

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Table 1. Summary of the surface characteristics of the PMMA dielectrics, dielectric capacitances, and the pentacene-FET performances. PMMA surface characteristics Surface energy 2

rms roughness

Dielectric capacitance (with 100 nm SiO2) (x10-9 F/cm2)

OFET performances

µFET (cm2/Vs)

Ion/off

Vth

(mJ/m )

(nm)

iso-PMMA

45.8

0.34±0.03

6.1

0.36±0.12

~107

-23±4

syn-PMMA

45.6

0.36±0.02

6.3

0.36±0.09

~107

-21±2

a-PMMA

46.0

0.34±0.02

7.2

0.38±0.08

~107

-20±3

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Figure Captions Figure 1. AFM images during the initial growth stages of 5 nm (a–c) and 10 nm thick (d–f) pentacene films deposited onto iso- (a,d), syn- (b,e), and a-PMMA (c,f) dielectrics. Figure 2. Current density versus electric field (J–E) characteristics of the gold MIM structures prepared with 450 nm thick PMMA films. The inset shows the MIM structure. Figure 3. Output (a–c) and transfer (d–f) characteristics of pentacene-FETs fabricated with 450 nm thick PMMA films deposited onto 100 nm thick SiO2. (a,d), (b,e), and (c,f) show the results obtained from the iso-, syn-, and a-PMMAs. Transfer characteristics of each FET were obtained at a fixed VD of –60 V. Figure 4. Time-dependent ID decay under a constant bias stress (VG = –40 V and VD = –5 V) under vacuum (a) or air (b) conditions, for pentacene-FETs prepared with 450 nm thick PMMAs on 100 nm thick SiO2. Figure 5. Time-dependent ID decay under a constant bias stress (VG = –40 V and VD = –5 V) under vacuum, of pentacene-FETs prepared with 50 nm (a), 150 nm (b), and 300 nm thick (c) PMMA films deposited onto a 100 nm thick SiO2 substrate. (d) Variations in ID(t)/ID(0) in the pentacene-FETs as a function of the PMMA thickness. Figure 6. Time-dependent ∆Vth values obtained from pentacene-FETs prepared with 450 nm thick PMMA dielectrics deposited onto 100 nm thick SiO2 substrates under ambient condition (25°C and a 45% humidity). A bias stress (VG = –40 V, VD = 0 V) was applied under dark conditions for 30 min, and then a recovery process (VG = VD = 0 V) was performed in darkness (a) or under illumination (b).

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Figure 1

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Figure 2

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Figure 3

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