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Microscale Soft Patterning for Solution Processable Metal Oxide Thin Film Transistors Sang Wook Jung, Soo Sang Chae, Jee Ho Park, Jin Young Oh, Suk Ho Bhang, Hong Koo Baik, and Tae Il Lee ACS Appl. Mater. Interfaces, Just Accepted Manuscript • DOI: 10.1021/acsami.5b10847 • Publication Date (Web): 26 Feb 2016 Downloaded from http://pubs.acs.org on March 1, 2016

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ACS Applied Materials & Interfaces

Microscale Soft Patterning for Solution Processable Metal Oxide Thin Film Transistors Sang Wook Jung, † a,b Soo Sang Chae, † a Jee Ho park, a Jin Young Oh, a Suk Ho Bhang,c Hong Koo Baik*a and Tae Il Lee*d a

Department of Materials Science and Engineering, Yonsei University, 134 Shinchong-dong,

Seoul 120-750, South Korea. b

c

Samsung Display Co. Ltd., Tangjeong, Chuncheongnam-Do, 336-741, South Korea.

School of Chemical Engineering, Sungkyunkwan University, 2066, Seobu-ro, Jangan-gu,

Suwon-Si, Gyeonggi-do, Korea. d

Department of BioNano Technology, Gachon University, Seongnam, Gyeonggi-Do 461-701,

South Korea.

Keyword

Metal Oxide Semiconductor, Thin Film Transistor, Metal Patterning, Soft-lithography, Contact Printing

ACS Paragon Plus Environment

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Abstract

We introduce a microscale soft pattering (MSP) route utilizing contact printing of chemically inert sub-nm thick low molecular weight (LMW) poly(dimethylsiloxane) (PDMS) layers. These PDMS layers serve as a release agent layer between the n-type Ohmic metal and metal oxide semiconductors (MOSs) and provide a layer that protects the MOS from water in the surrounding environment. The feasibility of our MSP route was experimentally demonstrated by fabricating solution processable In2O3, IZO, and IGZO TFTs with aluminum (Al), a typical n-type Ohmic metal. We have demonstrated patterning gaps as small as 13 µm. The TFTs fabricated using MSP showed higher field-effect-mobility and lower hysteresis in comparison with those made using conventional photolithography.

1. Introduction Metal oxide semiconductors (MOSs) have employed n-channel layers for thin-film transistor (TFT) backplanes of active matrix organic light emitting diode (AMOLED) displays due to their high mobility, good uniformity, high transparency and excellent electrical stability.1-4 However, the MOSs are severely deteriorated upon exposure to strong acid etchants and plasma cleaning as well as during photolithographic pattering by direct etching of the source/drain (S/D) electrodes. In particular, the issue becomes more serious in the case of solution processable MOS devices for low cost ink jet printing because of their more porous structure compared with vacuum processed ones. 2,3 In related industrial applications, as a result, a patterned etch stopper layer (ESL) must be inserted between the MOS layer and the S/D electrodes to protect the MOS from degradation.5-10


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The inserted patterned ESL layer requires an additional photolithography process that increases production cost.11,12 Moreover, the MOS channel area must be increased to provide a sufficient misalignment margin between the ESL pattern and S/D electrodes. The increase in the channel area leads to an increase in the parasitic capacitance between the gate electrode and S/D electrodes resulting in noise and slower TFT device switching.12-15 Nevertheless, the ESL layer is still used during the photolithography process in current display manufacturing because there is no superior method of solving these problems. More recently, to overcome the problems with maintaining the tools and equipment used in conventional a-Si based TFT backplane production, there has been development of a new strategy called the Back channel etch process.16 However, despite the efforts the process also required an additional post treatment step and a large expenditure of time. For example, N2O treatment before SiOx passivation deposition and high temperature annealing are required.17 Alternatively, instead of the direct etching method, a lift-off approach provides the patterning of the S/D electrode by employing the pre-patterned sacrificial layer (e.g., photoresist) as a shadow mask. The metal deposited on the sacrificial layer can be selectively lifted-off by stripping the sacrificial layer. Although the developer and stripper solution used in the patterning of the sacrificial layer and stripping step, respectively, are relatively mild in comparison with a strong acid etchant, the deterioration of susceptible MOS could not be avoided upon exposure to the process.18,19 Additionally, when the device is scaled-up to a large-area for practical applications, the ‘lift-off’ process results in critical problems, such as a retention of unwanted parts of the metal and the re-attachment of metal particles from the lift-off process at random locations. Thus, the problems make the ‘lift-off’ method impossible to apply in practical industrial use.20,21


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Unlike the photolithography, some processes to pattern metal electrodes using micro contact printing or physical delamination with poly(dimethylsiloxane) (PDMS) stamps have been introduced for organic TFTs.22,23 Photolithography cannot be used with these materials because organic semiconductors are easily dissolved by the PR solvent.24,25 The metal used in these methods should be chemically inert to allow for facile removal from the PDMS stamp or substrate. Therefore, noble metals with a high work function are generally adopted.26 Fortunately, the noble metals form an Ohmic contact with the organic channel layer, generally resulting in a p-type semiconductor. However, noble metals, including Au, Pt, and Pd, do not to form Ohmic contacts with n-type MOSs,27 and metal that results in an n-type Ohmic contact strongly binds to the surface of the PDMS or MOS, making it difficult to remove the PDMS. Therefore, these methods cannot be used for producing the S/D electrodes of MOS TFTs. To define n-type Ohmic contact S/D electrodes without using photolithography for solution processable MOS TFTs, we introduce a microscale soft pattering (MSP) route, utilizing contact printing of chemically inert sub-nm thick low molecular weight (LMW) PDMS layers. These PDMS layers serve as a release agent layer between the n-type Ohmic metal and the MOS and provide a layer that protects the MOS from water in the surrounding environment. The feasibility of our MSP route was experimentally demonstrated by fabricating solution processable In2O3, IZO, and IGZO TFTs with aluminum (Al), a typical n-type Ohmic metal. We have demonstrated patterning gaps as small as 13 µm and believe that this is not the smallest gap achievable. The TFTs fabricated using MSP showed higher field-effect-mobility, improved bias stabilities and lower hysteresis in comparison with those made using conventional photolithography.

2. Experimental Section 2.1 Solution preparation


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In2O3 precursor solutions were prepared by dissolving 0.1 M indium nitrate hydrate [In(NO3)3·xH2O] in deionized water (DIW). To make the IZO precursor solution, a solution of 0.1 M In(NO3)3·xH2O and 0.667 M zinc nitrate hexahydrate [Zn(NO3)2·6H2O] was made in DIW, and the mole ratio of In:Zn was fixed at 6:4. To make the IGZO precursor solution, the same solution used for the IZO described above was used but gallium nitrate hydrate (Ga(NO3)3·xH2O) was also added to a concentration of 10 mol%. All precursor solutions were stirred for 3 h under ambient conditions. 2.2 Patterned PDMS stamp

First, the master mold was prepared by using a conventional photoresist process. The shape and size of the mold was varied depending on the device. Next, the PDMS stamps were fabricated by casting and curing a mixture of PDMS (Sylgard 184, Dow corning) pre-polymer and curing agent onto the master mold wafer. The ratio of pre-polymer to curing agent was 10:1 and thermal curing was conducted at 80 °C for 1 hour. 2.3 Device fabrication

Heavily boron-doped Si substrates with a thermally grown 200-nm-thick SiO2 layer were used as gate electrodes and dielectric layers. The channel layer was deposited by spin-coating at 2000 rpm for 20 s followed by annealing on a hot plate at 250 °C for 2 h under ambient conditions. The annealed In2O3 layer was cooled to room temperature, and the PDMS stamp was brought into contact with the oxide surface for 10 min at room temperature, such that low-molecular weight PDMS was selectively transferred onto the surface. Subsequently, the PDMS stamp was removed, and aluminum (Al) source/drain electrodes (40 nm thick) were deposited using a thermal evaporator [pressure ~10-6 Torr (1.33 mPa)] without a shadow mask. 2.4 Thin film characteristics


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Atomic force microscopy (Nanowizard I, JPK Instrument) scans to determine the channel shape were performed in contact mode over 70 µm × 70 µm image areas. A high resolution image of the edge of the patterned metal thin films was obtained via scanning electron microscopy (JEOL-6701F). Contact angle measurements (SEO, Phoenix300) were conducted by placing a 3 µL D.I. droplet of water or diiodomethane on the substrate using a digital stereomicroscope. The surface energy of each thin film was calculated using the Owens-Wendt model, which is based on Young’s equation.28 2.5 Electrical measurements

The electrical characteristics were measured in the dark at room temperature using a semiconductor parameter analyzer (Agilent E5270). The threshold voltage was determined from the saturation region by fitting a straight line to a plot of the square root of the drain current (ID1/2) versus the gate voltage (VG). 2.6 Photolithography

The patterns of the source and drain regions were defined by standard photolithography and lift-off techniques. First, the photoresist (AZ1512) was spin-coated at 2000 rpm for 30 s and softbaked at 120 °C for 15 s. Then, UV light was directed through a photomask onto the sample for 15 s to generate surface patterns. Photoresist was developed with an MIF300 developer for 30 s. The uncovered regions were subsequently deposited with Al electrode by thermal-evaporation onto the sample surface. Finally, the photoresist was lifted off by soaking the sample in acetone to obtain the source and drain electrode patterns.

3. Results and discussion The MSP process is schematically illustrated in Figure 1a. First, LMW PDMS was deposited as a releasing layer on a metal oxide surface by contact printing.28 After an optimized contact


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time, a 1-2 nm continuous LMW PDMS layer was formed (see Figure S1 in the Supporting Information). Second, an Al thin film was deposited on the whole surface of the metal oxide by using a thermal evaporation method. Third, the detachment process was conducted at an optimized speed using commercial 3M tape (810 Scotch MagicTM). Then, the Al film above the LMW PDMS deposited metal oxide surface was eliminated, and the one above the metal oxide surface remained, as shown in Figure S1 of the Supporting Information. As a result, the Al metal film can be tailored by using a negative PDMS stamp pattern. The image shown in Figure 1b represents a view of the detachment process. Clear Al patterns were fabricated on the metal oxide surface. Al patterns of various shapes and sizes were successfully fabricated on the metal oxide surface via the MSP process, and the results are shown in Figure 1c. The pattern edge was uniform and sharp down to the nanometer scale, as shown in Figure 1d, even though the MSP is based on physical delamination. The smoothness of the Al pattern was comparable to that obtained using conventional photolithography.


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Figure 1. (a) The MSP process is schematically illustrated. i) A PDMS stamp was placed on the oxide surface. ii) A continuous ultra-thin LMW PDMS layer was deposited on the surface. iii) An Al metal thin film was deposited on the whole surface of the oxide using a thermal evaporator. iv) The detachment process at an optimized speed using 3M tape. (b) An image of an MSP deposited Al film on a 2 cm×2 cm matrix and a metal film detached using 3M tape. (c) Various shapes and sizes of Al film patterns on MSP. (d) SEM images for MSP pattern edges were uniform and sharp at the scale of nanometers (the scale bar is 100nm).

There are two important process variables that determine the high quality of the pattern in our MSP. One is the surface occupying ratio of LMW PDMS, which is related to the microscale resolution. The other parameter is the speed of detachment, which is related to the nanoscale


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resolution. To determine these experimental factors, systematic experiments were designed, and the results are provided in Figure 2. During contact printing, LMW PDMS deposition follows a thermal diffusion mechanism driven by a concentration gradient that exists between the inside of the PDMS and the surface of the bulk PDMS stamp.29 As in thin film vacuum deposition, the deposition of LMW PDMS begins as islands and proceeds to form a continuous film. Therefore, the area occupied by LMW PDMS, which has many hydrophobic methyl side groups, is a function of contact printing time. The occupation ratio can be quantified by measuring the contact angles of water and diiodomethane on the substrate because the surface energy of the substrate is dictated by the coverage of LMW PDMS and the metal oxide. Surface energy was measured as a function of PDMS contact time on the three metal oxide thin films used as the n-channel layers of the TFTs. The surface energies of the metal oxides gradually decreased with increasing PDMS contact time, as shown in Figure 2a (contact angles are provided in Figures S2, S3 and S4 in the Supporting Information). The surface free energy of the Al layer is 74 mN/m, and the initial surface free energies of various oxide substrates were 67.8, 67.9 and 66.7 mN/m for In2O3, IZO and IGZO, respectively. Because the adhesion energy between two solid surfaces is related to the sum of the surface free energies30, the total surface energies were 141.8, 141.9 and 140.7 mN/m for In2O3, IZO and IGZO, respectively. As the contact time increases, the adhesion energies declined and then saturated to 108.33, 105.7 and 106.6 mN/m for In2O3, IZO and IGZO, respectively. Perfect detachment would be expected near these values considering that the adhesion energy between Al and 3M tape is 111.8 mN/m (the surface free energy values of Al and 3M tape are 74 mN/m and 38 mN/m, respectively).


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Figure 2. Two important process variables for MSP: (a) The total surface energy between Al/substrate as a function of PDMS contact time. The dashed line indicates the total surface energy between Al/3M tape. (b) The features of a detached Al film for different PDMS contact times. (c) A critical energy release rate (3M tape/Al) was required for the nano-scale pattering and to overcome the detachment kinetic energy. (d) The nanoscale smoothness of the MSP Al film as function of detachment speed.

Figure 2b shows the features of a detached metal film on In2O3 for four PDMS contact times: 1 s, 180 s, 360 s and 540 s. For times shorter than 540 s, the edge of the pattern was rough and was not clearly defined. The total surface energy gradually decreases with the degree of coverage of


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LMW PDMS on a given metal oxide film resulting from the nucleation and growth of a LMW PDMS layer. Therefore, the oxide surface may not be fully covered at low contact times resulting in undetached parts as shown in Figure 2b. However, at 540 s, the oxide surface is likely fully covered by LMW PDMS. Therefore, the metal film above the LMW PDMS layer was clearly delaminated. Meanwhile, for times longer than 540 s, the LMW PDMS diffused over the outline of a given pattern (Figure S5 in the Supporting Information). Therefore, we set the upper limit of the PDMS contact time to 540 s for MSP. The critical PDMS contact times for perfect detachment of other metal oxides such as IZO and IGZO were similar with that of In2O3 (not shown in here). The thin continuous LMW PDMS layer serves as a detaching agent, and it can be formed on any substrate by strong physisorption. As such, our MSP method has the potential to be applied to any type of metal oxides for TFT.30 Second, we found that the detachment speed is a key parameter for determining the nanoscale resolution of the selective detachment.23 The adhesion energy margin between the 3M tape/Al and Al/substrate for detachment was restricted due to the excessive diffusion of LMW PDMS. The critical energy release rate of the 3M tape/Al should be higher than the sum of the adhesion energy (Al/substrate) and surface energy (Al/Al) near the pattern edge. Therefore, an additional energy corresponding to the toughness of the 45 nm Al thin film near the pattern edge (where the Al thin film tears) is required for nanoscale pattering. As shown in the inset of Figure 2c, the required energy can be obtained from the detachment kinetic energy because the critical energy release rate of 3M tape/Al has a power law relationship with respect to the detachment speed. The nanoscale smoothness of a line pattern as a function of detachment speed obtained using MSP was evaluated by means of the ratio (d/d0), which is the ratio of the processed pattern length to the designed pattern length. The values of this ratio are shown in Figure 2d, and the


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ratio saturated to 1.06 at 5 cm/s. This value is near the ideal ratio considering the dimensions of the Al grain size (Figure S6 in the Supporting Information). In addition, to investigate other parameters that could affect to MSP, the thermal treatment of metal films was conducted within a wide range temperature from 50 °C to 250 °C. Figure S7 (see the Supporting Information) demonstrates that thermal treatment even at 50 °C can produce irreversible chemical bonding between the metal and oxide surface. Thus, the clear pattern was not achieved. The methylated siloxane chain is not reactive with Al, but under the specific condition, such as the presence of ambient water molecules, high surface energy and thermal energy can form chemical bonds. Thus, for the best performance of the MSP process, the postthermal treatment is not required and the process is performed only at room temperature. As for other metals, such as Au, Ag, and Ti, we conducted MSP to pattern the 100 µm electrode gap. Au and Ag failed, but Ti was successful to define the electrode. The results are shown in Figure S8 (see the Supporting Information). From the results, we can confirm that the metal should have proper adhesive energy with the metal oxide film for adopting MSP. To verify the feasibility of our MSP process, In2O3 TFTs with Al electrodes were fabricated using the optimized critical contact time and detachment speed. The minimum gap distance to define the S/D electrodes by MSP was near 13 µm, as shown in the optical microscope images of Figure 3a. Although we demonstrated a gap distance up to 13 µm in this current work, we are convinced that there is potential to reduce the distance in our MSP by optimization of process parameters such as Al thickness and PDMS stamp pattern size. The TFTs showed a uniform n-channel field effect saturation mobility near 12.8 ± 1 cm2/Vs for various channel lengths, as shown in Figure 3a. The transfer curve for the TFT with a 13 µm channel length is shown in Figure 3-c. This result demonstrated that the surface of the gap


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defined by the MSP was electronically clean, and the edge of the gap was smooth enough to maintain the mobility using various channel lengths. The surface and cross sectional geometric profiles of the minimum electrode gap (marked with a yellow dashed circle in the right side of the OM image in Figure 3a) were measured using cross-sectional atomic force microscopy (AFM). We observed a well-defined 13 µm clean gap and a 40 nm uniform thicknesses of Al, as shown in Figure 3b.

Figure 3. (a) The field effect saturation mobility as a function of gap distance (12.49 ± 0.88 cm2/Vs for 100 µm, 12.54 ± 0.85 cm2/Vs for 60 µm , 12.61 ± 0.64 cm2/Vs for 40 µm , 12.34 ± 0.72 cm2/Vs 20 µm , 12.79 ± 0.97 cm2/Vs for 13 µm, the size of sample is 20 for each gap distance) for the source/drain after the MSP process. (b) A cross-sectional AFM image of a well-


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defined 13 µm clean gap with a 45 nm uniform thickness of Al. (c) In2O3 TFT performances at VD (40 V) with channel length/widths of 13/1000 µm fabricated on 200 nm SiO2 /p++ Si wafer by the MSP process.

With the ability to clearly define 13 µm channels, MSP has a strong potential to be used in the display industry to replace conventional fabrication processes. To confirm this potential, we conducted a systematic comparative study of the TFT performance for different metal oxides and fabrication processes. Figures 4a, 4b and 4c show the n-channel field effective mobility, subthreshold swing and threshold voltage hysteresis of In2O3, IZO, and IGZO TFTs, respectively, with channel length/widths of 150/1000 µm. These were prepared by three patterning methods: a photolithography lift-off process, a shadow mask method and HRPD. The transfer curves for all cases are provided in Figure S9 (see the Supporting Information). The field effect mobility was calculated from a linear fit of the plot of the square root of IDS versus the VGS. Subthreshold swing (SS) was taken as the minimum value of (dlog(IDS)/dVGS)-1, and the threshold voltage hysteresis was measured between forward and reverse sweeps as a result of the bias stress during the measurement sweep. The results are summarized in Table 1.


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Figure 4. Various TFT performances for (a) In2O3, (b) IZO, (c) IGZO TFT fabricated by three patterning methods: the photolithography lift-off process, shadow mask and MSP. (d) The PBS, NBS and NBIS of In2O3 TFTs fabricated by shadow mask and MSP.

In2O3 TFTs prepared by a photolithography lift-off process, a shadow mask method, and MSP have mobilities of 8.04, 12.98, and 12.92 cm2/Vs, respectively, SS values of 4.26, 2.50, and 2.53 V/decade, respectively, and threshold voltage hysteresis (Vh) values of 3.51, 2.46, and 0.56 V, respectively. Similar TFT performance trends for the three processes were observed for IZO and IGZO. Again, the worst performance was observed in the TFT fabricated using the photolithography lift-off process.


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All TFT parameters were degraded for the photolithography processed samples due to damage from chemical solutions during developing and lift-off. The mobility and subthreshold swing values obtained for samples processed using MSP and the shadow mask patterning methods were similar. However, the TFT fabricated by MSP showed the lowest threshold voltage hysteresis. This enhanced gate bias stability, as indicated by the low threshold voltage hysteresis, comes from the passivation of MOS by the LMW PDMS used in MSP, which protects the surface from ambient moisture.31,32 Furthermore, the passivation effect of LMW PDMS on the bias stabilities of In2O3 TFT was investigated through comparative studies of positive bias stability (PBS), negative bias stability (NBS) and negative bias illumination stability (NBIS) for each TFT fabricated by MSP and the shadow mask process and the results are presented in Figure 4d. The In2O3 TFT fabricated by MSP showed better PBS, NBS and NBIS than that produced by the shadow mask and we think that this enhancement in bias stabilities originates from the effect of the surface passivation of the In2O3 back channel by LMW PDMS. Additionally, after detachment the of Al thin film, the water contact angle was 106.2 °, indicating that this hydrophobic surface is likely generated by the LMW PDMS remaining on the surface of the In2O3. Additionally, these residuals could have a negligible effect on the contact resistance, which might be a problem in post-processing steps, such as the deposition of pixel electrodes (see Figures S10 and S11 in the Supporting Information).

Metal oxide

In2O3

InZnO

Process

Mobility (cm2/Vs)

Ion/Ioff

S.S(V/dec)

Hysteresis(V)

PLO

8.04±0.82

4.1 x 104

4.26±0.11

3.51±0.25

SM

12.98±1.05

3.2 x 104

2.50±0.08

2.46±0.15

MSP

12.92±1.25

4.3 x 104

2.53±0.08

0.56±0.05

PLO

0.96±0.16

2.1 x 106

0.84±0.11

5.37±0.15


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InGaZnO

SM

2.56±0.57

4.3 x 106

1.12±0.1

4.61±0.12

MSP

3.09±0.45

4.7 x 105

1.17±0.09

1.00±0.02

PLO

0.71±0.12

2.6 x 106

0.90±0.04

7.75±0.24

SM

1.21±0.1

2.0 x 106

0.96±0.05

4.99±0.2

MSP

1.78±0.18

1.7 x 107

0.59±0.04

1.11±0.12

Table 1. A summary of various TFT electrical performance parameters for In2O3, IZO and IGZO TFTs fabricated by three patterning methods: photolithography lift-off (PLO), a shadow mask (SM) and MSP.

4. Conclusions In conclusion, we demonstrated a dry patterning method with high resolution. This method employs a nano-releasing layer formed by utilizing LMW PDMS diffused out from a bulk PDMS stamp during contact printing to define n-type Ohmic contact S/D electrodes without photolithography for MOS TFTs. The critical values of the main processing variables required to obtain high quality metal pattering on the oxide film, i.e., bulk PDMS stamp contact time and detachment speed, were found to be 540 s and 5 cm/s, respectively. The potential of this dry patterning was experimentally demonstrated by fabricating In2O3, IZO and IGZO TFTs with Al, a typical n-type Ohmic metal. We have demonstrated patterning gaps as small as 13 µm and believe that this is not the smallest gap achievable. The TFTs showed a higher field-effectmobility and lower hysteresis in comparison with those produced by conventional photolithography and shadow mask methods. Furthermore, our MSP may also be possible using a conventional self-assembled monolayer (SAM). However, most SAM molecules are polar, and they may strongly shift the threshold voltage of a given TFT. These polar SAMs therefore cannot be used for TFT fabrication in our


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MSP. Fortunately, the nano-releasing layer LMW PDMS we adopted was a non-polar molecule, so there is no shift in the threshold voltage of a coated metal oxide film for a given TFT. Therefore, we believe that our strategy of MSP is a strong candidate for use in industrial electronic device fabrication processes.

Supporting Information Details of the experimental result of contact angle measurements, AFM images, and SEM images are available free of charge via the Internet at http://pubs.acs.org. Corresponding Author *H.K. Baik ([email protected]) and *T.I. Lee ([email protected]) Author Contributions ‡These authors contributed equally. ACKNOWLEDGMENT This work was supported by the Gachon University research fund of 2014(GCU-2014-0216). Further funding was provided by LG Display.

REFERENCES 1 Nomura, K.; Ohta, H.; Takagi, A.; Kamiya, T.; Hirano, M.; Hosono, H. RoomTemperature Fabrication of Transparent Flexible Thin-Film Transistors using Amorphous Oxide Semiconductors. Nature 2004, 432, 488–492.


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2 Banger, K. K.; Yamashita, Y.; Mori, K.; Peterson, R. L.; Leedham, T.; Rickard, J.; Sirringhaus, H. Low-temperature, High-Performance Solution-Processed Metal Oxide Thin-film Transistors formed by a ‘Sol–Gel on Chip’ process. Nature. Mater. 2011, 10, 45–50. 3 Thomas, S. R.; Pattanasattayavong, P.; Anthopoulos, T. D. Solution-Processable Metal Oxide Semiconductors for Thin-Film Transistor Applications. Chem. Soc. Rev. 2013, 42, 6910–6923. 4 Park, S. -H. K.; Hwang, C. -S.; Ryu, M.; Yang, S.; Byun, C.; Shin, J.; Lee, J. -I.; Lee, K.; Oh, M. S.; Im, S. Transparent and Photo-Stable ZnO Thin-Film Transistors to Drive an Active Matrix Organic-Light-Emitting-Diode Display Panel. Adv. Mater. 2009, 21, 678– 682. 5 Lee, S. -H.; Seo, B. -H.; Seo, J. H. Wet Etching of a Gallium Indium Zinc Oxide Semiconductor for Thin Film Transistor Application. J. Kor. Phys. Society. 2008, 53, 2603–2606. 6 Marrs, M. A.; Vogt, B. D.; Raupp, G. B. Comparison of Wet and Dry Etching of Zinc Indium Oxide for Thin Film Transistors with an Inverted Gate Structure. J. Vac. Sci. Tech. 2012, 30, 011505-1–011505-6. 7 Yang, S.; Ji, K. H.; Kim, U. K.; Hwang, C. S.; Park, S. -H. K.; Hwang, C. -S.; Jang, J.; Jeong, J. K. Suppression in the Negative Bias Illumination Instability of Zn-Sn-O Transistor using Oxygen Plasma Treatment. Appl. Phys. Lett. 2011, 99, 102103-1– 102103-3. 8 Park, J.; Kim, S.; Kim, C.; Kim, S.; Song, I.; Yin, H.; Kim, K. -K.; Lee, S.; Hong, K.; Lee, J.; Jung, J.; Lee, E.; Kwon, K. -W.; Park, Y. High-Performance Amorphous Gallium


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Strong

Hydrophobizer:

Laterally

Chemisorbed

Low-Molecular-Weight

Polydimethylsiloxane. Chem. Com. 2015, 51, 5844–5847.


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Table of Contents

An In2O3 thin film transistor having a 13 µm channel length fabricated by using the microscale soft patterning, and its transfer curve representing 12.9 cm2/Vs of field-effect-mobility and 0.54 V of threshold voltage hysteresis.


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Microscale Soft Patterning for Solution ... - ACS Publications

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