Power Dissipation of WSe2 Field-Effect Transistors Probed by Low

Jun 28, 2018 - Power Dissipation of WSe2 Field-Effect Transistors Probed by ... In this work, we show that a low-frequency E 2g 2 shear mode can be us...
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Surfaces, Interfaces, and Applications 2

Power Dissipation of WSe Field Effect Transistors Probed by Low-Frequency Raman Thermometry Amirhossein Behranginia, Zahra Hemmat, Arnab K Majee, Cameron J Foss, Poya Yasaei, Zlatan Aksamija, and Amin Salehi-Khojin ACS Appl. Mater. Interfaces, Just Accepted Manuscript • DOI: 10.1021/acsami.8b04724 • Publication Date (Web): 28 Jun 2018 Downloaded from http://pubs.acs.org on June 30, 2018

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ACS Applied Materials & Interfaces

Power Dissipation of WSe2 Field Effect Transistors Probed by LowFrequency Raman Thermometry Amirhossein Behranginia1, Zahra Hemmat1, Arnab K. Majee2, Cameron J. Foss2, Poya Yasaei1, Zlatan Aksamija2*, Amin Salehi-Khojin1* 1

Department of Mechanical and Industrial Engineering, University of Illinois at Chicago, Chicago, IL, 60607, USA 2 Electrical and Computer Engineering Department, University of Massachusetts Amherst, Amherst, Massachusetts 01003, United States [*] Corresponding authors: [email protected] and [email protected] Keywords: WSe2; Power dissipation; Raman thermometry; Thermal boundary conductance, 2D materials, Thermal transport; Boltzmann transport ABSTRACT The ongoing shrinkage in the size of two-dimensional (2D) electronic circuitry results in high power densities during the device operation which could cause a significant temperature rise within 2D channels. One challenge in Raman thermometry of 2D materials is that the commonly used high-frequency modes do not precisely represent the temperature rise in some of 2D materials due to peak broadening and intensity weakening at elevated temperatures. In this work, we show that a low-frequency E2g2 shear mode can be used to accurately extract temperature and measure thermal boundary conductance (TBC) in backgated tungsten diselenide (WSe2) field effect transistors (FETs), while the high-frequency peaks (E2g1 and A1g) fail to provide reliable thermal information. Our calculations indicate that the broadening of high-frequency Raman-active modes is primarily driven by anharmonic decay into pairs of longitudinal acoustic (LA) modes resulting in a weak coupling with flexural ZA branches that are responsible for the heat transfer to the substrate. We found that the TBC at the interface of WSe2 and Si/SiO2 substrate is ~16 MW/m2.K, depends on the number of WSe2 layers, and peaks for 3-4 layer stacks. Furthermore, the TBC to the substrate is highest from the layers closest to it, with each additional layer adding thermal resistance. We conclude that where heat is dissipated in a multi-layer stack is as important to device reliability as the total TBC.

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INTRODUCTION The demand for further miniaturization of nanoelectronics1–7 with high-density vertical integration provides an excellent opportunity for two-dimensional (2D) materials to rival conventional silicon technology.8,9 Successful implementation of these thin materials within the architecture of future devices could enable the fabrication of field-effect transistors (FETs) with sub-nanometer channel thickness and minimized short channel effects.10–13 However, weak energy transport through the van der Waals interface of 2D-materials with their 3D underlying substrates could impose a serious challenge toward the practical application of these materials due to thermal management issues.14–16 To shed light on this problem, we performed Raman thermometry experiments to characterize the thermal boundary conductance (TBC) at the interface of tungsten diselenide (WSe2) and a Si/SiO2 substrate, within a FET platform, at different applied powers. WSe2 is selected due to its semiconducting behavior with a high charge carrier mobility (e.g., extrinsic back-gate electron mobility of 142 cm2.V-1.s-1 for the monolayer).17,18 However, its low in-plane thermal conductivity (3.935 W.m-1.K-1 for 1 m WSe2 sample size19), coupled with the small cross-sectional area, makes the role of TBC more critical for heat dissipation during device operation. Furthermore, the lowest thermal conductivity of any solid was measured in the crossplane direction of disordered WSe2.20 In this study, we employed a low-frequency shear-mode peak of WSe2 Raman spectra to measure the TBC of back-gated WSe2 transistors. RESULTS AND DISCUSSION WSe2 flakes were exfoliated from bulk powder (Alfa Aesar Company) by standard mechanical exfoliation onto the silicon substrate with a 300 nm oxide layer. Source-drain metal electrodes were patterned by e-beam lithography followed by the deposition 5 nm of silver (Ag) and 35 nm of gold (Au). Inset of Figure 1a shows the colored scanning electron microscope (SEM) image of 2

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a typical fabricated device with a length and width of ~6.5 m and ~8.5 m, respectively. The IdVds measurements in the vacuum environment at three different applied gate biases (Figure 1a) show linear behavior, implying an ohmic contact between the Ag electrodes and WSe2, which is consistent with a previous study.18 Figure 1b shows the electrical transfer characteristics (Id-Vg) of the device measured by applying 1V source-drain bias and sweeping the gate voltage from -60 V to +60 V in vacuum. The measurements indicate an ambipolar behavior with extrinsic back gate electron mobility of ~ 65 cm2.V-1.s-1 and small hole current at high negative gate voltages (2 orders of magnitude lower than that of the electrons).18 We have also investigated the effect of current-annealing on the mobility of our devices by applying large (e.g., 10 V) drain-source bias. After this process, the mobility of some of the devices has improved by up to a factor of 2 (Figure S1). The range of backgated extrinsic electron mobility values for six different fabricated devices varies from ~20 cm2.V1 -1

.s to ~70 cm2.V-1.s-1 with ION/IOFF ratio of higher than 106. Figure S2 shows the atomic force

microscope (AFM) image of the WSe2 flake for the device shown in Figure 1a. The height profile shows a thickness of ~7 nm for this flake. a

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ACS Applied Materials & Interfaces

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Figure 1. (a) The electrical transport characteristic of WSe2 FET. The Inset shows the colorized SEM image of the back-gated WSe2 FET (scale bar is 2 µm). (b) The electrical transfer characteristic of WSe2 FET in the vacuum environment.

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Since Raman thermometry measurements are carried out in the air environment, we tested the Id-Vg experiments of WSe2 FET in the ambient condition. However, the results (Figure S3, black) show that the measured current reduces by about two orders of magnitude when the device is exposed to air. This could be due to the absorption of moisture from the air which increases the induced charge traps.21,22 To passivate the WSe2 channel, we deposited a 20 nm AlOx layer directly on top of the flakes using atomic layer deposition (ALD). Figure S4 shows atomic force microscopy (AFM) images of the AlOx layer deposited at 150 ℃ and 200 ℃ on top of the WSe2 flakes. The height profiles from the surface of these flakes show non-uniform deposition of AlOx layer with many pinholes which caused degradation in the device performance in the ambient condition. Increasing the temperature of the growth from 150 ℃ to 200 ℃ did not improve the quality of the deposition layer, but resulted in island by island deposition of this layer on top of the WSe2 flake. We found that deposition of 1 nm of SiOx layer as a seeding layer by e-beam evaporation followed by deposition of 20 nm AlOx layer in ALD system at 150 ℃ is needed to form a uniform layer of the AlOx. The AFM image (Figure S5) from the surface of WSe2 flake after passivation of the AlOx layer by this method shows an average roughness of ~1.5 nm. To establish electrical connections to the device, the AlOx layer was etched away from the gold pad areas by using a Chlorine Etch system (see method section for more details). Transfer characteristic measurements were performed in the ambient condition to test the stability and performance of devices. Results of Id-Vg measurement are shown in Figure S3 (green) at Vds=1V. We did not observe a noticeable change in the mobility of the passivated device measured in ambient conditions compared to the non-passivated device tested in a vacuum environment (Figure 1b). However, the maximum current of the device at Vg=60 V was decreased by a factor of ~2 compared to the maximum current seen in the vacuum environment, but the 4

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device operation remained steady for the entire duration of the subsequent tests. We note that the AlOx passivation results in ~14 times improvement in mobility compared with the bare devices in air.

240 20 250 260 15 15 25 240 270270 240 21 240 250 260 270 21 240 250 260 270 21 240 20 250 260 270 240 21 21 -1 15 25 240 270270 240 250 260 270 21 240 250 260 270 21 240 250 260 -1) Wave number (cm Wave Number(cm-1 )

Wave Number(cm Number(cm )) Wave

FWHM FWHM FWHM FWHM (((( ((( FWHM FWHM FWHM FWHM FWHM ((

))

T C) T(((((C) C) C) (C) C) T TTTT ( C)

T ( C)(V) (V) (V) (V) (V) T ( C) (V) (V)

Wave Number(cm ) -1-1 Wave number(cm -1 -1 Wave number(cm Wave number(cm Wave Number(cm number(cm ) -1-1)))-1 Wave number(cm ) )) Wave number(cm f dWave

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WSe2 FET WSe 2 2FET WSe FET WSe WSe WSe FET 2 FET 2 FET WSe 22FET

0.1 0.2 0.3 0.4 0.1 0.2 0.3 0.4 0.1 0.2 0.3 20.4 0.1Power 0.2 (mw/m 0.3 0.4 0.1 0.2 0.3 0.4 0.1 0.2 0.3 0.4 0.1 0.2 0.3 )0.4 22 (V) T ( C) 2 )2 Power (mw/m Power (mw/m 22)) )) Power (mw/m Power (mw/m Power (mw/m (V)(mw/m Power )

0.5 0.5 0.5 0.5 0.5 0.5 0.5

Next, confocal Raman spectroscopy at low laser powers (