Rapid Laser Printing of Paper-Based Multilayer Circuits Gui-Wen Huang,† Qing-Ping Feng,† Hong-Mei Xiao,*,† Na Li,† and Shao-Yun Fu*,†,‡ †
Technical Institute of Physics and Chemistry, Chinese Academy of Sciences, No. 29 Zhongguancun East Road, Beijing 100190, P. R. China ‡ College of Aerospace Engineering, Chongqing University, Chongqing 400044, China S Supporting Information *
ABSTRACT: Laser printing has been widely used in daily life, and the fabricating process is highly efficient and mask-free. Here we propose a laser printing process for the rapid fabrication of paper-based multilayer circuits. It does not require wetting of the paper, which is more competitive in manufacturing paper-based circuits compared to conventional liquid printing process. In the laser printed circuits, silver nanowires (Ag-NWs) are used as conducting material for their excellent electrical and mechanical properties. By repeating the printing process, multilayer three-dimensional (3D) structured circuits can be obtained, which is quite significant for complex circuit applications. In particular, the performance of the printed circuits can be exactly controlled by varying the process parameters including Ag-NW content and laminating temperature, which offers a great opportunity for rapid prototyping of customized products with designed properties. A paper-based high-frequency radio frequency identification (RFID) label with optimized performance is successfully demonstrated. By adjusting the laminating temperature to 180 °C and the toplayer Ag-NW areal density to 0.3 mg cm−2, the printed RFID antenna can be conjugately matched with the chip, and a big reading range of ∼12.3 cm with about 2.0 cm over that of the commercial etched Al antenna is achieved. This work provides a promising approach for fast and quality-controlled fabrication of multilayer circuits on common paper and may be enlightening for development of paper-based devices. KEYWORDS: laser printing, paper substrate, silver nanowire, flexible circuit, flexible electronics ntegration of printable electronics onto largely flexible substrates is important to realization of a variety of large area, flexible, and low-cost functional devices such as thinfilm sensors,1,2 supercapacitors,3,4 flexible batteries,5−7 organic light-emitting diodes (OLED),8−10 radio frequency identification tags (RFID),11,12 and so on. Among flexible substrates, paper formed by multiple layers of cellulose fibers has been recognized as the most environmentally friendly material and the ideal candidate compared to plastic films or metal foils because it is inexpensive, lightweight, recyclable, foldable, and disposable. In particular, paper has been widely utilized in daily life.13−15 Therefore, the realization of electronics based on paper substrates will significantly extend their electronic applications beyond the existing areas.16−19 Commonly used printing methods include gravure printing, screen printing, and stencil printing for producing electrical circuits on papers.20−22 However, these printing methods require creation of masks or molds before printing, which is often time consuming and expensive.23 Thus, they are less competitive in rapid prototyping applications and customization. By contrast, direct printing is a mask (or mold)-free and cost-effective technique that allows rapid and low-cost fabrication of printed circuits, which is relatively more efficient
in customized manufacturing.22,24−28 Inkjet printing is a representative direct printing technique that can be used to produce flexible electronics by directly patterning liquid conductive inks on substrates, and a number of successful applications have been demonstrated.23,29−33 However, this direct printing technique has drawbacks in fabrication of paperbased circuits since paper provides a poor barrier property to liquids due to its hygroscopicity. Therefore, during inkjet printing process, the wetting effect of paper will deteriorate the conductivity of the printed circuits and also readily lower the printing resolution. Meanwhile, the solvent in conductive inks could lower the performance of electronics to some extent and thus cause distortion of paper substrates.23,29 Laser printing (LP) has been widely used in daily life and is an electrostatic digital printing process. By employing a laser in the exposing process and solid powdered ink (namely toner) for the developing process, LP offers a high-speed and highquality printing on papers.34 After being developed for decades,
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© 2016 American Chemical Society
Received: July 20, 2016 Accepted: September 8, 2016 Published: September 8, 2016 8895
DOI: 10.1021/acsnano.6b04830 ACS Nano 2016, 10, 8895−8903
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Figure 1. Schematic illustration of the LP multilayer circuit fabrication process. The insets at upright corners represent the schematic cross section structures of the circuit at each stage. (a) Laser printing of bottom toner layer to form a circuit pattern on paper substrate. (b) Formation of bottom Ag-NW circuit layer by hot laminating, in which Ag-NWs coated in advance on polyimide film were selectively captured by toner pattern when passing through the hot laminating rollers. (c) Laser printing of the top toner layer to form a circuit pattern on the bottom Ag-NW circuit layer. (d) Formation of the top Ag-NW circuit layer on the top toner layer by hot laminating. (e) Schematic showing of the as-fabricated multilayer circuit.
new technological tendency because it can fully use the limited spaces of the small electrical devices.25,29 Moreover, the multilayer structure is necessary for the application of planar loop circuits since the inner and outer terminals of the loop circuits have to be interconnected by an overlayer conductive bridge.35 Multilayer configurations are capable of highfrequency (HF) signal conduction with minimal transmission loss and robust, reliable performance in various environmental conditions. However, so far, few fabricating techniques have been developed for direct printing of multilayer electronics.25,29,35 Therefore, new techniques that can rapidly print multilayer circuits are eagerly desired. The LP method has been successfully employed for fabricating circuits on polymer film such as poly(ethylene terephthalate) (PET) substrate.36,37 Herein a modified LP process is proposed to fabricate high-quality multilayer circuits on common office-used paper substrates. Through a “secondary fusing” process, the patterned plastic toner can be melted for selectively capturing conductive materials to form electrical circuits. The creative parts of this work are the combined use of silver nanowire (Ag-NW) ink and solvent-free transferring technique. Thus, the LP technique can be applied on paper substrates that cannot endure solvent process. This proposed technology takes full advantage of both rapidness of LP and easy control of electrical property. In addition, due to the insulating nature of the toner, the LP process offers a facile method to fabricate multilayer electrical circuits. Ag-NWs are
the price of LP has been greatly lowered, and the once cuttingedge LP devices are now ubiquitous in modern society. The toner used in LP consists of fine particles of dry thermoplastic polymer powders mixed with carbon black or coloring agents, which is selectively collected by electrostatic force in developing process and then transferred to paper. The transferred patterns are then heated by the heating rollers to melt the thermoplastic polymer powders in the fusing process, forming permanent images on paper substrates. The whole printing process is highly efficient and totally solvent-free, which is very suitable for printing of electronic circuits on papers. Moreover, the LP process has obvious advantages over the existing liquid printing techniques due to the avoidance of the wetting and distortion of the substrates. It seems that the LP could be an ideal method for fabrication of paper-based electronics. However, the LP has not been employed for the direct-printing of circuits. The LP is based on an electrostatic transfer technique that requires charge and electrostatic attraction of printed powders to latent images on a photoreceptor drum. The direct addition of conductive powders to toner is impractical because it will cause electrostatic leakage and failure in transfer processing. Consequently, the standard LP process cannot be used for printing circuits. In this work, the modified LP method is successfully used to rapidly fabricate electrical circuits to be shown later. As the current flexible electronics are becoming thinner and lighter, integration of multilayer circuits on one substrate is a 8896
DOI: 10.1021/acsnano.6b04830 ACS Nano 2016, 10, 8895−8903
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Figure 2. (a) SEM images of the surface morphology of Ag-NW networks with various areal densities on polyimide substrate. (b) Sheet resistance of Ag-NW networks as a function of Ag-NW areal density. (c) SEM images after five times of tape test of the surface morphology of bottom Ag-NW circuit layers fabricated at various laminating temperatures with a fixed Ag-NW areal density of 0.5 mg cm−2. (d) Sheet resistance of bottom Ag-NW circuit layers fabricated at various laminating temperatures as a function of tape test times.
chosen as the conductive material for their excellent electrical performance and good operability.12,15,38−40 In addition, the electrical property of the obtained circuits can be adjusted by controlling the amount of Ag-NWs, which provides an easy way for optimizing electrical properties of printed devices. Finally, by using the multilayer circuit LP method, HF RFID tags with optimized conjugate matching properties are demonstrated. The ability to avoid wetting by liquid combined with foldability, mechanical flexibility, lightweight, and low-cost of common paper substrates makes the LP method a promising approach for fast and quality-controlled fabrication of printed multilayer paper-based electronics.
permanently to the paper substrate. The paper substrate in this work is the commonly used commercial printing paper (70 g m−2, Goldship, Gold East Paper Co. Ltd., Jiangsu, China). The insets at the upright corners in Figure 1 show the schematic cross section structures of the printed circuit at individual stages. After the printing of toner patterns, the second fusing process is used to gain the conductive Ag-NW coating as shown in Figure 1b. Ag-NWs in aqueous ethanol solution are coated in advance on polyimide (PI) film with a certain areal density and are then completely dried to build up continuous conducting networks. The Ag-NW-coated PI film and the printed paper are then sent to go through a hot laminating process. Two heating silicone rollers instantly fuse the printed patterns on the paper and meanwhile, Ag-NWs are selectively adhered by the melted polymer, resulting in the conductive Ag-NW coating on the asprepared toner patterns, forming the bottom Ag-NW circuit layer. As the adhesion of Ag-NWs to the PI film is better than that to the paper, Ag-NWs in the unprinted areas will be left on the PI film after laminating (see Figure S1 in Supporting Information), which ensures the selective patterning of AgNWs on the paper. The Ag-NWs left on the PI film can be recycled by rinsing and sonicating to redisperse in ethanol solvent. At last, single-layer paper-based electrical circuits can be readily fabricated. In this way, multilayer circuits can be manufactured by an additional printing and coating process. As described in Figure 1c, the top toner layer is printed in terms of circuit patterns on the bottom Ag-NW-coated circuit. Finally, Ag-NWs are coated on the top toner layer by the hot laminating process as shown in Figure 1d to form the top AgNW circuit layer. Figure 1e represents the schematic cross
RESULTS AND DISCUSSION Figure 1 presents the schematic illustration of the LP multilayer circuit fabrication process. First, the designed circuit patterns are printed on one paper by one common LP machine to obtain the bottom toner layer. As described in Figure 1a, when one digital image file is transferred to the LP unit, the laser beam starts to scan through a lens and mirror system onto the electrically charged rotatable photoreceptor drum. Due to the photoconductive effect, charged electrons on photoreceptor drum fall away from the scanned areas by the laser beam, leaving the electron image as the designed pattern on the drum. When the drum sequentially rotates close to the developing roller, the toner particles in the developing roller are electrostatically attracted to the electron image and form a toner image, which is then transferred onto the paper by direct contact. Finally, the paper passes through a heat roller to instantly fuse the toner and bond the plastic toner layer 8897
DOI: 10.1021/acsnano.6b04830 ACS Nano 2016, 10, 8895−8903
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Figure 3. (a) Digital photographs and (b) optical microscopy images of HF RFID (13.56 MHz) antenna fabricated by the LP method at each processing stage. (c) Resistance between the top and bottom Ag-NW circuit layers as a function of top-layer laminating temperature. The insets represent the optical microscopy images of the multilayer circuits fabricated at different top-layer laminating temperatures. (d) SEM image of the cross section of the printed multilayer circuit.
and reaches a plateau at 0.5 mg cm−2. The sheet resistance of the network at the areal density of 0.5 mg cm−2 is equal to 0.0266 Ω sq−1, which is very close to that at 0.6 mg cm−2 (0.0237 Ω sq−1). Therefore, in order to use less Ag-NW material for the cost-reduction purpose, 0.5 mg cm−2 of AgNWs is selected as the proper areal density for the process. On the other hand, a series of laminating temperatures are used to investigate the influence of temperature on the Ag-NW adhesion property. The adhesion ability between conductive circuits and paper substrate is quite important for flexible devices because a weak adhesion may lead to delamination and failure of the circuits after being bended or rolled during applications.41,42 The adhesion ability between Ag-NWs and paper substrate in this work is characterized by a standard tape testing. For one typical tape test, the biaxially oriented polypropylene-based pressure-sensitive adhesive tape of primary adhesion ≥13 (measured following the JIS Z02372000 standard) is first pasted on the top of the circuit under uniform pressure and then peeled off from the surface of the circuit.12 Figure 2c shows the SEM images of the bottom circuit surface after five times of tape testing as a function of laminating temperature. The sheet resistance of the initial circuit and after each tape test is displayed in Figure 2d. As can be seen from the SEM images, only a few Ag-NWs are left for the 80 °C laminated circuit after five times of tape testing, and
section structure of the as-fabricated multilayer circuit, where the bottom and the top Ag-NW layers are separated by the top toner layer, leading to the independent two conductive circuit layers. This process can be easily used to fabricate flexible multilayer circuits for electronic devices. There are two dominant technological parameters that affect the performances of the printed circuits. One of the two parameters is the Ag-NW content used in the coating process, which directly determines the electrical resistance of the circuits. The other parameter is the temperature employed in the hot laminating process, which can influence the adhesion property of the Ag-NWs to paper substrate. The content of AgNWs used in the coating process is described by the areal density of the Ag-NW network coated on the PI film, namely the weight of Ag-NWs in per unit area. The Ag-NW areal density can be exactly controlled by adjusting the concentration of Ag-NW dispersing solution coated on the PI film. Figure 2a exhibits the SEM images of the Ag-NW networks with various areal densities coated on the PI film. It is clear that Ag-NWs are uniformly distributed on the PI substrate. Figure 2b shows the corresponding sheet resistance of the networks. As the areal density increases, continuous and compact conductive networks are gradually formed. It can be seen from Figure 2b that the sheet resistance initially decreases sharply with increasing the Ag-NW content in areal density, while the sheet resistance varies slowly when the areal density is higher than 0.3 mg cm−2 8898
DOI: 10.1021/acsnano.6b04830 ACS Nano 2016, 10, 8895−8903
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Figure 4. (a) The complex impedance real part and imaginary part absolute values of the chip as a function of frequency, in which the inset shows the optical microscope image of the flip-bonded chip on the printed antenna. (b) The complex impedance real part and imaginary part absolute values of commercial etched Al antenna and laser printed antenna with 0.5 mg cm−2 top-layer Ag-NW areal density as a function of frequency. (c) Impedance absolute values of the chip, commercial etched Al antenna, and laser printed antennas with various top-layer AgNW areal densities at the frequency of 13.56 MHz. (d) Reading range of the RFID tags fabricated with commercial etched Al antenna and laser printed antennas with various Ag-NW areal densities. The inset shows the reading range testing system used.
Information show the resistance variations of the circuits during bending and humidity tests, respectively, which demonstrate the reasonably good reliability of the printed circuits to mechanical bending or environmental changing. An application example is demonstrated below to show the LP method for fabrication of multilayer circuits. By using the parameter-optimized LP process at the laminating temperature of 180 °C and the Ag-NW areal density of 0.5 mg cm−2 for fabricating the bottom circuit layer, HF RFID antennas working at 13.56 MHz are fabricated on the paper substrate. Figure 3a gives the digital photographs of one antenna at each processing stage, and Figure 3b presents the corresponding optical microscopy images. A rectangular loop-structured antenna pattern with an outer dimension of about 3 × 2 cm2 is first printed on the paper substrate by the LP. It can be seen that the printing toner forms a pattern with regular lines of about 400 μm in width. The sizes of the circuits that can be fabricated by the proposed LP method depend mainly on the limitations of the commercial laser printer used, which is about 100 μm for both the minimum line width and span. Then, through the second fusing process, Ag-NWs are selectively captured by the toner pattern, forming conductive circuits. As exhibited in Figure 3b, Ag-NWs are uniformly embedded in the patterned areas, resulting in formation of Ag-NW circuits with a resolution as high as the pristine toner pattern, which indicates the high accuracy of the fabricating approach. At this point, the fabrication of bottom-layer circuit is completed. As the antenna is a planar loop in structure, an up-layered conductive bridge is
the sheet resistance increases dramatically during the test, as shown in Figure 2d. This indicates the poor adhesion ability of the 80 °C laminated circuit. At the relatively low laminating temperature of 80 °C, only a very thin layer of the toner pattern can be melted to adhere Ag-NWs to the paper substrate, leading to the poor adhesion. As the laminating temperature increases, a thicker layer of toner in the patterns can be melted to provide stronger adhesion of Ag-NWs to the paper substrate, and more Ag-NWs remain in the circuit after tape tests; meanwhile, the electrical stability of the circuit under tape tests is much improved. When the laminating temperature is increased to 180 °C, the obtained circuit exhibits a robust response to the tape test with only a slight increase in sheet resistance after five times of testing (
