Rapid Laser Printing of Paper-Based Multilayer Circuits - ACS Nano

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Rapid Laser Printing of Paper-Based Multilayer Circuits Gui-Wen Huang, Qing-Ping Feng, Hong-Mei Xiao, Na Li, and Shao-Yun Fu ACS Nano, Just Accepted Manuscript • DOI: 10.1021/acsnano.6b04830 • Publication Date (Web): 08 Sep 2016 Downloaded from http://pubs.acs.org on September 9, 2016

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Rapid Laser Printing of Paper-Based Multilayer Circuits Gui-Wen Huang,† Qing-Ping Feng,† Hong-Mei Xiao,*,† Na Li† and Shao-Yun Fu*,†,‡ †

Technical Institute of Physics and Chemistry, Chinese Academy of Sciences, No.29

Zhongguancun East Road, Beijing 100190, P. R. China ‡

College of Aerospace Engineering, Chongqing University, Chongqing 400044, China

ABSTRACT: Laser printing has been widely used in daily life and the fabricating process is highly efficient and maskfree. Here we propose a laser printing process for the rapid fabrication of paper-based multilayer circuits. It does not require wetting of the paper, which is more competitive in manufacturing paper-based circuits compared to conventional liquid printing process. In the laser printed circuits, silver nanowires (Ag-NWs) are used as conducting material for their excellent electrical and mechanical properties. By repeating the printing process, multilayer three dimensional (3D) structured circuits can be obtained, which is of quite significance for complex circuit applications. In particular, the performance of the printed circuits can be exactly controlled by varying the process parameters including Ag-NW content and laminating temperature, which offers a great opportunity for rapid prototyping of customized products with designed properties. A paper-based high-frequency (HF) RFID label with optimized performance is successfully demonstrated. By adjusting the laminating temperature to 180 °C and the top layer Ag-NW areal density to 0.3 mg cm-2, the printed RFID antenna can be conjugately matched

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with the chip and a big reading range of ~12.3 cm with about 2.0 cm over that of the commercial etched Al antenna is achieved. This work provides a promising approach for fast and qualitycontrolled fabrication of multilayer circuits on common paper and may be enlightening for development of paper-based devices.

KEYWORDS: Laser printing, paper substrate, silver nanowire, flexible circuit, flexible electronics

Integration of printable electronics onto largely flexible substrates is important to realization of a variety of large area, flexible and low cost functional devices such as thin film sensor,1,2 supercapacitors,3,4 flexible batteries,5-7 organic light emitting diodes (OLED),8-10 radio frequency identification tags (RFID),11,12 and so on. Among flexible substrates, paper formed by multiple layers of cellulose fibers has been recognized as the most environmentally friendly material and the ideal candidate compared to plastic films or metal foils because it is inexpensive, lightweight, recyclable, foldable and disposable. In particular, paper has been widely utilized in daily life.13-15 Therefore, the realization of electronics based on paper substrates will significantly extend their electronic applications beyond the existing areas.16-19 Commonly used printing methods include gravure printing, screen printing and stencil printing for producing electrical circuits on papers.20-22 However, these printing methods require creation of masks or molds before printing, which is often time-consuming and expensive.23 Thus, they are less competitive in rapid prototyping applications and customization. By contrast, direct printing is a mask (or mold)-free and cost-effective technique that allows rapid and low-cost fabrication

of

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circuits,

which

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relatively

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efficient

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manufacturing.22,24-28 Inkjet printing is a representative direct printing technique that can be used to produce flexible electronics by directly patterning liquid conductive inks on substrates and a number of successful applications have been demonstrated.23,29-33 However, this direct printing technique has drawbacks in fabrication of paper-based circuits since paper provides poor barrier property to liquids due to its hygroscopicity. Therefore, during inkjet printing process, the wetting effect of paper will deteriorate the conductivity of the printed circuits and also readily lower the printing resolution. Meanwhile, the solvent in conductive inks could lower the performance of electronics to some extent and thus cause distortion of paper substrates.23,29 Laser printing (LP) has been widely used in daily life and is an electrostatic digital printing process. By employing laser in exposing process and solid powdered ink (namely toner) for developing process, LP offers a high speed and high quality printing on papers.34 After developed for decades, the price of LP has been greatly lowered and the once cutting-edge LP devices are now ubiquitous in modern society. The toner used in LP consists of fine particles of dry thermoplastic polymer powders mixed with carbon black or coloring agents, which is selectively collected by electrostatic force in developing process and then transferred to paper. The transferred patterns are then heated by the heating rollers to melt the thermoplastic polymer powders in fusing process, forming permanently images on paper substrates. The whole printing process is highly efficient and totally solvent-free, which is very suitable for printing of electronic circuits on papers. Moreover, the LP process has obvious advantages over the existing liquid printing techniques due to the avoidance of the wetting and distortion of the substrates. It seems that the LP could be an ideal method for fabrication of paper-based electronics. However, the LP has not been employed for fabrication of circuits. The LP is based on electrostatic transfer technique that requires charge and electrostatic attraction of printed powders to latent images on


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a photoreceptor drum. The direct addition of conductive powders to toner is impractical because it will cause electrostatic leakage and failure in transfer processing. Consequently, the standard LP process cannot be used for printing circuits. In this work, the modified LP method is successfully used to rapidly fabricate electrical circuits to be shown later. As the current flexible electronics are becoming thinner and lighter, integration of multilayer circuits on one substrate is a new technological tendency because it can fully use the limited spaces of the small electrical devices.25,29 Moreover, the multilayer structure is necessary for the application of planar loop circuits since the inner and outer terminals of the loop circuits have to be interconnected by an over-layer conductive bridge.35 Multilayer configurations are capable of high frequency signal conduction with minimal transmission loss, and robust, reliable performance in various environmental conditions. However, so far, few fabricating techniques have been developed for direct printing of multilayer electronics.25,29,35 Therefore, new techniques that can rapidly print multilayer circuits are eagerly desired. The LP method has been successfully employed for fabricating circuits on polymer film such as poly(ethylene terephthalate) (PET) substrate.36,37 Herein a modified LP process is proposed to fabricate high quality multilayer circuits on common office-used paper substrates. Through a “secondary fusing” process, the patterned plastic toner can be melted for selectively capturing conductive materials to form electrical circuits. The creative parts of this work are the combined use of Ag-NW ink and solvent-free transferring technique. Thus, the LP technique can be applied on paper substrates that cannot endure solvent process. This proposed technology takes full advantages of both rapidness of LP and easy control of electrical property. The major innovation is the utilization of the adhesion ability of the laser-printed toner patterns. In addition, due to the insulating nature of the toner, the LP process offers a facile method to fabricate multilayer


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electrical circuits. Silver nanowires (Ag-NWs) are chosen as the conductive material for their excellent electrical performance and good operability.12,15,38-40 In addition, the electrical property of the obtained circuits can be adjusted by controlling the amount of Ag-NWs, which provides an easy way for optimizing electrical properties of printed devices. Finally, by using the multilayer circuit LP method, high frequency (HF) radio identification (RFID) tags with optimized conjugate matching properties are demonstrated. The ability to avoid wetting by liquid combined with foldability, mechanical flexibility, lightweight and low-cost of common paper substrates makes the LP method a promising approach for fast and quality-controlled fabrication of printed multilayer paper-based electronics. RESULTS AND DISCUSSION Figure 1 presents the schematic illustration of the LP multilayer circuit fabrication process. First, the designed circuit patterns are printed on one paper by one common LP machine to obtain the bottom toner layer. As described in Figure 1a, when one digital image file is transferred to the LP unit, the laser beam starts to scan through a lense and mirror system onto the electrically-charged rotatable photoreceptor drum. Due to the photoconductive effect, charged electrons on photoreceptor drum fall away from the scanned areas by the laser beam, leaving the electron image as the designed pattern on the drum. When the drum sequentially rotates close to the developing roller, the toner particles in the developing roller are electrostatically attracted to the electron image and form a toner image, which is then transferred onto the paper by direct contact. Finally, the paper passes through a heat roller to instantly fuse the toner and bond the plastic toner layer permanently to the paper substrate. The paper substrate in this work is the commonly used commercial printing paper (70 g m-2, Goldship, Gold East Paper Co. Ltd., Jiangsu, China). The insets at the upright corners in Figure 1 show the schematic


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cross section structures of the printed circuit at individual stages. After the printing of toner patterns, the second fusing process is used to gain the conductive Ag-NW coating as shown in Figure 1b. Ag-NWs in aqueous acetone solution are coated in advance on polyimide (PI) film with a certain areal density and are then completely dried to build up continuous conducting networks. The Ag-NW-coated PI film and the printed paper are then sent to go through a hot laminating process. Two heating silicone rollers instantly fuse the printed patterns on the paper and meanwhile, Ag-NWs are selectively adhered by the melted polymer, resulting in the conductive Ag-NW coating on the as-prepared toner patterns, forming the bottom Ag-NW circuit layer. As the adhesion of Ag-NWs to the PI film is better than that to the paper, Ag-NWs in the un-printed areas will be left on the PI film after laminating (see Figure S1 in Supporting Information), which ensures the selective patterning of Ag-NWs on the paper. The Ag-NWs left on the PI film can be recycled by rinsing and sonicating to re-disperse in acetone solvent. At last, single layer paper-based electrical circuits can be readily fabricated. In this way, multilayer circuits can be manufactured by an additional printing and coating process. As described in Figure 1c, top toner layer are printed in terms of circuit patterns on the bottom Ag-NW-coated circuit. Finally, Ag-NWs are coated on the top toner layer by the hot laminating process as shown in Figure 1d to form the top Ag-NW circuit layer. Figure 1e represents the schematic cross section structure of the as-fabricated multilayer circuit, where the bottom Ag-NW layer and the top Ag-NW layer are separated by the top toner layer, leading to the independent two conductive circuit layers. This process can be easily used to fabricate flexible multilayer circuits for electronic devices.


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Figure 1. Schematic illustration of the laser printing multilayer circuit fabrication process. The insets at upright corners represent the schematic cross section structures of the circuit at each stage. a) Laser printing of bottom toner layer to form circuit pattern on paper substrate; b) formation of bottom Ag-NW circuit layer by hot laminating, in which Ag-NWs coated in advance on polyimide film were selectively captured by toner pattern when passing through the hot laminating rollers; c) laser printing of top toner layer to form circuit pattern on the bottom Ag-NW circuit layer; d) formation of top Ag-NW circuit layer on top toner layer by hot laminating; (e) schematic showing of as-fabricated multi-layer circuit.


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There are two dominant technological parameters that affect the performances of the printed circuits. One of the two parameters is the Ag-NW content used in the coating process, which directly determines the electrical resistance of the circuits. The other parameter is the temperature employed in the hot laminating process, which can influence the adhesion property of the Ag-NWs to paper substrate. The content of Ag-NWs used in the coating process is described by the areal density of the Ag-NW network coated on the PI film, namely the weight of Ag-NWs in per unit area. The Ag-NW areal density can be exactly controlled by adjusting the concentration of Ag-NW dispersing solution coated on the PI film. Figure 2a exhibits the SEM images of the Ag-NW networks with various areal densities coated on the PI film. It is clear that Ag-NWs are uniformly distributed on the PI substrate. Figure 2b shows the corresponding sheet resistance of the networks. As the areal density increases, continuous and compact conductive networks are gradually formed. It can be seen from Figure 2b that the sheet resistance initially decreases sharply with increasing the Ag-NW content in areal density while the sheet resistance varies slowly when the areal density is higher than 0.3 mg cm-2 and reaches a plateau at 0.5 mg cm-2. The sheet resistance of the network at the areal density of 0.5 mg cm-2 is equal to 0.0266 Ω square-1, which is very close to that at 0.6 mg cm-2 (0.0237 Ω square-1). Therefore, in order to use a less amount of Ag-NW material for the cost-reduction purpose, 0.5 mg cm-2 of Ag-NWs is selected as the proper areal density for the process. On the other hand, a series of laminating temperatures are used to investigate the influence of temperature on the Ag-NW adhesion property. The adhesion ability between conductive circuits and paper substrate is quite important for flexible devices because a weak adhesion may lead to delamination and failure of the circuits after being bended or rolled during applications.41,42 The adhesion ability between Ag-NWs and paper substrate in this work is characterized by a standard tape testing. For one time of typical


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tape test, the biaxially oriented polypropylene-based pressure-sensitive adhesive tape of primary adhesion ≥ 13 (measured following the JIS Z0237-2000 standard) is firstly pasted on the top of the circuit under uniform pressure and then peeled off from the surface of the circuit.12

Figure 2. a) SEM images of the surface morphology of Ag-NW networks with various areal densities on polyimide substrate; b) sheet resistance of Ag-NW networks as a function of AgNW areal density; c) SEM images after five times of tape test of the surface morphology of bottom Ag-NW circuit layers fabricated at various laminating temperatures with a fixed Ag-NW areal density of 0.5 mg cm-2; d) sheet resistance of bottom Ag-NW circuit layers fabricated at various laminating temperatures as a function of tape test times.


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Figure 2c shows the SEM images of the bottom circuit surface after five times of tape test as a function of laminating temperature. The sheet resistance of the initial circuit and after each tape test is displayed in Figure 2d. As can be seen from the SEM images, only a few Ag-NWs are left for the 80°C laminated circuit after five times of tape tests and the sheet resistance increases dramatically during test as shown in Figure 2d. This indicates the poor adhesion ability of the 80°C laminated circuit. At the relatively low laminating temperature of 80°C, only a very thin layer of the toner pattern can be melted to adhere Ag-NWs to the paper substrate, leading to the poor adhesion. As the laminating temperature increases, a thicker layer of toner in the patterns can be melted to provide stronger adhesion of Ag-NWs to the paper substrate and more Ag-NWs are remained in the circuit after tape tests; meanwhile, the electrical stability of the circuit under tape tests is much improved. When the laminating temperature is increased to 180°C, the obtained circuit exhibits a robust response to the tape test with only a slight increase in sheet resistance after five times of tests (less than 0.1 Ω square-1), which demonstrates the outstanding adhesion ability between Ag-NW circuit and paper substrate. On the other hand, 180°C is also the limited temperature of the laminator since higher temperature may cause damage of the silicon rollers. Consequently, the laminating temperature is chosen to be 180 °C for the bottom circuit layer in our process. As the lamination is conducted at a relatively high speed (2 m/min), the paper substrate will be only heated for a very short time (about 1~2 seconds) when passing through the lamination rollers. The paper substrate can stand up for the 180°C lamination temperature in a short time without obvious performance degradation. Besides the tape test, bending and environmental tests are also conducted on the 180°C laminated circuits.43,44 Figure S2 and Figure S3 in Supporting Information show the resistance variations of the circuits during bending and humidity tests,


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respectively, which demonstrates the reasonably good reliability of the printed circuits to mechanical bending or environmental changing. An application example is demonstrated below to show the LP method for fabrication of multi-layer circuits. By using the parameter-optimized LP process at the laminating temperature of 180°C and the Ag-NW areal density of 0.5 mg cm-2 for fabricating the bottom circuit layer, high frequency radio identification (HF RFID) antennas working at 13.56 MHz are fabricated on the paper substrate. Figure 3a gives the digital photographs of one antenna at each processing stage and Figure 3b presents the corresponding optical microscopy images. A rectangular loopstructured antenna pattern with an outer dimension of about 3×2 cm2 is firstly printed on the paper substrate by the LP. It can be seen that the printing toner forms a pattern with regular lines of about 400 µm in width. The sizes of the circuits that can be fabricated by the proposed LP method depend mainly on the limitations of the commercial laser printer used, which is about 100 µm for both the minimum line width and span. Then, through the 2nd fusing process, AgNWs are selectively captured by the toner pattern, forming conductive circuits. As exhibited in Figure 3b, Ag-NWs are uniformly embedded in the patterned areas, resulting in formation of Ag-NW circuits with a resolution as high as the pristine toner pattern, which indicates the high accuracy of the fabricating approach. At this point, the fabrication of bottom layer circuit is completed. As the antenna is a planar loop in structure, an up-layered conductive bridge is required to connect its inner and outer terminals. For manufacturing the top circuit layer, the secondary LP is conducted on the bottom circuit layer to form the top toner layer printed in red color for visual differentiation. It can be seen from Figure 3b, the top toner layer is well printed with high resolution by secondary printing process and the bottom circuit is completely covered in the printed area. The top toner layer plays roles in both adhering the top Ag-NW layer and


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insulating the two conductive layers. Finally, Ag-NWs are coated by the hot laminating to obtain the top layer bridge circuit. The top circuit is connected to the two terminals of antenna at connecting points by Ag-NW droppings after printing to complete the loop of the circuit as shown in Figure S4 in Supporting Information.

Figure 3. a) Digital photographs and b) optical microscopy images of high frequency (13.56 MHz) radio identification (HF RFID) antenna fabricated by the laser printing method at each processing stage; c) resistance between the top and bottom Ag-NW circuit layers as a function of top layer laminating temperature. The insets represent the optical microscopy images of the multilayer circuits fabricated at different top layer laminating temperatures; d) SEM image of the cross section of the printed multilayer circuit.


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Figure 3c displays the resistance between the bottom and top Ag-NW conductive layers as a function of top layer laminating temperature, where the Ag-NW areal density is fixed at 0.5 mg cm-2. As can be seen, the 80°C and 100°C laminated samples show a reasonable good insulating property between the top and bottom circuit layers with a resistance higher than 1010 Ω. However, when the laminating temperature is increased over 120°C, the resistance between the top and bottom Ag-NW layers decreases sharply, indicating the failure of insulation. This is because at a high laminating temperature, deep melting of the up toner layer takes place in the laminating process, leading to the direct connection of the two Ag-NW layers. The insets in Figure 3c show the optical microscopy images of the circuits at the layer boundary area. For the 100°C laminated sample, a clear boundary can be seen between the top and bottom Ag-NW circuit layers. Nonetheless, for the 140°C laminated one, the boundary disappears and the two circuit layers are almost melted together, which short-circuits the antenna. Therefore, taking consideration both of insulation and adhesion abilities, the top circuit layer is laminated at the temperature of 100°C. At a relatively low laminating temperature, the adhesion ability of the top circuit layer could be relatively weaker than that of the bottom circuit layer. Nonetheless, the top circuit layer is directly connected to the top toner layer but not to the paper substrate. The adhesion ability between multi-layer circuit and paper substrate is dominated by the bottom circuit layer. Thus, the laminating temperature of 100°C for the top circuit layer will not noticeably affect the adhesion performance of the whole multi-layer circuit. Figure 3d shows the cross sectional SEM image of the antenna at the bridging area, where the multilayer structure can be clearly seen. As shown in the image, the top and bottom Ag-NW layers are separated by the top toner layer, resulting in the two independent conductive circuit layers. This demonstrates the successful fabrication of multilayer circuits on the paper substrate by our proposed LP approach. The thickness of the printed toner layer depends on the settings of the laser printer. In this work, the thickness of the toner layers is set to be fixed at about 10 µm while the thickness of the Ag-


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NW layer generally increases with increasing the Ag-NW areal density. For the 0.5 mg cm-2 AgNW bottom layer shown in Figure 3d, the thickness is about 3 µm.

Figure 4. a) The complex impedance real part and imaginary part absolute values of the chip as a function of frequency, in which the inset shows the optical microscope image of the flip-bonded chip on the printed antenna; b) the complex impedance real part and imaginary part absolute values of commercial etched Al antenna and laser printed antenna with 0.5 mg cm-2 top layer Ag-NW areal density as a function of frequency; c) impedance absolute values of the chip, commercial etched Al antenna and laser printed antennas with various top layer Ag-NW areal densities at the frequency of 13.56 MHz and d) reading range of the RFID tags fabricated with commercial etched Al antenna and laser printed antennas with various Ag-NW areal densities. The inset shows the reading range testing system used.


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After the fabrication of antenna, a chip is bonded at the bonding point of antenna indicated by the arrow pattern as shown in Figure 3a. The inset in Figure 4a presents the optical microscope image of the flip-bonded chip on the printed antenna. The gap between the two pads on the paper substrate is about 100 µm to fit the chip. The chip is manually flip-bonded to the antenna using rapid curing epoxy-based adhesive. Both the chip and the antenna form the HF RFID inlay, which can then perform digital information communication with reading system. The inlay is then packaged in stickers to form a complete tag to perform the reading range tests. For RFID tags, one of the most important characteristics is the reading range, namely the maximum distance at which a RFID reader can detect the backscattered signal from the tag. There are two limitations on the reading range. One is the maximum distance at which tag receives enough power just to turn on and scatter back. The other is the maximum distance at which a reader can detect this scattered signal. The practical reading range will be the smaller one of the two maximum distances. As the sensitivity of a reader is higher in comparison with a tag, the reading range is defined by the tag response threshold.45 From the Friis free-space formula, the reading range can be calculated from Equation 1 as follow:45

r=

λ 4π

PG t t Grτ Pth

(1)

where r is the reading range, λ is the wavelength, Pt is the power transmitted by the reader, Gt is the gain of the transmitting antenna, Gr is the gain of the receiving tag antenna, Pth is the minimum threshold power necessary to power up the chip, and τ is the power transmission coefficient between the antenna and chip of a tag. Except τ, other parameters are typically fixed for a designed RFID system. Thus, τ is the only dominant factor determining the reading range. τ is given by Equation 2:46,47


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τ=

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4 Rc Ra Zc + Za

(2)

2

where Zc=Rc+ϳXc is the complex impedance of the chip, Za=Ra+ϳXa is the complex impedance of the antenna. The real part (R) of the complex impedance is the resistance and the imaginary part (jX) is the reactance consisting of capacitive reactance and inductive reactance. Because the circuit in a chip is capacitive, its imaginary part is negative in value. For an antenna, the imaginary part is positive in value for its inductive nature. As τ is in range of 0 and 1, to maximize the reading range, τ has to be optimized close to 1. Equation 2 can be normalized by Rc2 to obtain Equation 3:47

τ=

4ra 1 + ra + jQ(1 + xa )

2

(3)

In Equation 3, ra=Ra/Rc is the normalized antenna resistance, xa=Xa/Xc is the normalized antenna reactance, Q=Xc/Rc is the resonant factor of the chip at a given frequency. From Equation 3, it can be deduced that when ra approaches 1, and xa approaches -1, the maximum value of τ can be obtained. This means that their imaginary parts are opposite in value when the real parts of antenna and chip are equal to each other. Namely, when they are conjugately matched, the optimal reading range property of the tag will be achieved. The real and imaginary parts of the complex impedance are frequency dependent. Figure 4a shows the absolute values of the real and imaginary parts of the chip as a function of frequency from 10 to 15 MHz. As can be seen, the real part with a value in the range of 40 and 50 Ω varies slowly with increasing the frequency. For the capacitive nature of the chip, its imaginary part in an absolute value decreases obviously with increasing the frequency. On the other hand, the imaginary part for the inductive antennas increases with increasing the frequency as shown in Figure 4b, in which the complex impedances for commercially etched Al antenna and laser


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printed antenna with 0.5 mg cm-2 top layer Ag-NW areal density are presented. It can be seen that the imaginary curves of the two antennas are almost overlapped because the inductive reactance is majorly determined by the circuit pattern, which is the same for all the antennas. However, the real parts of the two antennas show significant differences. Due to the use of bulk metal foil in commercial etched Al antenna, it shows a lower real part value near 5 Ω. For the asprinted antenna of Ag-NW networks, a higher real part value around 20 Ω is detected. Although the bulk electrical conductivity of Ag is higher than that of Al, a large number of contact points between Ag-NWs make the total resistance of Ag-NW network higher than that of bulk Al foil. Proper impedance match between the antenna and the chip is of paramount importance in RFID applications. Figure 4c shows the conjugate matching map of the chip and antennas at 13.56 MHz. The “bull’s eye” in the center of the map is the impedance of the chip, which is the target of conjugate matching. As can be seen in the map, although the imaginary part of the etched Al antenna is close to that of the as-prepared chip, its “shot” still misses the target since its real part is too small compared to that of the chip. Furthermore, for the commercial bulk metal etched circuits, it is hard to considerably adjust the real part value because the change in resistance is very limited by varying the width or thickness of the bulk metal foils. On the contrast, the real part resistance of the laser printed antenna can be easily adjusted by varying the amount of Ag-NWs applied in the circuit, which offers it the “aiming” ability to hit the target in the matching map. At a fixed bottom layer Ag-NW areal density of 0.5 mg cm-2, just by decreasing the top layer Ag-NW areal density, the real part of the antenna can be significantly improved and gradually moved close to the target as shown in Figure 4c. When the areal density is decreased to 0.3 mg cm-2 for the top Ag-NW circuit layer, the best matching can be achieved and a further decrease in areal density will cause mismatching again. Thus, the printed antenna


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with the 0.3 mg cm-2 top layer Ag-NW areal density is considered to be the most suitable areal density to match the chip. Reading range test results displayed in Figure 4d confirm the effect of conjugate matching. The inset in Figure 4d shows the digital photograph of the reading range testing system used in this work, where the distance between RFID tag and the reader is adjusted by the lifting platform and the information in the chip is displayed on the screen when the tag is detected by the reader. From the results, it can be seen that the better matching between the chip and the antenna leads to the larger reading range and the tag with 0.3 mg cm-2 areal density possesses the best reading property among the samples. As the HF RFID system is designed for short distance communications, reading ranges of the tags are all in centimeter scale. The significant improvement in reading range is about 2 cm over the commercial etched Al tag and this demonstrates the feasibility of our approach for adjusting device properties and this may be enlightening for fabrication of flexible electronic applications with optimized performance. CONCLUSIONS In summary, we have demonstrated a promising and rapid LP process using a common LP machine for fabrication of multilayer paper-based circuits. The fabricating process of the LP method is highly efficient, mask-free and does not require wetting of the paper. This makes it more competitive in manufacturing paper-based circuits compared to liquid printing processes, in which the solvent may cause distortion of the paper substrate and lower the printing resolution. Furthermore, through a secondary printing process, multilayer structured circuits are obtained, which is of quite significance for planar loop circuit applications where over-layered conductive bridges are required. Ag-NWs were used to form conducting networks for their excellent electrical properties. By varying the Ag-NW content and the laminating temperature, the performance of the printed circuit can be easily adjusted. This offers a great opportunity for rapid


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prototyping of customized products with designed properties. And a successful application of this LP method to fabrication of HF RFID tags with optimized reading range has been demonstrated. The rapid LP method proposed here to fabricate multilayer circuits will provide a promising avenue for highly integrated paper-based circuits with optimized performance. METHODS Synthesis of silver nanowires: For the synthesis of Ag-NWs, first of all, 1 × 10−5 mol of FeCl3•6H2O (Beijing Chemical works, China) and 1.4 × 10−2 mol of PVP (Mw≈58,000, Alfa Aesar, USA) were added to 100 ml ethylene glycol (EG, Sinopharm Chemical Reagent Co.,Ltd, China) to form the additive solution. Secondary, 1.0 × 10−2 mol AgNO3 (Beijing Chemical works, China) was dissolved in another 100 ml EG to form the basic solution. The additive solution was then added to the basic solution drop wisely at the speed of about 5 ml/min under vigorous stirring. Afterwards, the mixture was heated at 160 °C for 3 h in an autoclave for the growth of Ag-NWs. Finally, Ag-NWs were obtained by rinsing with a large amount of acetone. The synthesized Ag-NWs have an average length of ~20 µm and an average diameter of ~100 nm. Laser printing circuit fabrication process: The patterns of circuits were designed using a software of CorelDraw 9. Laser printing was conducted with a common color laser printer (CLP680ND, Samsung, Korea). For the hot laminating process, Ag-NWs were in advance coated on the PI film by the wire bar coating process. In the process, Ag-NWs were firstly dispersed in ethanol to form coating ink. Then, the Ag-NW ink was coated on a polyimide (PI) film by using a 20 µm wire bar coater. Finally, the coated wet film was completely dried in air to form Ag-NW coating on the PI film. The thickness of all wet coatings was fixed at 20 µm and the areal density of the Ag-NWs was adjusted by controlling the concentration of the coating ink. The laminating


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process was conducted on a laminating machine (V350, Rongda, China) with temperature adjustable rollers. Characterizations and tests: SEM images for the Ag-NW networks, surface and cross section of the printed circuits were taken by using Hitachi-S 4800 electron microscope (Japan) with the 10 kV electron source. Optical microscopy images of the printed circuits were taken by Olympus STM6 Optical Microscope (Japan). Sheet resistances of circuits was measured with Keithley SourceMeter 2400 (USA) using the standard four-probe method. The complex impedance of the chip and antennas were tested by an impedance analyzer (ALPHA-N, Novocontrol, Germany). The reading range of the HF RFID tag was tested by using an ISO 14443A type RFID reader and the corresponding software. ASSOCIATED CONTENT Supporting Information. Digital photographs of the pristine polyimide (PI) film, Ag-NW coated PI film and the Ag-NW coated PI film after hot laminating process. Resistance variations of the printed circuits as a function of bending circle number and relative humidity level. Optical microscopy images of the connections between the top circuit and two terminals of the bottom antenna circuit showing the Ag-NW droppings at the boundary points. This material is available free of charge via the Internet at http://pubs.acs.org. AUTHOR INFORMATION Corresponding Author *E-mail: [email protected] (HM. Xiao) *E-mail: [email protected]; [email protected] (SY. Fu)


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Notes The authors declare no competing financial interest. ACKNOWLEDGMENT This work is supported by National Natural Science Foundation of China (No. 51503213, 51373187, 51573200, 11372312 and 11572321).

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