Semiconductor

Jul 23, 2018 - Two-Dimensional Materials Inserted at the Metal/Semiconductor Interface: Attractive Candidates for Semiconductor Device Contacts. Min-H...
1 downloads 0 Views 1MB Size
Subscriber access provided by UNIV OF DURHAM

Communication

Two-dimensional Materials Inserted at the Metal/Semiconductor Interface: Attractive Candidates for Semiconductor Device Contacts Min-Hyun Lee, Yeonchoo Cho, Kyung-Eun Byun, Keun Wook Shin, Seunggeol Nam, Changhyun Kim, Haeryong Kim, Sang A Han, Sang-Woo Kim, Hyeon-Jin Shin, and Seongjun Park Nano Lett., Just Accepted Manuscript • DOI: 10.1021/acs.nanolett.8b01509 • Publication Date (Web): 23 Jul 2018 Downloaded from http://pubs.acs.org on July 24, 2018

Just Accepted “Just Accepted” manuscripts have been peer-reviewed and accepted for publication. They are posted online prior to technical editing, formatting for publication and author proofing. The American Chemical Society provides “Just Accepted” as a service to the research community to expedite the dissemination of scientific material as soon as possible after acceptance. “Just Accepted” manuscripts appear in full in PDF format accompanied by an HTML abstract. “Just Accepted” manuscripts have been fully peer reviewed, but should not be considered the official version of record. They are citable by the Digital Object Identifier (DOI®). “Just Accepted” is an optional service offered to authors. Therefore, the “Just Accepted” Web site may not include all articles that will be published in the journal. After a manuscript is technically edited and formatted, it will be removed from the “Just Accepted” Web site and published as an ASAP article. Note that technical editing may introduce minor changes to the manuscript text and/or graphics which could affect content, and all legal disclaimers and ethical guidelines that apply to the journal pertain. ACS cannot be held responsible for errors or consequences arising from the use of information contained in these “Just Accepted” manuscripts.

is published by the American Chemical Society. 1155 Sixteenth Street N.W., Washington, DC 20036 Published by American Chemical Society. Copyright © American Chemical Society. However, no copyright claim is made to original U.S. Government works, or works produced by employees of any Commonwealth realm Crown government in the course of their duties.

Page 1 of 23 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

Nano Letters

Two-dimensional Materials Inserted at the Metal/Semiconductor Interface: Attractive Candidates for Semiconductor Device Contacts Min-Hyun Lee†, Yeonchoo Cho†, Kyung-Eun Byun†, Keun Wook Shin†, Seong-Geol Nam†, Changhyun Kim†, Haeryong Kim†, Sang-A Han‡, Sang-Woo Kim‡, Hyeon-Jin Shin†*, Seongjun Park† †



Samsung Advanced Institute of Technology, Suwon 443-803, Republic of Korea School of Advanced Materials Science and Engineering. Sungkyunkwan University (SKKU),

2066 Seobu-ro, Jangan-gu, Suwon, Gyeonggi-do, 440-746, Republic of Korea

KEYWORDS. 2D material-inserted contact, work function modulation, pinning effect, specific contact resistivity, graphene, hexagonal boron nitride

ACS Paragon Plus Environment

1

Nano Letters 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

Page 2 of 23

ABSTRACT. Metal–semiconductor junctions are indispensable in semiconductor devices, but have recently become a major limiting factor precluding device performance improvement. Here, we report the modification of a metal/n-Si Schottky contact barrier by the introduction of twodimensional (2D) materials of either graphene or hexagonal boron nitride (h-BN) at the interface. We realized the lowest specific contact resistivities (ρc) of 3.30 nΩ·cm2 (lightly doped n-Si, ~1015/cm3) and 1.47 nΩ·cm2 (heavily doped n-Si, ~1021/cm3) via 2D material insertion, approaching the theoretical limit of 1.3 nΩ·cm2. We demonstrated the role of the 2D materials at the interface in achieving a low ρc value by the following mechanisms: (a) 2D materials effectively form dipoles at the metal–2D material (M/2D) interface, thereby reducing the metal work function and changing the pinning point; and (b) the fully metalized M/2D system shifts the pinning point toward the Si conduction band, thus decreasing the Schottky barrier. As a result, the fully metalized M/2D system using atomically thin and well-defined 2D materials shows a significantly reduced ρc. The proposed 2D material insertion technique can be used to obtain extremely low contact resistivities in metal/n-Si systems, and will help to achieve major performance improvements in semiconductor technologies.

ACS Paragon Plus Environment

2

Page 3 of 23 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

Nano Letters

The downscaling of complementary metal–oxide–semiconductor (CMOS) devices is necessary to achieve optimal packing densities and device performances. With much research effort and the development of various strategies, such as high-k/metal gates and fin-type fieldeffect transistor (FinFET) structures,1 current CMOS technology utilizes channel lengths of 10 nm and allows the manufacture of 4.5-GHz processor chips2 and 512-GB NAND memory chips.3 However, progress in downscaling CMOS technology has recently slowed, as the technology faces critical challenges.4 One of the major challenges in the further downscaling of CMOS chips is the metal–semiconductor interfacial contact resistance, which deteriorates the device performance by inducing high operating voltages, high power dissipation, and low device operating speed.5,6 Ultimately, according to the International Technology Roadmap for Semiconductors (ITRS), sub-nΩ·cm2 specific contact resistivities (ρc) is required for sub-10 nm nodes.5 The ρc between a metal and Si can be determined by various charge-carrier transport mechanisms, which are critically influenced by the barrier width and height. Regarding the barrier width, the depletion thickness can be controlled by increasing the dopant concentration in the semiconductor,7 thereby reducing the ρc. However, further reduction of the ρc is limited by intrinsic doping limits, difficulties in finely controlling the dopant profile, and high leakage currents. As for the barrier height, the energy difference between the work function of the metal and the electron affinity of Si in the contact, known as the Schottky barrier height (SBH), is the main cause of high ρc values;8 the SBH can be modulated by matching the metal work function to the electron affinity of the Si. However, experimental evidence over the years has demonstrated that, regardless of the metal work function, the SBH tends toward a constant value because of Fermi-level pinning.8–11 In particular, pinning points near the valence bands of the

ACS Paragon Plus Environment

3

Nano Letters 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

Page 4 of 23

most commonly used semiconductors such as Si9, Ge10, and III–V semicondutors11 impede the achievement of low ρc in n-type semiconductors. This pinning effect causes a serious bottleneck in lowering the ρc of CMOS devices. To modulate the SBH, a thin insulator film such as SiN, TiO2, or ZnO can be inserted at the interface between a metal and Si.12–14 The inserted insulator alleviates Fermi-level pinning; thus, a low ρc can be achieved in a metal–insulator–semiconductor (MIS) structure by tuning the SBH between the low-work-function metal and n-type Si. However, the insulating barrier decreases the tunneling current through the barrier or the thermionic-field emission current over the barrier, thereby impeding reduction of the contact resistance. Furthermore, the optimized insulator thickness of less than 1 nm is technically challenging to achieve because of the native oxide of Si and the roughness caused by the nucleation–growth mode of film growth.15 In addition, it is difficult to maintain the interface and composition of the ultrathin insulator because of the thermal budget in the standard manufacturing of integrated circuits.16 As another approach, the formation of various silicides between the metal and Si interface has been studied. However, the silicide applied to the process has a relatively high barrier of ~0.5 eV.8,17 Current Si technologies use combined technologies with both highly doped semiconductors and silicides; no winning solution yet exists, and technological limitations remain in overcoming the contact resistance issue. Meanwhile, two-dimensional (2D) materials such as graphene and hexagonal boron nitride (hBN) have emerged as good candidates for interfacial layers because they have crystalline structures, single-atom thickness (~0.34 nm), and high thermal stability (>800 °C).18,19 The interfacial behaviors of binary contacts such as metal/2D material or semiconductor/2D material structures have been studied in different electric and optical devices.20–22 However, most

ACS Paragon Plus Environment

4

Page 5 of 23 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

Nano Letters

experiments on binary contacts have focused on specific phenomena, such as the modulation of the work function20 or the de-pinning effect.21,22 Further, ternary contact interfaces such as metal/2D material/semiconductor structures have been studied infrequently with controversial results.23–27 No systematic investigations on the ρc of metal/2D material/Si (M/2D/Si) systems have yet been performed regarding the integration process and the pinning effects based on various metals. In this study, we suggest a method to reduce the ρc of a metal–semiconductor junction by the insertion of the 2D materials of graphene and h-BN. We systematically analyze the behavior of the 2D materials at the metal/Si interface and investigate the major factors affecting ρc, i.e., the work function, SBH, and pinning effect in the M/2D/Si structures. The contact performance of the M/2D/Si structures is demonstrated using a nanoscale contact device with a contact size of 60 nm–100 µm over a wide range of doping concentrations (n-type, 1015–1021/cm3) using a CMOScompatible process at the wafer scale. Finally, we achieve ρc values of 3.30 and 1.47 nΩ·cm2 with lightly doped n-Si (~1015/cm3) and heavily doped n-Si (~1021/cm3), respectively; these approach the theoretical limit predicted for ρc. Only mono-layer 2D materials decrease the SBH by effectively changing the work function of the metal and the pinning point of Si by forming dipoles at the M/2D interface. This method is a suitable approach for achieving a low ρc, and can potentially lead to a ρc of sub-nΩ·cm2. Graphene and h-BN, which can be controllably grown as mono-layer with the thickness of 0.34 nm, were chosen as semi-metallic and insulating insertion materials, respectively. The devices for contact analysis were fabricated on a 6” n-type Si wafer (Figure 1a) based on the transverse line method (TLM)28 with 0.5–10 µm separation. Three-point measurements29 were performed on contact areas of 400 nm2–100 µm2 with few-micrometer channel lengths to extract

ACS Paragon Plus Environment

5

Nano Letters 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

Page 6 of 23

ρc over multiple scales (Figure 1b). In particular, three-point measurements were used as a direct method for extracting low ρc at the level of ~1–10 nΩ·cm2 in field-effect transistor (FET) devices using the relationship:  =  −  ⁄ 

(1)

where A is the area of the contact, I0 is the applied current, and V0 and Vm are the measured voltages at the current source electrode and voltage measurement electrode, respectively. The fabrication process and analysis method are described in detail in Supporting Information 1, Figure S1 and S2. Briefly, M/2D/Si contacts were fabricated by the dry transfer of the 2D materials onto n-type Si wafers. After that, metal was evaporated onto the 2D material, and the TLM structure was fabricated by conventional e-beam lithography. The 2D materials are highly compatible with conventional CMOS integration processes, such as lithography and reactive ion etching (RIE); the devices were successfully fabricated on 6” wafers, as shown in Figure 1a. A clean M/Si interface is necessary to accurately evaluate the electrical properties of the contact. In particular, native oxides are easily formed on the Si surface during the 2D transfer and device fabrication, which can cause many changes in characteristics.30 In the presence of native oxides, a low SBH and high ρc are observed, as shown in Supporting Information 2 and Figure S3. Figure 1c shows the clean interfaces of Ti/Si and Ti/graphene or h-BN/Si, obtained by high-resolution transmission electron microscopy (HR-TEM). The ρc of these interfacially clean structures were characterized on Si with 1018/cm3 doping concentration (Figure 1d). Highly processable metals widely used in CMOS devices were selected. The ρc of the M/2D/Si structure is decreased dramatically compared to that of M/Si without the inserted 2D material. Regardless of the type of metal, the ρc of M/graphene/Si is decreased by 3–4 orders of magnitude, and that

ACS Paragon Plus Environment

6

Page 7 of 23 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

Nano Letters

of M/h-BN/Si is decreased by 1–3 orders compared to that of M/Si. The lowest ρc value in M/2D/Si is achieved with Ti metal and graphene and/or h-BN. The ρc of junctions obtained by conventional techniques such as silicide,17 MIS12–14, and the 2D insertion technique are compared according to Si doping concentrations ranging from 1018/cm3 to 1021/cm3, as shown in Figure 1e. For the junction obtained by the silicide technique, ρc changes exponentially as a function of the doping concentration. The ρc for the junction obtained by the MIS technique is less affected by the doping, and the ρc difference for equivalent doping is determined by the type and thickness of the insulating material. In both cases, the ρc in the 1020/cm3 region is limited at ~2 nΩ·cm2. However, both graphene and h-BN materials in structures fabricated by the 2D insertion technique induce low ρc values in the M/2D/Si structures of ~1.4 to ~7.0 nΩ·cm2 at all Si doping concentrations from 1021/cm3 to 1018/cm3. In particular, the ρc of the 2D materialinserted structure at a low doping level of 1018/cm3 is 1000 times lower than those of the silicide and MIS structures. This indicates that the lowering of ρc by 2D material insertion is observed more clearly at lower doping concentrations compared to that observed for the junctions fabricated by conventional technology. The improved ρc at low Si doping concentrations in the M/2D/Si structure can be applied to next-generation FETs such as junction-less FETs and tunnel FETs.31–33 Furthermore, the ρc of M/2D/Si at the Si doping level of 1020/cm3 reached the lowest value of 1.4 nΩ·cm2, approaching the theoretical limit of 1.3 nΩ·cm2 at Si-doping of 5 × 1020/cm3 predicted for ρc by atomistic modeling.34 This result suggests that the M/2D/Si contact can be effectively used in CMOS devices requiring high doping in their source/drain regions. To understand the role of 2D materials at the metal/Si interface in achieving a low ρc value, we conducted a systematic analysis of the major factors affecting ρc, i.e., the work function, SBH, and pinning effect in the M/2D/Si structures. First, we investigated the modulation of the work

ACS Paragon Plus Environment

7

Nano Letters 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

Page 8 of 23

function of the M/2D structures with various metals. Figure 2a shows the work function computed through ab initio simulations as a function of the bonding distance between Ti and the 2D materials (graphene and h-BN).35--37 As the distance between the 2D materials and Ti decreases, the work function of M/2D decreases substantially. The optimal distance between the 2D material and metal is determined by the highest adsorption energy of the system, as represented by the arrow in Figure 2a. In addition, the work function of the M/2D system is reduced by the transfer of electrons from the 2D material to the metal. The number of electrons transferred and the variation in the work function depend on the adsorption distance between the 2D material and metal. The optimal distance is less than the sum of the van der Waals radii of the 2D materials and the metal, and the 2D material is fully metalized. This result implies that the M/2D system acts as a new single material, rather than as a structure with two independent layers. Based on this simulation, the work functions of the M/2D system are predicted (Figure 2b). The work functions of the M/2D systems are lower by 0.3–1.5 eV than those of the metals themselves. The work functions of Ti and Ni, which bond strongly with the 2D materials, show particularly dramatic reductions by 0.9–1.5 eV. The effect of the lowering of the work function by h-BN is greater for most of the metals than that by graphene, owing to the higher electron transfer. The work functions of the M/2D systems were experimentally determined by ultraviolet photoelectron spectroscopy (UPS) analysis (Figure 2c, Supporting Information 3). The work functions were extracted by the difference between the energy of the UV photons (21.22 eV for He I radiation) and the binding energy of the secondary edge measured by UPS analysis. Figure 2d shows the experimental work functions of the M/2D systems. Although the variations in the experimental work functions are relatively smaller than those predicted by the simulations, the

ACS Paragon Plus Environment

8

Page 9 of 23 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

Nano Letters

results otherwise show good agreement. Furthermore, in Al, Ti, and Cr metals with low work functions after 2D interaction, low ρc is expected after contact with n-type Si by forming low SBHs below ~0.2 eV, if the 2D inserted contact is in a fully de-pinned state. Figure 3a shows the SBH of M/Si and M/2D/Si systems. The SBH was extracted by investigating the temperature dependence current of the M/Si contact in the reverse-bias saturation regime (Supporting Information 4, Figure S4). The M/Si contacts of most of the metals have high SBHs of 0.4 eV or more; however, the M/h-BN/Si contact has the relatively low SBH of 0.3 eV. In particular, the M/graphene/Si contact has a low SBH below 0.2 eV with most metals, which is consistent with the low ρc of M/graphene/Si (Figure 1a). This means that the SBH reduction between M/2D and Si arises from the decreased work function of M/2D, which in turn lowers the ρc of the M/2D/Si junction. We also examined another important factor of the ρc of the M/Si contact, the pinning effect. Simply, we can guess that the insertion of an ultra-thin 2D material between the metal and Si creates a de-pinning state at the Si interface, similar to insulator insertion behaviors in MIS structures. The pinning factor, S, extracted from the slope of the SBH vs. metal work function, has a value between 1 (representing the Schottky limit) for perfect de-pinning and 0 (representing the Bardeen limit) for full pinning. Figure 3b shows the measured SBH of M/Si or M/2D/Si as a function of the work function of the metal or the M/2D system. The M/Si systems show high pinning states with the pinning factor of 0.32, and the SBH of M/Si does not change significantly with changing metal work functions. In contrast, the M/2D/Si systems with h-BN and graphene have almost equal SBHs, irrespective of the work function of M/2D. Contrary to our expectations, the pinning factor of M/2D/Si is almost 0, that is, full pinning occurs, which is quite different from the de-pinning results of binary 2D/Si contacts.22 This also implies that the

ACS Paragon Plus Environment

9

Nano Letters 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

Page 10 of 23

low work function of M/2D does not directly lower the ρc. Fully metalized graphene has a density of states (DOS) similar to that of a metal, unlike intrinsic graphene (Supporting information 5, Figure S5a). We discovered that the fully metalized 2D materials on metal lose the inherent de-pinning effect of 2D materials in the ternary M/2D/Si contacts, because the contact acts as a new single material. However, despite the strong pinning of the interface between M/2D and Si, the pinning point is near the conduction band of Si. Therefore, the SBH at the interface between M/2D and Si is reduced. The pinning points of the M/graphene/Si and M/h-BN/Si systems are respectively 4.15 eV and 4.27 eV, lower than the original Si pinning point of 4.5 eV. The change in the SBH due to the inserted 2D material as a function of the work function difference agrees with the equation S2 in Supporting Information 6. The SBH appears to be constant with varying metal work functions, as shown in Figure 3b. In other words, although the contact between the M/2D and Si surface is pinned at a new position by its metalized state, the ρc is decreased by the decrease in the SBH. The pinning effect is strongly related to the surface state of Si. In general, the state of the Si surface is known to be unstable owing to many defects, dangling bonds, rearrangement, and so on. Furthermore, the surface passivation of Si with H is also unstable, maintained for only a few minutes in general conditions or during processing. However, it is important to understand the relationship between pinning and the surface properties. To confirm the surface state effects on pinning, we calculated the pinning effect of two different Si surfaces, H-terminated Si and Si without H-termination. As shown in Figure 3c, when Ti/graphene is in contact with H-terminated Si, the pinning factor is computed as ~0.37. On the contrary, full pinning (S = 0) is predicted when Ti/graphene makes contact with Si without H-termination. The behavior of Ti/h-BN on the two different Si surfaces also shows similar results (Supporting Information 7, Figure S7). To

ACS Paragon Plus Environment

10

Page 11 of 23 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

Nano Letters

control the pinning effect perfectly, research on stable surface control remains necessary in Si technology. Figure 4 shows the atomic structure and the expected band structure when the number of layers of graphene is changed from one to three. Figure 4a shows the change in the SBH and ρc according to the number of layers of graphene (Supporting Information 8, Figure S8). When mono-layer graphene is inserted into M/Si, SBH and ρc decrease significantly relative to those of the original M/Si. For mono-layer graphene, M/graphene in contact with Si is similar to a unified material because it is fully metalized. However, bi-layer graphene is hardly metalized, and trilayer graphene is expected to exist as a pristine graphene layer affected little by the metal. This property can be confirmed by the change in the DOS of the metal/multi-layer graphene (Supporting Information 5, Figure S5b). For this reason, the work function of M/graphene is increased by increasing the number of graphene layers, which increases the SBH and ρc of the M/graphene/Si system, as shown in Figure 4b. Moreover, for bi-layer graphene, ρc is slightly higher than that for mono-layer graphene, because of the limited current flow by the increased electron tunneling length. As a result, a uniform and mono-layer 2D material of 0.34 nm in thickness can significantly reduce the ρc to a level equivalent to the ideal value. Figure 5a summarizes the relationship between ρc and SBH in the M/Si contact, according to the type of 2D material. For M/Si and M/2D/Si, low ρc is observed at low SBH; these show a nearly exponential relationship. Figure 5b shows the expected band structures of the M/Si, M/graphene/Si, and M/h-BN/Si contacts. Carrier transport in the contact between the metal and semiconductor is simply classified as thermionic emission, thermionic field emission, or tunneling. The currents of thermionic emission and thermionic field emission are strongly dependent on the SBH, and the tunneling current is significantly influenced by the thickness of

ACS Paragon Plus Environment

11

Nano Letters 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

Page 12 of 23

2D materials. Therefore, the M/2D/Si system with a lower SBH can increase the current level to exceed that in M/Si. In addition, despite the additional layer inserted in the contact system, the atomically thin and well-defined 2D materials do not affect the reduction of the current level, unlike MIS systems. Therefore, low ρc values are achieved.

In conclusion, we achieved the lowest ρc of 1.47 nΩ·cm2 using mono-layer graphene insertion at the Ti/n-Si interface; this value approaches the theoretical ρc limit of 1.3 nΩ·cm2. To understand the role of the 2D materials of graphene and h-BN at the interface in achieving a low ρc value, we systematically confirmed that 2D materials could lower the work function of the metal by forming dipoles at the M/2D interface. However, the low work function of M/2D did not directly lower the SBH; instead, the pinning points shift because of the dipole effect. The modified pinning points of the M/graphene/Si and M/h-BN/Si systems are determined as 4.15 eV and 4.27 eV, respectively, which are much lower than the original Si pinning point of 4.5 eV. As a result, the SBH at the interface between M/2D and Si can be reduced because the pinning points are near the conduction band of Si; thereby, the lowest ρc could be achieved. The proposed 2D material insertion technique can be used to obtain sub-nΩ·cm2 contacts for metal/n-Si, thus dramatically improving CMOS performance.

ASSOCIATED CONTENT Supporting Information. The Supporting Information is available free of charge on the ACS Publications website at DOI:

ACS Paragon Plus Environment

12

Page 13 of 23 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

Nano Letters

Experimental details of fabrication. Measurement methods for specific contact resistivity, work function, and Schottky barrier height. Analysis of multi-layered graphene by transfer and effect of few-nanometer-thick native oxide in M/Si contact (PDF) AUTHOR INFORMATION Corresponding Author *E-mail: [email protected] Author Contributions The manuscript was written through contributions of all authors. All authors have given approval to the final version of the manuscript. ACKNOWLEDGMENT The authors are grateful to colleagues in the Graphene group, Nano Fabrication group, and Analytical Science group at the Samsung Advanced Institute of Technology.

ACS Paragon Plus Environment

13

Nano Letters 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

Page 14 of 23

REFERENCES (1)

Taur, Y.; Buchanan, D. A.; Chen, W.; Frank, D. J.; Ismail, K. E.; Lo, S.-H.; Sai-Halasz,

G. A.; Viswanathan, R. G.; Wann, H. J. C.; Wind, S. J.; Wong, H.-S. Proc. IEEE 1997, 85, 486– 504. (2)

Intel Processors Overview.

http://www.intel.com/content/www/us/en/products/processors.html (accessed Apr 19, 2017). (3)

Samsung Semiconductor Global. http://www.samsung.com/semiconductor/about-

us/news/ (accessed Apr 19, 2017). (4)

Sudha, D.; Santhirani, C. H.; Ijjada, S. R.; Priyadarsinee, S. 2016 3rd International

Conference on Computing for Sustainable Global Development (INDIACom) 16–18 March 2016, New Delhi, India, 1183–1187. (5)

2015 International Technology roadmap for Semiconductors (ITRS).

http://www.itrs2.net/ (accessed Apr 19, 2017). (6)

Campbell, J. P.; Cheung, K. P.; Suehle, J. S.; Oates, A. IEEE Electron Device Lett. 2011,

32, 1047–1049. (7)

Yu, A. Y. C. Solid-State Electron. 1970, 13, 239–247.

(8)

Sze, S. M.; Ng, K. K. Physics of Semiconductor Devices, 3rd Edition; John Wiley &

Sons, New York, 2007. (9)

Werner, J. H.; Güttler, H. H. J. Appl. Phys. 1993, 73, 1315–1319.

ACS Paragon Plus Environment

14

Page 15 of 23 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

Nano Letters

(10) Toriumi, A.; Tabata, T.; Hyun Lee, C.; Nishimura, T.; Kita, K.; Nagashio, K. Microelectron. Eng. 2009, 86, 1571–1576. (11) Eastman, D. E.; Freeouf, J. L. Phys. Rev. Lett. 1974, 33, 1601–1605. (12) Paramahans, P.; Gupta, S.; Mishra, R. K.; Agarwal, N.; Nainani, A.; Huang, Y.; Abraham, M. C.; Kapadia, S.; Ganguly, U.; Lodha, S. 2012 Symposium on VLSI Technology (VLSIT) 2012, Honolulu, HI, USA, 83–84. (13) Hu, J.; Nainani, A.; Sun, Y.; Saraswat, K. C.; Wong, H.-S. P. Appl. Phys. Lett. 2011, 99, 252104. (14) Agrawal, A.; Lin, J.; Zheng, B.; Sharma, S.; Chopra, S.; Wang, K.; Gelatos, A.; Mohney, S.; Datta, S. 2013 Symposium on VLSI Technology 11–13 June 2013, Kyoto, Japan, T200–T201. (15) Alevli, M.; Ozgit, C.; Donmez, I.; Biyikli, N. Phys. Status Solidi A 2009, 266–271. (16) Yu, H.; Schaekers, M.; Schram, T.; Demuynck; S.; Horiguchi, N.; Barla, K.; Collaert, N.; Thean A. V.-Y.; Meyer. K. D. IEEE Trans. Electron Devices 2016, 63, 2671–2676 (17) Stavitski, N.; Dal, M. J. H. van; Lauwers, A.; Vrancken, C.; Kovalgin, A. Y.; Wolters, R. A. M. IEEE Electron Device Lett. 2008, 29, 378–381. (18) Nan, H. Y.; Ni, Z. H.; Wang, J.; Zafar, Z.; Shi, Z. X.; Wang, Y. Y. J. Raman Spectrosc. 2013, 44, 1018–1021. (19) Li, L. H.; Cervenka, J.; Watanabe, K.; Taniguchi, T.; Chen, Y. ACS Nano 2014, 8, 1457– 1462.

ACS Paragon Plus Environment

15

Nano Letters 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

Page 16 of 23

(20) Khomyakov, P. A.; Giovannetti, G.; Rusu, P. C.; Brocks, G.; van den Brink, J.; Kelly, P. J. Phys. Rev. B 2009, 79, 195425. (21) Bokdam, M.; Brocks, G.; Katsnelson, M. I.; Kelly, P. J. Phys. Rev. B 2014, 90, 085415. (22) Xu, Y.; He, K. T.; Schmucker, S. W.; Guo, Z.; Koepke, J. C.; Wood, J. D.; Lyding, J. W.; Aluru, N. R. Nano Lett. 2011, 11, 2735–2742. (23) Byun, K.-E.; Chung, H.-J.; Lee, J.; Yang, H.; Song, H.; Heo, J.; Seo, D. H.; Park, S.; Hwang, S. W.; Yoo, I. K.; Kim. K. Nano Lett. 2013, 13, 4001–4005. (24) Yoon, H. H.; Jung, S.; Choi, G.; Kim, J.; Jeon, Y.; Kim, Y. S.; Jeong, H. Y.; Kim, K.; Kwon, S.-Y.; Park, K. Nano Lett. 2017, 17, 44–49. (25) Erve, O. M. J. van ’t; Friedman, A. L.; Cobas, E.; Li, C. H.; Robinson, J. T.; Jonker, B. T. Nat. Nanotechnol. 2012, 7, 737–742. (26) Leong, W. S.; Luo, X.; Li, Y.; Khoo, K. H.; Quek, S. Y.; Thong, J. T. L. ACS Nano 2015, 9, 869–877. (27) Liu, Y.; Guo, J.; Wu, Y.; Zhu, E.; Weiss, N. O.; He, Q.; Wu, H.; Cheng, H.-C.; Xu, Y.; Shakir, I.; Huang, Y.; Duan, X. Nano Lett. 2016, 16, 6337–6342. (28) Berger, H. H. Solid-State Electron. 1972, 15, 145–158. (29) Proctor, S. J.; Linholm, L. W. IEEE Electron Device Lett. 1982, 3, 294–296. (30) Chen, C.-C.; Aykol, M.; Chang, C.-C.; Levi, A. F. J.; Cronin, S. B. Nano Lett. 2011, 11, 1863–1867.

ACS Paragon Plus Environment

16

Page 17 of 23 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

Nano Letters

(31) Khatami, Y.; Banerjee, K. IEEE Trans. Electron Devices 2009, 56, 2752–2761. (32) Kumar, M. J.; Janardhanan, S. IEEE Trans. Electron Devices 2013, 60, 3285–3290. (33) Lee, C.-W.; Afzalian, A.; Akhavan, N. D.; Yan, R.; Ferain, I.; Colinge, J.-P. Appl. Phys. Lett. 2009, 94, 053511. (34) Shine, G.; Weber, C. E.; Saraswat, K. C. 2016 IEEE Symposium on VLSI Technology 14– 16 June 2016, Honolulu, HI, USA, 1–2. (35) Kresse, G.; Furthmüller, J. Phys. Rev. B 1996, 54, 11169–11186. (36) Perdew, J. P.; Burke, K.; Ernzerhof, M. Phys. Rev. Lett. 1996, 77, 3865–3868. (37) Grimme, S.; Antony, J.; Ehrlich, S.; Krieg, H. J. Chem. Phys. 2010, 132, 154104.

ACS Paragon Plus Environment

17

Nano Letters 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

Page 18 of 23

Figure 1. Device structures for the contact measurement and specific contact resistivity with various metals and Si doping concentrations. (a) Device series for contact measurement on a 6” wafer. (b) A transverse line method (TLM) device with 0.5–10 µm spacing (upper) and a nanoscale contact device with the three-point method (lower). (c) High-resolution transmission electron microscopy (HR-TEM) images of metal (M)/Si (top), M/graphene/Si (middle), and M/hBN/Si (bottom) contacts. (d) Specific contact resistivity of M/Si (black), M/h-BN/Si (blue), and M/graphene/Si (red) junctions determined from electrical measurements in 1018/cm3 n-type Si with various metals (circles with boxes indicate average values with standard deviations; caps show maximum and minimum values). (e) Comparison of the M/2D/Si specific contact resistivity with silicide17 and MIS12–14 contact structures, as a function of the doping concentration of n-type Si.

ACS Paragon Plus Environment

18

Page 19 of 23 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

Nano Letters

Figure 2. (a) Work functions (WF) of M/2D structures calculated via ab initio simulations as a function of the distance between the metal and 2D material. Arrows indicate the optimal distance of M/2D. (b) Work functions of M/2D structures with various metals calculated by ab initio simulations. (c) UPS spectra of M/2D structures. The work function was determined by the difference between the energy of the UV photons (21.22 eV) and the energy of the secondary edge. (d) Work functions of M/2D structures measured using UPS.

ACS Paragon Plus Environment

19

Nano Letters 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

Page 20 of 23

Figure 3. Schottky barrier height (SBH) of M/2D/Si. (a) SBH of M/Si (black), M/h-BN/Si (blue), and M/graphene/Si (red) junctions with various metals. (b) SBH of M/Si without any 2D material (black squares), with h-BN (blue triangles), and with graphene (red circles) as a function of the work function of the metal or M/2D. (c) Calculated SBH of an M/graphene/Si structure with/without H termination of the Si surface and the corresponding atomic models (inset).

ACS Paragon Plus Environment

20

Page 21 of 23 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

Nano Letters

Figure 4. (a) Schottky barrier height and relative specific contact resistivity of Ti/graphene/Si structure as a function of the number of graphene layers. (b) Atomic structures of grapheneinserted M/Si contact with different numbers of layers and corresponding band diagrams.

ACS Paragon Plus Environment

21

Nano Letters 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

Page 22 of 23

Figure 5. (a) Specific contact resistivity as a function of the Schottky barrier height of M/Si (black squares) and 2D material-inserted M/Si (graphene: red circles, h-BN: blue triangles). (b) Band diagrams for M/Si (top), M/h-BN/Si (middle), and M/graphene/Si (bottom) contacts. Red arrows indicate the thermionic emission and thermionic field emission; green arrows indicate tunneling.

ACS Paragon Plus Environment

22

Page 23 of 23 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

Nano Letters

Table of Contents

ACS Paragon Plus Environment

23