NANO LETTERS
Silicon-Nanowire Transistors with Intruded Nickel-Silicide Contacts
2006 Vol. 6, No. 12 2660-2666
Walter M. Weber,*,†,§ Lutz Geelhaar,† Andrew P. Graham,† Eugen Unger,‡ Georg S. Duesberg,† Maik Liebau,† Werner Pamler,‡ Caroline Che`ze,† Henning Riechert,‡ Paolo Lugli,§ and Franz Kreupl‡ Qimonda Dresden GmbH & Co., Technology Center, D-01099 Dresden, Germany, Qimonda AG, Technology InnoVations, D-81730 Munich, Germany, and Technische UniVersita¨t Mu¨nchen, Institute for Nanoelectronics, D-80333 Munich, Germany Received June 16, 2006; Revised Manuscript Received September 29, 2006
ABSTRACT Schottky barrier field effect transistors based on individual catalytically-grown and undoped Si-nanowires (NW) have been fabricated and characterized with respect to their gate lengths. The gate length was shortened by the axial, self-aligned formation of nickel-silicide source and drain segments along the NW. The transistors with 10−30 nm NW diameters displayed p-type behaviour, sustained current densities of up to 0.5 MA/cm2, and exhibited on/off current ratios of up to 107. The on-currents were limited and kept constant by the Schottky contacts for gate lengths below 1 µm, and decreased exponentially for gate lengths exceeding 1 µm.
Quasi-one-dimensional semiconducting structures have been recently studied as potential candidates for electronic applications. For this reason, carbon nanotubes (CNT) and semiconducting nanowires (NW) have been implemented as the active region of field effect transistor (FET) demonstrators with Schottky barrier (SB) source and drain contacts (SBFET). CNT SBFETs have shown excellent electrical characteristics,1-4 however, the control over the CNTs chirality, and thus the determination of their semiconducting or metallic behavior,5 is still an unsolved obstacle for their practical implementation. Silicon-NWs as the channel material are of particular interest because they could allow the combination of one-dimensional transport and self-assembled processing with the well-known Si technology. Si-NW SBFETs made either of catalytically grown NWs6,7 or lithographically patterned and etched silicon on insulator (SOI) layers8 have been studied previously. Lithographically defined NWs are difficult to fabricate; furthermore, their geometry intolerances and surface roughness created by the top-down processing could affect the carrier transport.9 In contrast, synthesized Si-NWs have a diameter determined by the size of the catalyst particle10 and a surface roughness on the atomic scale. Most of the investigated transistors made of synthesized Si-NWs have dealt with doped Si-NWs only, where scattering with the dopants is expected to reduce their mobilities;11 only a few have studied * Corresponding author. E-mail:
[email protected]. Telephone: (+49)89-234-44503. † Qimonda Dresden GmbH & Co. Technology Center. ‡ Qimonda AG Technology Innovations. § Technische Universita ¨ t Mu¨nchen. 10.1021/nl0613858 CCC: $33.50 Published on Web 11/09/2006
© 2006 American Chemical Society
intrinsic Si-NWs.6,12,13 Overall, there is little known about the transport mechanisms in Si-NW SBFETs. For this reason, it is essential to extensively characterize Si-NW SBFETs as well as to explore their behavior when their channel length is scaled. In this work, SBFETs with catalytically grown, undoped Si-NWs as the channel and nickel-silicide source and drain (S/D) contacts were fabricated and compared systematically for different active region lengths. A simple and self-aligned technique was developed to reduce the physical gate length (Lg) of the SBFETs by a desired value. This novel method is based on the thermally activated axial intrusion of nickel-silicides into the Si-NW from photolithography prepatterned Ni reservoirs located at both ends of the NWs. Thus, this approach only needs one lithographic step for the formation of a complete device. Moreover, it has the enormous benefit of being able to fabricate transistors with significantly shorter gate lengths than those feasible with the resolution of the available photolithography. The subthreshold and output characteristics of Si-NW SBFETs show clear unipolar p-type behavior, high on-current densities, and on/off-current ratios. The on-currents are compared for devices with different Lg and similar NW diameters. While for Lg < 1 µm, transport is ruled by the injection through the Schottky contacts, for Lg > 1 µm, the on-current is limited by the channel and drops exponentially with increasing Lg. Si-NWs were synthesized in a chemical vapor deposition chamber using the vapor liquid solid method.14 A gold layer with a nominal thickness ranging from 0.3 to 1 nm was sputtered as the catalyst on amorphous SiO2 substrates.
Figure 1. Fabrication of Si-NW SBFETs with shortened active region. (a) n++-Si substrate (common back gate) is covered with a 300 nm thick SiO2 gate dielectric. Recessed Co/Ti contacts are patterned by photolithography prior to the dispersion of the Si-NWs on top of the substrate. (b) Conformal and selective electroless deposition of Ni on Co, embedding the Si-NWs as seen in the SEM top view (c). Annealing leads to Ni-silicide segments along the NWs adjacent to the Ni pads, shortening the length of the active region from LG0 to LG′ (d) as shown in the SEM top view (e). The scalebars in (c) and (e) are 200 nm.
Growth was performed at 450 °C using monosilane (SiH4) as the precursor with a partial pressure of 5 Torr, as described in the Supporting Information to this letter. The resulting Si-NWs had lengths of up to 20 µm and diameters ranging from 7 to 40 nm depending on the Au catalyst layer thickness. Transmission electron microscopy images showed that they grow in the 〈112h〉 direction and are single crystalline or occasionally show twin boundaries parallel to the growth direction when their diameter is thicker than 35 nm.15 For the fabrication of SBFETs, highly n-doped Sisubstrates formed the common back gates, which have been covered with a 300 nm thick SiO2 layer that served as a thick gate dielectric. Metal source and drain contact structures were patterned on top with i-line photolithography, electron beam deposition of a metal stack, and a lift-off process. The metal contacts consisted of a 25 nm thick titanium adhesion layer and a 50 nm thick cobalt layer recessed into the oxide. The Si-NWs were randomly dispersed on the structured substrates with preformed metal contacts from an isopropanol suspension (Figure 1a). Further on, the native silicon oxide surrounding the NWs was removed by a hydrofluoric acid dip prior to the deposition of Ni. The Ni grew selectively on the Co pads by an electroless deposition process, as described elsewhere.16,17 Thus, the segments of the Si-NWs lying on the Co pads were encapsulated within a thick Ni Nano Lett., Vol. 6, No. 12, 2006
layer with an approximate thickness of 100 nm (Figure 1b,c). In the final step, the samples were annealed in Ar in a vacuum furnace. The temperature was ramped up from 25 to 470 °C in 10 min18 and maintained at 470 °C for varying durations. Annealing led to the axial diffusion of Ni along the NW and, consequently, to the formation of nickel silicide NW segments adjacent to the Ni pads (Figure 1d,e), as explained below. These metallic segments extend the S/D regions along the NW shortening Lg from LG0 to the pristine Si-NW part LG′ remaining between the silicide segments after annealing. The length of the nickel-silicide NW segments and thus the reduced gate length were set in a simple manner by varying the duration of the annealing step at 470 °C from 1 to 10 min. The final geometry of the FETs active region was measured by scanning electron microscopy (SEM), Leo 1560. Special attention was made to ensure that the devices to be measured had only a single Si-NW bridging the contact pads. The striking advantage of this procedure is that the resulting metallurgical gate lengths LG′ can be much smaller than the available photolithographic resolution used to pattern the metal pads. The previous methods that have been used to characterize Si-NW transistors were laborious, making a methodical gate length comparison a difficult task. These involved electron beam lithography6,7,13 or the superimposition of another NW to work as a shadow mask for the contact metallization.19 The Ni/Si solid-state reaction was investigated by SEM in combination with energy dispersive X-ray spectroscopy (EDX), Vantage Noran Instruments, as well as with transmission electron microscopy (TEM) at 200 kV and electron energy loss spectroscopy (EELS). Figure 2a depicts an SEM image of a Si-NW embedded in Ni after annealing; a high contrast can be seen between two axial NW sections. EDX spectra were taken at two points located 20 nm away from the brightness interface and within the respective NW segments, see points (1) and (2) in Figure 2a. The EDX spectrum in point (1) (Figure 2b) showed that the bright NW segment adjacent to the pad clearly contained Ni, whereas the other contact metals Co and Ti were not found.20 In contrast, the Ni peak corresponding to the spectrum in point (2) (Figure 2c) inside the darker NW section is barely higher than the noise level. The small Ni signal in Figure 2c is attributed to the relatively large electron scattering range inside the sample. These observations show that Ni has diffused along the NW from the pads up to the abrupt interface. The sharpness of the interface should be well below the distance between the brightness interface and point (2), i.e., 20 nm. TEM images of the laterally silicided NWs (Figure 2d-f) indicate that the diffused Ni, detected with EELS elemental mapping in Figure 2e, reacted to create a nickel-silicide (Figure 2f). In fact, the high-resolution TEM image (HRTEM) in Figure 2f shows that the longitudinal NW segments are transformed into a single-crystalline Nisilicide throughout the entire NWs thickness. An amorphous coating of around 1.5 nm thickness wrapped up the Nisilicide NW; it does not consist of elemental Ni21 and most probably is a Si-oxide.22 Also no signs of Ni agglomeration are seen. These facts suggest that the diffusion observed is 2661
Figure 2. Formation of longitudinal Ni-silicide NW segments. (a) Si-NW embedded in Ni after annealing showing a bright segment where the Ni diffused over 530 nm along the NW. The sharp interface is analyzed with EDX, spectra (b) and (c) correspond to points (1) and (2). (d) TEM image of laterally silicided NW, (e) shows the corresponding EELS image for Ni, (f) depicts an HRTEM of this nanowire, showing single crystallinity of the Ni-silicide nanowire. (g) The SEM top view of partially embedded Si-NWs in Ni pads before (g) and after annealing (h), where Ni diffused along the entire length of the NWs. The NW elongation indicates the Ni incorporation into the NW.
Figure 3. Typical electrical characteristics of a Si-NW SBFET. (a) Subthreshold (Isd - Vg) characteristic of a transistor with Lg ) 1 µm, a NW diameter of 25 nm and a 300 nm thick SiO2 gate dielectric. Arrows indicate the Vg sweep direction. Output (Ids - Vds) characteristic of a long b), Lg ) 1.3 µm and 21 nm tSi and short-channel, c) Lg ) 210 nm and 21 nm tSi devices with Vg reduced in 5 V steps from 20 V to -20 V.
a volume effect and not a consequence of surface diffusion. In addition, comparing NWs before and after silicidation (Figure 2 g,h) shows that the silicided NW segments enlarged and broadened up to 30% in order to incorporate the built in Ni. At the annealing temperatures applied here, the NiSi and Ni2Si phases are expected in a bulk reaction.23 The longitudinal Ni diffusion process described here differs from those found in literature to create Ni-silicide NWs because they utilize the radial diffusion of Ni deposited directly onto the surface of either synthesized Si-NWs19 or lithographically defined polycrystalline Si-NWs.24 Lateral diffusion of Ni into thin silicon on insulator layers has been previously reported,25,26 where two-dimensional Ni-silicide regions were formed. The method shown here introduces the one-dimensional case. Transport properties of Si-NWs were measured at ambient conditions with a Keithley 4200 semiconductor characterization system using a current preamplifier (Keithley 4200-PA) at the drain port. Completely silicided single NWs show metallic ohmic behavior. A two-point measurement of a 820 nm long and 55 nm diameter Ni-silicide NW connected in series with the Ni/Co/Ti contacts gives a total resistance of 575 Ω. Because the contributing series resistance of the 2662
contacts is unknown, the resistivity of the Ni-silicide-NW is, at most, 166 µΩ cm. Over 50 transistors consisting of single NWs with different diameters and channel lengths were measured. The typical subthreshold characteristic of a Si-NW SBFET with gate length Lg ) 1 µm and 25 nm NW diameter (tSi) is shown in Figure 3a. The arrows indicate the direction of the gate voltage sweep. The device exhibits clear p-type behavior and shows a high on-current (Ion) of 0.7 µA at 1 V drain-source bias (Vds); moreover the low offcurrent (Ioff) allows a high Ion/Ioff of up to 107. Typical output characteristics of a long (Lg ) 1.3 µm, tSi ) 21 nm) and short transistor (Lg ) 210 nm, tSi ) 21 nm) are plotted in Figure 3b,c respectively. Both characteristics reflect a normally off behavior, as seen for 0 V gate voltage (Vg). The exponential increase of the drain current at low negative Vds, which is more pronounced for the short Lg devices, indicates the presence of Schottky S/D contacts. It is important to point out that the behavior and values seen in Figure 3 are representative of all our devices with similar geometries and do not only indicate single device measurements. The p-type behavior seen in Figure 3a, b, and c can be observed for all of the undoped Si-NW SBFETs. Although Nano Lett., Vol. 6, No. 12, 2006
Table 1. Comparison of State-of-the-Art FETs and SBFETs with Devices Presented Herea this work ref active region Lg [µm] diameter [nm]/ cross-section Ids saturation Js [A/cm2] Ron [Ω] Vds [V] Ion/Ioff contact contact behavior
i-Si NW 0.67 20 yes 0.51 M 625 k -1 107 NiSi SB
Byon et. al 13 i-Si NW
Cui et. al 6 i-Si NW
Lu et. al
Wu et. al
12 i-Si NW
19 p-Si NW
1 20
3 30
Cui et. al 7 p-Si NW
Goldberger et. al 39 p-Si NW
0.8-2 0.5-0.6 10-20 20 × (20-30 nm) no no no yes yes yes 41 k 23 0.1 M 0.81 M 1-5 M 7-16 k 15 M 1.1 G 2.7 M 526 k 250 k 25M -2 -1 -1 -3 -1 -1.25 106 Ti/Au Al/ Au NiSi NiSi Ti/Au Si-source, metal drain SB SB SB SB SB ohmic/SB 20*
70
Koo et. al
Ro¨sner et. al
Ro¨sner et. al
8 p-Si SOI-NW 28 (50 × 60) nm2 yes 12 k 2.9 M -1 107 Ti/Au
33 i-Si longFinFET 1 (20 × 50) nm2 yes 0.4 M 250 k -1.2 106 p++ Si
35 p-Si shortFinFET 0.08 (20 × 45) nm2 yes 3.2 M 42 k -1.2 108 p++ Si
SB
ohmic
ohmic
Xiang et. al
Seidel et. al
36 Ge-Si coreshell 0.19 17
3 SW-CNT
yes 40 M 11 k -1 104 Si/metal silicide ohmic
yes 1.5 G 26 k -0.4 107 Pd
0.018 1*
ohmic
a J and R data extracted from electrical characteristics of single NWs in the on-state. i-Si stands for intrinsic Si, SB for Schottky barrier, and SW-CNT s on for single-walled carbon nanotube. * indicates that this NW diameter is assumed.
an unintentional background doping during growth or processing cannot be ruled out completely, there is no evidence for doping in the Si-NWs used.15 Moreover, the p-type behavior can be explained by the different transmission of electrons and holes through the SBs. This is given by the smaller SB heights for holes than for electrons in combination with the band bending at the SBs. The SB height between n-type bulk Si and Ni-silicide is typically 0.660.75 eV for electrons and 0.39-0.48 eV for holes in p-type Si;11,27 these values are reported to be relatively insensitive to the Ni-silicide phase involved23,27 but can change when the Schottky contact is scaled down.28 Moreover the resulting band bending at the Schottky contacts caused by the applied electric gate field could adjust the carrier transmission through the SBs and determine which type of carriers can pass more easily. This is the case for CNT SBFETs,29-31 where ambipolar behavior (both p- and n-type) is reported for devices with thin gate oxides and unipolar p-type behavior for thick gate oxides. For CNT-SBFETs, the complete modulation is achieved by the gate control over the SBs itself and not by the channel.32 The on-currents in the devices are very high, taking into account the presence of the SBs and that the NWs are intrinsic, very long, and have small diameters. The 1 µm long and 25 nm tSi SBFET in Figure 3a has a current density in the saturation state (Js) of 0.14 MA/cm2 when biased at -1 V. Higher Js are observed in thinner Si-NWs, i.e., a 20 nm tSi and 670 nm Lg transistor gives 0.5 MA/cm2 at -1 V Vds, and an on-resistance down to Ron ) Vds/Ion ) 625 kΩ. Table 1 compares the Js and Ron values of various state-ofthe-art FETs and SBFETs extracted from I-V characteristics reported in literature. This work demonstrates the highest Js and lowest Ron for catalytically grown intrinsic Si-NWs. In the work of Lu et. al12 where Ni-silicide contacts are also used, the current density of such Si-NWs does not saturate and could even reach higher values. The best doped Si-NWs have higher Js values,7,19 however these are within the same order of magnitude as the ones presented here. FinFETs Nano Lett., Vol. 6, No. 12, 2006
exhibit comparable Js values for a similar cross-section and Lg33 and larger Js values for shorter devices.34,35 These FinFETs have ohmic contacts and an increased channel coupling given by their double gate architecture. Higher current densities can be achieved with other materials when the contacts Fermi level is aligned to the valence band, giving ohmic contacts for holes. This is the case for Ge/Si core/ shell NWs36 and for Pd contacted CNTs.3 CNT FETs with Schottky contacts typically have a comparable Ron with our Si-NW SBFETs.37 The high current modulation of 107 observed here would ensure good on- and off-states in logic applications. To our knowledge, this is the highest Ion/Ioff value reported for synthesized Si-nanowires (Table 1). These results present convincing evidence for the quality and sharpness of the Nisilicide/Si interfaces used in our SBFETs. The low Ioff suggest that no Ni atoms diffuse into the channel beyond the contact, which would result in enhanced leakage. These promising values are also reached due to the improved electrostatics at the contact regions in comparison to semiconducting NWs contacted with large two-dimensional metal contacts. The needle-like Ni-silicide S/D-contacts focus the electric gate field at the contact regions and enhance the gate control over the SBFETs, as will be seen in Figure 4b. The hysteresis observed in the subthreshold characteristics (Figure 3a) has been recapitulated previously.38,13 It represents a memory effect that is caused by trapped charges in the oxide layer or at the NWs surface, which can be removed by proper passivation.39 Next, we investigate the transport behavior in Si-NW SBFETs by comparing various transistors with different gate lengths. This is of paramount importance because the scaling behavior of transistors is a key issue in device integration. The most popular method to determine the intrinsic resistance of materials is a four-point measurement. However, in this case, the intrinsic conductance of undoped NWs is well below our measurement resolution, as can be seen in Figure 3a at 0 V Vg. The resistivity can only be extracted when the 2663
Figure 4. Electric potential plot calculated across Si-NW SBFETs in the on state at Vg ) -20 V and Vds ) -3 V. (a) Device geometry considered, the Si-NWs and Ni-silicide S/D region are 20 nm in diameter. The gate length is 1 µm in (b) and 210 nm in (c). The gate field control over the active region and Schottky contacts in (b) is much stronger than (c) due to the thick gate oxide.
NW channel is depleted by the gate field. Nevertheless, a gated four-point measurement would not give the intrinsic NW resistivity because additional band bending would be introduced at the inner contacts and thus the measurement would be corrupted. Moreover, our silicide contacts are highly intrusive and would distort transport. Therefore, we compare the on-currents of NW transistors with different gate lengths and same diameters. This is similar to the transmission line method, but with different NWs. Although the axial silicidation method described here is capable of shortening the length of the active region down to 20 nm,15 devices shorter than 200 nm showed little or no modulation. The reason for this is the poor electrostatic coupling due to the thick gate oxide. Electrostatic simulations were performed to visualize the potential landscape through the cross-section of devices with 1 µm and 210 nm Lg, both with 20 nm tSi. Figure 4 depicts the resulting potential landscape from solving Poisson’s equation in three dimensions for the on-state, with a gate potential of -20 V and a drain potential of -3 V. For the 1 µm long device (Figure 4b), there is a good coupling of the gate potential to the channel and contact regions. In contrast, the strong S/D fields in the 210 nm SBFET (Figure 4c) reduce the penetration of the gate field into the active region, thus the gate control over the channel is highly diminished. In addition, the equipotential lines near the Schottky contacts are denser for the long device than for the short one, thus the gate electric 2664
field acting on the SBs is lower for the short devices. The transmission through these SBs is expected to be lower because the lower gate field gives a lower band bending at the contacts and a larger SB-width. Further simulations show that the gate coupling to the contacts and active region is practically lost for devices shorter than 200 nm, in accordance with our measurements. This effect is a direct result of the very thick gate oxide used; the future use of thinner gate oxides should improve the electrostatics making the investigation of shorter channel regions feasible. The on-currents delivered by the SBFETs are analyzed with respect of their gate lengths, ranging between 210 nm and 8.5 µm. Figure 5a, compares the subthreshold characteristics of four different Si-NW SBFETs with various gate lengths and a similar diameter of 21 ( 1 nm. A constant diameter is important because the current could be proportional to the Schottky contact area28 given here by the NWs cross-section (Figure 1d,e). The SBFETs compared in Figure 5 were processed under the same conditions and measured in the same way: bias at -1 V and Vg varied from 0 to -20 V then swept to 20 V and back to 0 V. The drain currents of the 210 nm and 1 µm Lg transistors saturate at the same value of around 1 µA for Vg ) -20 V. Figure 5b summarizes the observed on-current versus gate length behavior for additional NW diameters (10, 21, and 30 ( 2 nm). In the regime of gate lengths below 1 µm, the on-current is independent of Lg for constant NW diameters. However, for SBFETs longer than 1 µm, the Ion is strongly reduced over several orders of magnitude, as can be seen for the devices with 2.5 and 5 µm gate length in Figure 5a and for the other transistors plotted in Figure 5b. Two main aspects of the Lg dependence of the on-current need to be discussed, namely its invariance for short gate lengths and the rapid decrease for long ones. The fact that the conductance is essentially constant for Lg < 1 µm can be explained by the presence of the Schottky contacts. We propose that the Schottky contacts dominate the resistance and that the current modulation in these short SBFETs is simply given by the transmission through the SBs. In fact, the output characteristics of the devices with Lg shorter than 1 µm, i.e., Figure 3c for -1 V Vds and -20 V Vg, are located inside the exponential region, confirming that the transport is dominated by the SBs.40 This implies that the channel resistance is so low that it is significantly lower than the lowest measured on-resistance Ron ) 625 kΩ. As evaluated previously, the series resistances from each of the connectors to the channel is typically around 250 Ω and can therefore be neglected. If the Schottky barriers are modeled as additional serial resistances (RSB), a contact resistance (RC) of the order of 10-6 Ω cm2 would provide the right series resistance for a 20 nm diameter contact with the area Ac, since RSB ) Rc/Ac ) 10-6 Ω cm2/π(10 nm)2 ) 318 kΩ ≈ 1 /2Ron (two SB contacts). In this case, the valence band bending induced by the gate electrode at the SB would be equivalent to a 2 × 1019/cm3 p-doping at the SB.11 This field doping value shows the high influence of the electric gate field on the contacts. Alternative explanations of the constant Ion currents, such as an insufficient gate coupling to the Nano Lett., Vol. 6, No. 12, 2006
Figure 5. Gate length dependent behavior of Si-NW SBFETs. (a) Comparison of the subthreshold (Isd - Vg) characteristics with NW diameters of 21 ( 1 nm and different gate lengths. (b) Ion vs Lg of devices with 10, 21, and 30 ( 2 nm NW diameters. Orange lines are visual guides for the 21 nm diameter devices. For Lg < 1 µm Ion remains the same, since it is limited by the Schottky contacts. For increasing Lg, Ion decreases exponentially as shown by the fit in the semilogarithmic plot for NWs with 21 nm diameter (c).
channel due to the screening by the S/D field as mentioned above for shorter transistors than 200 nm can be ruled out because there is a clear current saturation in the Ids - Vg characteristics as seen in Figure 5a. The other important feature is the rapid decrease of Ion with increasing Lg over 1 µm. Figure 5c shows the data of Figure 5b for the 21 nm diameter NWs on a semilogarithmic plot. As the resistance of the NW channel increases with increasing length, due to hole scattering, it will eventually dominate the total transistors resistance. This state is reached for Lg ≈ 1 µm. The output characteristics of such devices for -1 V Vds and -20 V Vg, i.e., Figure 3b are located inside the linear region, thus showing that transport is now primarily controlled by the channel and not by the SB contacts. However, in contrast to the linear decrease that is expected for ohmic behavior, the Ion drop is roughly exponential. The Ion values for Lg > 1 µm are fitted by a first-order exponential decay shown by the red line in Figure 5c with a decay length of around 530 nm. Such an exponential resistance increase dependent on the length is known from CNTs and has been attributed to Anderson localization effects due to defects along the CNT.41 Defects, diameter variations, and strain in these Si-NW SBFETs could in principle be responsible for this effect. Also, trapped charges at the NWs surface or SiNW/oxide interface could enhance elastic scattering, leading to such resistance behavior. This intriguing abnormal behavior can lead to further interesting transport studies. SBFETs based on undoped Si-NWs have been successfully fabricated with intruded Ni-silicide S/D contacts. The length of the active region has been aggressively reduced by the longitudinal formation of a Ni-silicide from both ends of a Si-NW, giving a simple access to a Lg dependent characterization. This process was driven by the axial volume diffusion of Ni along the Si-NW during annealing and allows devices with shorter gate lengths than the ones possible using the optical lithography applied to define the Ni reservoirs. Devices fabricated with this process profit from an increased gate coupling to the needle-like contacts. The lengthdependent study of the on-currents for SBFETs with NW diameters of 21 nm showed that the devices with shorter gate lengths than 1 µm exhibit constant on-currents of around 1 µA. In this short Lg regime, the Schottky contacts seem to Nano Lett., Vol. 6, No. 12, 2006
control the carrier transport and not the NW itself. However, for Lg larger than 1 µm, the channel resistance increases significantly, following an exponential Ion reduction. Moreover, the self-aligned shortening process of the active region, the clear unipolar p-type behavior, the high on-current densities of up to 0.5 MA/cm2 and the large on/off draincurrent ratio of up to 107 make the Si-NW FETs with intruded Ni-silicide contacts interesting for future electronic applications. Acknowledgment. We thank W. Roesner and E. Landgraf for helpful discussions. We also thank B. Panzer, A. Rucki, and H. Cerva from Siemens CT for technical assistance and TEM imaging respectively. Supporting Information Available: Growth and characterization of the implemented Si-nanowires. This material is available free of charge via the Internet at http:// pubs.acs.org. References (1) Tans, S. J.; Verschueren, A. R. M.; Dekker, C. Nature 1998, 393, 49-52. (2) Javey, A.; Guo, J.; Wang, Q.; Lundstrom, M.; Dai, H. Nature 2003, 424, 654-657. (3) Seidel, R. V.; Graham, A. P.; Kretz, J.; Rajasekharan, B.; Duesberg, G. S.; Liebau, M.; Unger, E.; Kreupl, F.; Hoenlein, W. Nano Lett. 2005, 5, 147-150. (4) Seidel, R.; Graham, A. P.; Unger, E.; B.; Duesberg, G. S.; Liebau, M.; Steinhoegl, W.; Kreupl, F.; Hoenlein, W.; Pompe, W. Nano Lett. 2004, 4, 831-834. (5) Graham, A.P.; Duesberg, G. S. Hoenlein, W.; Kreupl, F.; Liebau, M.; Martin, R.; Rajasekharan, B.; Pamler, W.; Seidel, R.; Steinhoegl, W.; Unger, E. Appl. Phys. A 2005, 80, 1141-1151. (6) Cui, Y.; Duan, X.; Hu, J.; Lieber, C. M. J. Phys. Chem. B 2000, 104, 5213-5216. (7) Cui, Y.; Zhong, Z; Wang, D; Wang, W. U.; Lieber, C. M. Nano Lett. 2003, 3, 149-152. (8) Koo, S.-M.; Edelstein, M. D.; Li, Q.; Richter, C. A.; Vogel, E. M. Inst. Phys. Publ. Nanotechnol. 2005, 16, 1482-1485. (9) Wong, H.-S. P. IBM J. Res. DeV. 2002, 46, 133-168. (10) Cui, Y.; Lauhon, L. J.; Gudiksen, M. S.; Wang, J.; Lieber, C. M. Appl. Phys. Lett. 2001, 78, 2214-2216. (11) Sze, S. M. Physics of Semiconductor DeVices; John Wiley & Sons: New York, 1981. (12) Lu, W.; Xiang, J.; Timko, B. P.; Wu, Y; Lieber, C. M. Proc. Natl. Acad. Sci. U.S.A. 2005, 102, 10046-10051. (13) Byon, K.; Tham, D.; Fischer, J. E.; Johnson, A. T. Appl. Phys. Lett. 2005, 87, 193104. 2665
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