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Functional Inorganic Materials and Devices
Stability and Repeatability of Karst-like Hierarchical Porous Silicon Oxide Based Memristor Qin Gao, Anping Huang, Qi Hu, Xinjiang Zhang, Yu Chi, Runmiao Li, Yuhang Ji, Xueliang Chen, Rumeng Zhao, Meng Wang, Hongliang Shi, Mei Wang, Yimin Cui, Zhisong Xiao, and Paul K Chu ACS Appl. Mater. Interfaces, Just Accepted Manuscript • DOI: 10.1021/acsami.9b06855 • Publication Date (Web): 24 May 2019 Downloaded from http://pubs.acs.org on May 28, 2019
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ACS Applied Materials & Interfaces
Stability and Repeatability of Karst-like Hierarchical Porous Silicon Oxide Based Memristor
Qin Gao, † Anping Huang, *, † Qi Hu, † Xinjiang Zhang, † Yu Chi, † Runmiao Li, † Yuhang Ji, † Xueliang Chen, † Rumeng Zhao, † Meng Wang, † Hongliang Shi, † Mei Wang, † Yimin Cui, † Zhisong Xiao, † Paul K. Chu, ‡
† ‡
School of Physics, Beihang University, Beijing 100191, China.
Department of Physics and Department of Materials Science and Engineering,
City University of Hong Kong, Tat Chee Avenue, Kowloon, Hong Kong, China.
● Supporting Information
KEYWORDS: Porous, Karst, Hierarchical, Lithium ions, Silicon oxide, Memristor
Abstract A memristor architecture based on porous oxide materials has the potential to be used in artificial synaptic devices. Herein, we present a memristor system employing a karst-like hierarchically porous silicon-oxide structure with good stability and repeatability.
The karst-like hierarchically porous structure prepared by an
electrochemical process and thermal oxidation exhibits high ON-OFF ratios up to 105 during the endurance test and the data can be maintained for 105 s at a small read voltage 0.1 V. The mechanism of lithium ions migration in the porous silicon oxide structure has been discussed by a simulated model.
The porous silicon-oxide based memristor
is very promising due to the enhanced performance as well as easily accessed neuromorphic computing.
*Corresponding author:
[email protected] (Dr. A. P. Huang); Tel: 86-1082338779; Fax: 86-10-82338779 1
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INTRODUCTION Oxide-based memristors are new-generation memory devices due to the low power consumption, high switching speed, high density, and compatibility with complementary metal-oxide-semiconductor (CMOS) processes.1-7 Oxide-based memristors can be classified into two types: anionic oxide memristors which mainly employ migration of oxygen vacancies and cation oxide memristors based on cation drift and related phenomena.8-12
Although these devices have potential in multi-state
storage and neuromorphic computing, application has been limited by fluctuation of resistance states.
LiCoO2-based memristors deliver improved performance due to
highly reversible intercalation and extraction of lithium ions under an external electric field.
Besides, intercalation and extraction of lithium ions in LiCoO2 do not produce
significant structural transformation.
Therefore, LiCoO2 thin films have large
tolerance during charging and discharging leading to stable resistance states.
Owing
to the low energy barrier for lithium ions transport, LiCoO2-based memristors have a low threshold voltage and are useful for multi-state storage and neuromorphic computing.13-21
The LiCoO2-based memristor composed of the Pt/LiCoO2/Si stack
exhibits stable resistance states.
In this structure, LiCoO2 and Si are used as the anode
and cathode materials in Li-ion batteries, respectively13 and the conductance varies with the concentration of lithium ions in LiCoO2.17-19 Memory degradation and low ONOFF ratios have been observed from LiCoO2-based memristors because LixCoO2 and LixSi generated between the two electrodes produce an electromotive force (EMF) causing electrical short circuit.
As a result of the EMF, lithium ions can easily detach
from the silicon layer decreasing the device retention in the absence of an external field and reduce the high-low resistance ratio of the device.
A buffer layer has been proposed to modulate lithium ions diffusion and prevent electrical short circuit between the electrodes to enhancing device retention.13, 19-22 SiO2 has been used as the buffer layer in Li-ion nano-batteries and the energy storage anode which can store lithium ions when an external voltage is removed.19-21
The
electrochemical reaction occurs in the silicon oxide layer generating Li2Si2O5 and 2
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Li4SiO4, which can trap lithium ions without an external electric field thus increasing device retention between LiCoO2 and Si.13, 17.19-21
In our previous work, the SiO2
buffer layer in the stack of Pt/LiCoO2/SiO2/Si was introduced to decrease the influence of EMF.
The influence of SiO2 on the performance of the LiCoO2-based memristor
was investigated and it was found that SiO2 acted as a lithium ions trapping layer to improve the properties of the LiCoO2-based memristor.23
However, an order of
magnitude fluctuation was observed in our previous experiments and stable multi-states were difficult to achieve.
In this paper, we describe a facile method to fabricate a karst-like hierarchically porous (KLHP) structure by an electrochemical process and thermal oxidation and the effects of the hierarchically porous structure on the performance of the LiCoO2-based memristor is investigated.
The advantage of the KLHP structure is that dopants are
constrained in the pores consequently benefiting the electrochemical reaction between LiCoO2 and SiO2.
The device exhibits good stability and repeatability such as a high
ON-OFF ratio of 105 and retention for 105 s.
The multi-state characteristics are also
observed from the device for a long period of time and a model is proposed to explain the migration mechanism of lithium ions in the porous silica.
EXPERIMENTAL SECTION
The highly doped p-type Si (100) wafer was etched by electrochemical anodic oxidation in a solution with 1 vol% hydrofluoric acid (≥40%, Sinopharm Chemical Reagent Co., Ltd) at a constant current mode for different etching time from 0 to 120 s at room temperature.
The porous silicon oxide (PSiOx) was formed on the porous p-
type (100) Si substrate by thermal oxidation and fabrication of PSiOx was carried out in a tubular furnace.
The temperature was raised from room temperature (27 oC) to
900 oC at a rate of 5 oC/min under argon and after argon was replaced by oxygen, PSiOx (~150 nm) was formed at atmospheric pressure (1×105 Pa) in the oxygen environment at 900 oC for 120 min (sufficient oxidation). 3
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Afterwards, oxygen flow
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was shut off and argon was bled in.
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The temperature was lowered to room temperature
and the LiCoO2 (~80 nm) films were deposited on PSiOx/Si by pulsed laser deposition (PLD). An Au (~100 nm) top electrode were sputtered on LiCoO2/ PSiOx/Si by direct current (DC) magnetron sputtering.
Fabrication of LiCoO2 was carried out in a
vacuum chamber using a KrF laser (LightMachinery IPEX-800, λ = 248 nm and τ = 25 ns) operated at 3 Hz with a fluence of 1.3 J cm−2.
The LiCoO2 films were deposited
in an O2 (10 Pa) atmosphere at room temperature to yield the same lithium ion concentration and LiCoO2 layer thickness.
The morphology and structure of the PSiOx/Si were investigated by field-emission scanning electron microscopy (FE-SEM) and the cross-section of PSiOx/Si was examined by focused ion beam / scanning electron microscopy (FIB-SEM).
The
electrical properties were determined by the Keithley 4200 semiconductor parameter analyzer.
RESULTS AND DISCUSSION
The buffer layer of porous silicon oxide is designed and fabricated according to the structure of a cave.
Figure 1(a) presents the schematic of the PSiOx memristor
device with the cross-sectional SEM images in the middle of the device to clarify the pore distribution in the SiOx/Si layer.
The FE-SEM images of PSiOx for different
etching time are shown in Figures 1(b), (c) and (d) and the morphology and structure of the pores change with etching time.
When the etching time is 30 s, the apertures
are small and the pores are shallow, as shown in Figure 1(b).
After etching for 60 s,
the porous silica shows a KLHP structure as shown in Figure 1(c) which is similar to Figure 1(e).24
When the etching time is increased to 120 s, the pores become larger
and deeper and the pore surface has a folded shape, as shown in Figure 1(d). When the corrosion depth reaches a certain degree, the corrosion direction is more likely to be along the nearest atoms and therefore, as the etching time is increased, the corrosion 4
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direction is first along the (100), and then along the other directions.
Consequently,
the device etched for 120 s has a larger aperture and a folding shape.
To evaluate the electrochemical performance of the hierarchical PSiOx, the current-voltage (I-V) characteristics of the devices etched for different are determined and shown in Figures 2(a), (b), (c), and (d).
The curve morphology of sample (a) is
thinner than that of (b), (c) and (d) even though it has larger external electric field.
The
current sequence traced from 1 to 6 and the maximum current of the sample (c) is larger than those of samples (b), and (d). The programing voltage of sample (b) is smaller than that of sample (a).
In contrast to the porous silicon oxide, the silicon oxide
prepared by thermal oxidation has a dense structure and poor ion conductivity. Therefore, ions need to overcome the mechanical stress energy to permeate the silicon oxide. So the sample (a) without pores need large external voltage to guarantee device translate to low resistance state (LRS). The porous structure plays a pivotal role in the SiOx layer behaving as low-k dielectrics and the loose structure is more favorable to penetration of ions resulting in a relatively low resistance.25
The maximum current of
sample (c) is larger than that of sample (b) and (d) under the same external electric field, and the shape of the curve is more larger than sample (b) and (d). When the device in a LRS after set process, the shape of the curve of sample (c) which the voltage change from 5 V to -5 V is straighter than sample (b) and (d) mean that the device (c) has longer retention time at LRS. The interconnected porous structure is similar to the fissure structure of the cavern mass in the SiOx layer and provide channels for fast lithium ions migration.
The higher electric field around the pores26 gives rise to fast
electrochemical reactions between LiCoO2 and SiO2 and a lower set voltage.
In
addition, since the pores can serve as insulating/trap barriers to suppress charge transfer in the switching layer.
Therefore, larger pores trap a mass of charge can drive higher
internal electric field during programing, so a higher external electric field is needed to control the charge transfer and neutralize it through the porous silicon oxide.27
So the
Imax as shown in Figure 2 (d) who has larger pores has lower current value under a same external electrical field than Figure 2 (c).
Figure S3 dramatically explains the
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migration of lithium ions in the porous structure under the action of external electric field.
The statistical analysis based on more than 10 points on each sample shows that
the electroforming voltage, reset voltage, and set voltage of sample (c) are lower than those of other samples (Figure S4, Table S1).
The durability is assessed to study the stability of the hierarchical porous memristors.
The voltage sweep range of sample (a) is -10 V to 10 V, and samples (b),
(c) and (d) is -5 V to 5 V, in DC mode, the voltage step is ±0.01V and the current compliance is 0.01A.
The high resistive state (HRS) and LRS of the different samples
during 300 switching cycles are shown in Figure 3. Each sample shows high stability at the HRS.
Sample (a) shows fluctuations within one or two orders of magnitude at
LRS, samples (b) and (d) exhibit fluctuations as shown in Table S2. etched for 60 s shows a higher ON-OFF ratio up to 105.
The sample
The KLHP structure
distributed in the silicon oxide layer can relieve the volume expansion of SiO2 during the cycle.
The pores in SiO2 provide channels for fast ion transport and adequate
contact between lithium ions and silicon oxide.28-30
Much of the silicon oxide is
involved in the reaction with lithium ions, the interconnected different size of porous architectures offers an alternative strategy to greatly minimise lithium ions diffusion barriers and potentially enhance the distribution of lithium ions sites, so that the LRS of the device is lower and the ON-OFF ratio is higher.31
To further study the performances of the hierarchical porous structure, the retention of different samples at LRS is measured at a low voltage bias 0.1 V.
Figure
4 shows that the retention of sample (c) at the LRS is up to 105 s. Sample (c) with a KLHP structure also shows that the LRS is gradually changed to a second low resistance state as the retention time increases.
In nature, the size of the fissure affects the
velocity of groundwater seepage and large fractures are equivalent to discontinuous media with high permeability but small storage capacity, resulting in rapid inflow of formation water near the bottom of the well through large fractures. Small fractures are equivalent to continuous media with high storage capacity. These small fractures 6
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are equivalent to small pores playing the role of capillarity and allowing water molecules to slowly permeate into the vicinity of the bottom of the well over time. The negative charge on the surface of the porous silicon oxide with the KLHP structure can attract lithium ions attached to the channel wall.
Positive ions closest to the
channel wall are attracted with the strongest force and hence, the pores in the silicon oxide layer can effectively relieve the electroosmotic flow to guarantee long-time storage of lithium ions. The higher retention of sample (c) further validates that the hierarchical pores interweave to form a three-dimensional karst-like structure to hold back lithium ion diffusion out of the silicon oxide layer without an external voltage29 when the device is in a LRS. Therefore, the electrochemical characteristics of the device is improved and our results reveal that the KLHP structure is more conductive to charge storage boding well for the stability of the device.
To further characterize the stability of sample (c) with the KLHP structure, continuous DC voltage sweep was performed as shown in Figure 5. process in Figure 5 has been executed after the forming process.
The sweep
Figures 5 (a) and (b)
depict the multi-state test for eight cycles at voltages of 7 V and -7 V. The magnified multi-state results are shown in Figures 5 (c) and (d).
By increasing the voltages
sweep range from 7 V to -7 V, the maximum current magnitude in Figures 5 (a) and (b) is 10-3A during the consecutive sweep cycles.
It means that the larger voltage
accelerates the ions reaction in the channels resulting in a lower resistance of the sample. Due to the cumulative effect, the I-V curve of sample (c) changes gradually as shown in Figure 5. The same point of sample (c) is tested for 128 cycles at voltages of -5 V and 5 V after a period of time and the obvious multi-state characteristics are still observed from sample (c) with the KLHP structure.
A low voltage during the
repetitive test is used to ensure that there is no perturbation of the state due to a high voltage during the cycle-to-cycle test. The device with the KLHP structure can still exhibit multi-state characteristics at different periods with good repeatability although the maximum current magnitude of the device is two orders lower than Figure 2 (c). The multi-state characteristics of sample (c) have been measured after a period as 7
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shown in Figures 5 (e)-(f).
The phenomenon of the current degradation may be caused
by the self-limited effect.
During the continuously positive and negative voltage
sweeps, self-limited effect results in the excessive accumulation of lithium ions in KLHP silicon oxide, which accelerates the degradation rate and creates a situation useful for cycling endurance.32-33
The lower electric field is not enough to dislodge
the lithium ions embedded in the KLHP, but larger electric field may damage the device during the consecutive voltage sweeps.
Leaning/memory functions of sample (c) which are similar to the biological systems have been preliminary study as shown in Figure 6. The devices have been measured in DC model with the maximum amplitudes ±5 V, a step of ±0.01 V at room temperature over ~1 h. cycling data (black).
The relationship of stimulations results (red) are based on The physical mechanism of device operation is attributed to
lithium ions migration/diffusion, and the redox reaction with silicon oxide.
The
signals modified and stored using consecutive voltage sweep which is similar to a charge-controlled memristor.33
The switching layer of device consists of two part:
LiCoO2 layer and SiOx layer.
As show in Figures 6 (a) and (b), when continuous
positive (0 to 5 V) and negative (0 to -5 V) voltage sweeps are applied to the device, the trend of the U-t and I-t have been obviously observed from Figures 6 (a) and (b).34, 35
The trend of triangular wave in the Figures 6 (a) and (b) that the device shows a
cumulative memory effect with the increase of voltage signal.
As shown in Figure 6
(a), the current level degradation during a continuous positive voltage sweep is due to self-limited effect.
However, during the long time continuously positive voltage
sweeps, lithium ions may transport from SiOx into Si and generate LixSi.
In reset
process, lithium ions have been extracted from LixSi phase and transport into SiOx, Li4SiO4 and Li2Si2O5 were formed, leading to the decrement of the resistance of silicon oxide (RSiOx).19
Thus, the positive current decreases and the negative current increases
during a continuous voltage sweep, respectively.
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A model is proposed to explain the resistive switching in the electrochemical metallization memory cell and shown in Figure 7.
In set process as shown in Figure
7 (a), as the voltage goes up gradually, lithium ions disengage from LiCoO2 leading to creation of holes in the t2g valence band of LimCoO2.28
The LiCoO2 layer morphs from
an insulating state to a semi-metallic or metallic state: (A) 𝐿𝑖𝐶𝑜𝑂2 − 𝑒 − ↔ 𝐿𝑖𝑚 𝐶𝑜𝑂2 + 𝐿𝑖 + . Under the electric field, (B) Lithium ions migrate in the electrolyte/insulator and tend to aggregate around the porous channels.21
This is followed by a redox reaction
between lithium ions and the insulating dielectric layer: (C) 𝑆𝑖𝑂2 + 𝐿𝑖 + + 𝑒 − ↔ 𝐿𝑖𝑛 𝑆𝑖𝑂2.14, 19, 21, 30, 36
Finally, (D) the device changes from HRS to LRS.
As a result,
the device with the KLHP structures provides pathways for fast lithium ion transport, relieves the volume expansion during charging-discharging, and improves the stability and repeatability of the device.
On the contrary, in reset process as shown in Figure 7
(b), a redox reaction between lithium ions and the insulating dielectric layer can happen: (E) 𝐿𝑖𝑛 𝑆𝑖𝑂2 − 𝑒 − ↔ 𝑆𝑖𝑂2 + 𝐿𝑖 + ,13,
20, 25
and the filament ruptured.
recombination with the holes in the t2g valence band of LimCoO2.28
Lithium ions The LimCoO2
layer morphs from a semi-metallic or metallic state to an insulating state: (F) 𝐿𝑖𝑚 𝐶𝑜𝑂2 + 𝐿𝑖 + + 𝑒 − ↔ 𝐿𝑖𝐶𝑜𝑂2 . Finally, (G) the device changes from LRS to HRS. Because of trap-controlled charge transport effect, there still exist free lithium ions around the channel in the HRS. It is noticeable, , the KLHP structure is more benefit to ions storage, which increase the diffusion path of lithium ions without external electric field, the retention time of sample (c) is longer than sample (b) and (d), as shown in Figure 4.
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CONCLUSIONS
Porous silicon oxide is incorporated into a hierarchical and interconnected structure similar to caves in nature.
The Au/LiCoO2/PSiOx/Si stack delivers good
electrical performance and the migration mechanism of lithium ions in the porous silicon oxide is investigated.
Electrical tests show that the KLHP silicon oxide based
memristor has improved stability and repeatability, for example, high ON-OFF ratio of 105 and retention for 105 s.
The device provides pathways for transport of lithium ions
and retains lithium ions in the porous structure to improve the stability and repeatability. The memristor with the KLHP structure has potential in implementation of neuromorphic computing.
ASSOCIATED CONTENT ● Supporting Information Fabrication of KLHP silicon oxide structure ; SEM analysis of samples processed for different etching time and current density;I-V characteristic curve; the model to explain the motion of ions in different pore structure with etching time of 0 s, 30 s, 60 s, 120 s ; electrical properties of the SiOx memristor devices; durability test of the samples etched for different time; Conductive mechanism of the sample etched for 60 s; electrical properties results of the device without buffer layer SO2
AUTHOR INFORMATION Corresponding Author *E-mail:
[email protected] ORCID Anping Huang: 0000-0002-1365-3575 Notes The authors declare no competing financial interest. 10
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CONFLICTS OF INTEREST There are no conflicts to declare.
ACKNOWLEDGMENTS This research was supported by the National Natural Science Foundation of China (Grant Nos. 51872010, 11574017, 11574021 and 11604007), Special Foundation of Beijing
Municipal
Science
&
Technology
Commission
(Grant
No.
Z161100000216149), and City University of Hong Kong Strategic Research Grant (SRG) No. 7005105.
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(16) Milewska, A.; Świerczek, K.; Tobola, J. Boudoire, F.; Hu, Y.; Bora, D. K.; Mun, B.S.; Braun A.; Molenda, J. The Nature of the Nonmetal–Metal Transition in LixCoO2 Oxide. Solid State Ionics 2014, 263: 110-118. (17) Greenlee, J. D.; Petersburg, C. F.; Daly, W. G.; Alamgir, F. M.; Alan Doolittle, W. In Situ Investigation of the Channel Conductance of a Li1-xCoO2 (0 < 𝑥 < 0.5) Ionic-Electronic Transistor. Appl. Phys. Lett. 2013,102:213502 (18) Fuller, E. J.; Gabaly, F. E.; Léonard, F.; Agarwal, S.; Plimpton, S. J.; Jacobs-Gedrim, R. B.; James, C. D.; Marinella, M. J.; Talin, A. A. Li-ion Synaptic Transistor for Low Power Analog Computing. Adv. Mater. 2016, 29 (SAND-2017-0895J). (19) Chang, W. S.; Park, C. M.; Kim, J. H.; Kim, Y. U.; Jeong, G.; Sohn, H. J. Quartz (SiO2): a New Energy Storage Anode Material for Li-ion Batteries. Energy & Environmental Science 2012, 5: 6895-6899. 13
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(20) Nguyen, V. S.; Mai, V. H.; Auban Senzier, P. Pasquier, C.; Wang, K.; Rozenberg, M. J.; Brun, N.; March, K.; Jomard, F.; Giapintzakis, J.; Mihailescu, C. N.; Kyriakides, E.; Nukala, P.; Maroutian, T.; Agnus, G.; Lecoeur, P.; Matzen, S.; Aubert, P.; Franger, S.; Salot, R.; Albouy, P. A.; Alamarguy, D.; Dkhil, B.; Chrétien, P.; Schneegans, O. Direct Evidence of Lithium Ion Migration in Resistive Switching of Lithium Cobalt Oxide Nanobatteries. Small 2018: 1801038. (21) Ariel, N.; Ceder, G.; Sadoway, D. R.; Fitzgerald, E. A. Electrochemically Controlled Transport of Lithium Through Ultrathin SiO2. J. Appl. Phys. 2005, 98: 023516. (22) Mehonic, A.; Shluger, A. L.; Gao, D. Valov, I.; Miranda, E.; Ielmini, D.; Bricalli, A.; Ambrosi, E.; Li, C.; Yang, J. J.; Xia, Q.; Kenyon, A. J. Silicon Oxide (SiOx): A Promising Material for Resistance Switching? Adv. Mater. 2018, 30: 1801187. (23) Hu, Q.; Li, R.; Zhang, X.; Gao, Q.; Wang, M.; Shi, H.; Xiao, Z.; Chu, P. K.; Huang A. Lithium Ion Trapping Mechanism of SiO2 in LiCoO2 Based Memristor. Sci. Rep. 2019, 9:5081. (24) Zhou, J. Resistive Switching Characteristics of PECVD-Deposited Porous SiO2Based Electrochemical Metallisation Memory Cells. Electron. Lett. 2016, 52: 965966. (25) Tsai, T. M.; Chang, K. C.; Zhang, R.; Chang, T. C.; Lou, J. C.; Chen, J. H.; Young, T. F.; Tseng, B. H.; Shih, C. C.; Pan, Y. C.; Chen, M. C.; Pan, J. H.; Syu, Y. E.; Simon M.; Sze Chen, M. C. Performance and Characteristics of Double Layer Porous Silicon Oxide Resistance Random Access Memory. Appl. Phys. Lett. 2013, 102: 253509. (26) Wang, G.; Lee, J. H.; Yang, Y.; Ruan, G.; Kim, N. D.; Ji, Y.; Tour, J. M. ThreeDimensional Networked Nanoporous Ta2O5-x Memory System for Ultrahigh Density Storage. Nano Lett. 2015, 15: 6009-6014. (27) Wang, H.; Song, Y.; Li, Y.; Wang, M.; Ma, Q.; Yu, W.; Li, D.; Dong, X.; Wang, J.; Liu, G. Rationally Designed Hierarchical Porous CNFs/Co3O4 Nanofiber-Based Anode for Realizing High Lithium Ion Storage. RSC Adv. 2018, 8: 30794-30801 (28) Yu. Flowers cave. https://dp.pconline.com.cn/dphoto/2033277.html, 2010. 14
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(29) Marianetti, C. A.; Kotliar, G.; Ceder, G. A First-Order Mott Transition in LixCoO2. Nat. Mater. 2004, 3: 627. (30) Menzel, S.; Tappertzhofen, S.; Waser, R.; Valov, I. Switching Kinetics of Electrochemical Metallization Memory Cells. Phys. Chem. Chem. Phys. 2013, 15: 6945-6952. (31) Z Guo, X., Wang, R., Yu, H., Zhu, Y., Nakanishi, K., Kanamori, K., Yang, H. Spontaneous preparation of hierarchically porous silica monoliths with uniform spherical mesopores confined in a well-defined macroporous framework. Dalton Trans. 2015, 44, 13592-13601. (32) Wang, B.; Xiao, N.; Pan, C.; Shi, Y.; Hui, F.; Jing, X.; Zhu, K.; Guo, B.; Villena, M. A.; Miranda, E.; Lanza, M.. Experimental Observation and Mitigation of Dielectric Screening in Hexagonal Boron Nitride Based Resistive Switching Devices. Cryst. Res. Technol. 2018, 53, 1800006. (33) Ren, Y., Ma, H., Wang, W., Wang, Z., Xu, H., Zhao, X., Liu, W., Liu, Y. Cycling‐ Induced Degradation of Organic–Inorganic Perovskite-Based Resistive Switching Memory. Adv. Mater. Technol. 2019, 4, 1800238. (34) Bi, G. Q., Poo, M. M. Synaptic modifications in cultured hippocampal neurons: dependence on spike timing, synaptic strength, and postsynaptic cell type. J. Neurosci. 1998, 18, 10464-10472. (35) Wang, Z. Q., Xu, H. Y., Li, X. H., Yu, H., Liu, Y. C., Zhu, X. J. Synaptic learning and memory functions achieved using oxygen ion migration/diffusion in an amorphous InGaZnO memristor. Adv. Funct. Mater. 2012 22, 2759-2765. (36) Zhang, Y.; Li, Y.; Wang Z.; Zhao, K. Lithiation of SiO2 in Li-Ion Batteries: in Situ Sransmission Electron Microscopy Experiments and Theoretical Studies. Nano Lett. 2014, 14: 7161-7170.
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Figure 1. (a) Schematic of the porous SiOx memristor device with the cross-sectional SEM image of the middle of the cell; FE-SEM images of the porous SiOx film for different etching time of (b) 30 s, (c) 60 s, and (d) 120 s; (e) Karst Cave structure in nature similar to (c).
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Figure 2. I-V curves of the samples etched for different time: (a) 0 s, (b)30 s, (c) 60 s, and (d) 120 s.
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Figure 3. Durability tests of the samples etched for different time: (a) 0 s, (b) 30 s, (c) 60 s, and (d) 120 s.
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Resistance (Ω)
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0s 30s 60s 120s
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Retention times (s) Figure 4. Retention tests for the samples etched for different time.
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Figure 5. The sample etched for 60 s tested for multi-states; Diagrams of the multi-state test at voltages of (a) +7 V and (b) -7 V; (c) - (d) Magnified views of (a) and (b); Diagrams of the multi-state test at voltages of (e) -5 V and (f) +5 V after a period.
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Figure 6. The curve of the U-t、I-t test of the sample etched for 60 s at (a) 5 V and (b) -5 V.
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Figure 7. (a) (A) Oxidation of the LiCoO2 layer (charge transfer reaction) and dissolution𝐿𝑖𝐶𝑜𝑂2 − 𝑒 − ↔ 𝐿𝑖𝑚 𝐶𝑜𝑂2 + 𝐿𝑖 + . (B) Migration of Li+ under the applied electric field in the porous SiO2 and converge around the pore. (C) Redox reaction at the LiCoO2 / Porous SiO2 interface and internal porous SiO2, 𝑆𝑖𝑂2 + 𝐿𝑖 + + 𝑒 − ↔ 𝐿𝑖𝑛 𝑆𝑖𝑂2. (D) Electroforming process by further reduction and filaments approach the inert electrode.
(b) (E) A redox reaction between lithium ions and the insulating
dielectric layer, 𝐿𝑖𝑛 𝑆𝑖𝑂2 − 𝑒 − ↔ 𝑆𝑖𝑂2 + 𝐿𝑖 + , (F) Migration of Li+ under the applied electric field in the porous SiO2 and recombination with the holes in the t2g valence band of LixCoO2. (G) The filament ruptured and the device changes from LRS to HRS.
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