Ultrafine Pitch Stencil Printing of Liquid Metal Alloys - ACS Applied

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Ultra-fine Pitch Stencil Printing of Liquid Metal Alloys Nathan Lazarus, Sarah S. Bedair, and Iain M. Kierzewski ACS Appl. Mater. Interfaces, Just Accepted Manuscript • DOI: 10.1021/acsami.6b13088 • Publication Date (Web): 06 Jan 2017 Downloaded from http://pubs.acs.org on January 6, 2017

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ACS Applied Materials & Interfaces

Ultra-fine Pitch Stencil Printing of Liquid Metal Alloys Nathan Lazarus1*, Sarah S. Bedair1 and Iain M. Kierzewski2 1

US Army Research Laboratory, 2800 Powder Mill Rd., Adelphi, MD 20783

2

General Technical Services Inc. at ARL, 2800 Powder Mill Rd., Adelphi, MD 20783

*Corresponding author: [email protected] Keywords: liquid metal, stencil printing, stretchable electronics, electroplated stencil, galinstan

ABSTRACT With high conductivity and stretchable for large cross sections, liquid metals such as galinstan are promising for creating stretchable devices and interconnects. Creating high resolution features in parallel is challenging, with most techniques limited to a hundred micrometers or more. In this work, multilevel electroplated stencils are investigated for printing liquid metals, with galinstan features as small as ten micrometers printed on soft elastomers, a factor of ten reduction over past liquid metal stencil printing. Capacitors and resistive strain sensors are also demonstrated, showing the potential for creating stretchable conductors and devices.

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Flowing room temperature liquid metals in channels is a promising techniques for creating stretchable conductors. With metallic conductivity and stretchable for large cross sections, liquid metals are intended for applications benefitting from low resistance including antennas, 1 inductors,2,3 heaters4 and stretchable interconnects.5 A challenge for stretchable fluidic systems has been creating small features, with conventional microfabrication techniques poorly suited for liquid metals due to flow during processing.6 Approaches have been recently developed to push features into the micrometer regime. Serial deposition or manipulation can be used to create very small features; for instance, inkjet deposition of liquid metal nanoparticles followed by mechanical sintering created features with one micrometer line widths.7 These approaches require individual patterning of features, resulting in slower, higher cost processes. There has been interest in creating more manufacturable parallel deposition and patterning techniques. Photolithographic patterning on silicone has been demonstrated, using lift-off8 or patterning of selective wetting regions,9 with minimum features 20 µm and 3 µm respectively. These techniques require individual sample patterning using specialized, expensive equipment and chemicals. For large scale patterning, printing using reusable stamps and stencils is a promising alternative. Although stamps and stencils themselves may require cleanroom fabrication, these can be repeatedly re-used at lower cost. Fine resolution features (2 µm line width, 1 µm spacing) were recently demonstrated with PDMS stamps.10 Despite these impressive results, stamping resulted in thin residues in gaps with non-negligible resistivity. This is a drawback for devices like capacitors most benefiting from high resolution features and narrow gaps; the demonstrated capacitor had a low quality factor of 50.10 Therefore, a need for low-cost, high-resolution liquid-metal printing techniques remains.


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As a low-cost and high-throughput process widespread in printed circuit board assembly,11 stencil printing can potentially enable cheaper large-scale liquid-metal patterning. However, non-toxic gallium alloys like galinstan and eutectic gallium-indium12 used instead of mercury rapidly form a gallium oxide layer resisting flow without significant applied pressure,13 making pushing through narrow slots difficult. Despite printing liquid metals through etched foils,14 printed plastics15 and patterned tapes16 and papers,17 there has been little success in reducing feature size, with width and spacing remaining at least a hundred micrometers. Here we reduce this limit by an order of magnitude by using multilevel stencils to pattern features as small as ten micrometers in galinstan on elastomeric substrates. For printed circuit boards, there are also advantages to smaller beads of solder paste for denser interconnects, causing efforts toward improving stencil printing resolution. In addition to the obvious relation between deposited patterns and hole size, there is a dependence on thickness, with thinner templates printing finer features.18 Of the common stencil fabrication techniques (wet etching, laser cutting and electroforming),19 electrodeposition has been preferred for shrinking hole sizes and thicknesses due to compatibility with modern micromachining. Electroplated stencils with thicknesses 20 µm to 30 µm have been developed,19,20,21,22 with prints down to 60 µm pitch (pitch defined as feature width plus spacing). Below a minimum thickness handling becomes difficult, limiting improvements through thinning alone. Recently, a technique was developed for pushing this limit further through multi-level stencils.23,24 Regions a few micrometers in thickness are combined with a thicker supporting frame (Fig. 1 (a)), creating stencils thin enough for fine feature patterning and robust enough for printing. Paste features with 20-µm pitches have been demonstrated.


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(a)

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Stencil pattern

Supporting frame 100 μm

PDMS roller

(b) Liquid metal

(c)

Stencil

(d)

Figure 1. (a) Multilayer stencil diagram, (b) SEM image of stencil and (c-d) printing process

In this work, we adapt this technique for patterning small galinstan features on silicone. Copper stencils were electroplated with 3-µm patterns and 30-µm frame (Fig. 1 (b)). Previously we developed a multi-layer copper electroplating process for inductors,25 with a modified version used here (Figure 2). A seed layer consisting of 175 nm of copper on 2.5 nm of titanium is sputter deposited on a silicon wafer. Patterned photoresist (AZ9245, Clariant) forms an electroplating mold for depositing copper from a copper sulfate bath, forming the thinner pattern layer. This is repeated with thicker photoresist for the frame. The photoresist is removed in acetone; seed layer etching in commercial copper etchant (APS-100, Transene) followed. The wafer is then removed by etching in 30% KOH solution at 85°C.


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Silicon

Copper

Photoresist

1. Seed layer deposition

4. Layer 2 pattern and plate

2. Resist mold patterning

5. Photoresist removal

3. Layer 1 electroplating

6. Seed layer etch and KOH release

Figure 2. (1-6) Stencil fabrication process Printing was performed using a print-and-roll technique (Figure 1 (c)).26 Stencils are attached to soft silicone (Ecoflex 00-30, Smooth-on). Liquid-metal beads are applied then rolled with a PDMS roller (Sylgard 184, Dow Corning). Rolling presses liquid metal through holes into contact with silicone, leaving deposits in those areas after stencil removal (Figure 1 (d)). Stencils were fabricated with arrays of rectangular holes with side lengths ranging from 5 to 100 μm. Hole spacings were equal to side lengths, giving pitch twice side length. In addition to multilevel stencils (3-µm-thick pattern supported by 30 µm frame), similar single-layer 30µm-thick stencils were made for comparison. Liquid metal was printed, and dimensions were measured using an Olympus LEXT OLS 4000 laser-confocal microscope (Figure 3 (a) and (b)).


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3x3 arrays were measured for each size with value and error bars correspond to average and standard deviation respectively.

Ideal

30 µm

3 µm

120

Feature Width (µm)

100 80 60 40 20

20 µm

0 0

20

40

60

80

100

(c)

Stencil Gap Width (µm)

(a) 50

Feature Thickness (µm)

40 30 20 10 0 0

20

40

60

80

100

Stencil Gap Width (µm)

(b)

40 µm

(d) 20µm

Height (µm)

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-15

(e)

30µm

4 3.5 3 2.5 2 1.5 1 0.5 0

100 µm

-10

-5

0

5

10

15

Position (µm)

(f)


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Figure 3. (a) Printed width and (b) thickness, (c) features printed with 10 µm gap width and spacing, (d) gap test structures for 30 µm features and (e) image and (f) height profile of lines printed with 20-µm (bottom) and 30-µm (top) gaps

Printed lateral dimensions should match hole side lengths (‘ideal’ curve in Figure 3 (a)). For smaller holes, printed feature size drops before failing to print. This occurs as material remains on the sidewalls rather than wetting the target surface; this is set by thickness and wetting characteristics of sidewalls, wetting of target surfaces, and liquid-rheological properties.27 Thin stencils have less area for sidewall pinning, allowing finer printing. The pinning results in irregular sidewalls and rounded corners, particularly at process limits, and has been seen previously in liquid-metal stencil printing.14 The 30-µm-thick stencil printed for holes to 50 µm (pitch 100 µm) with average feature width 29 µm. Multilevel stencils transferred far smaller features, down to 10 µm (20-µm pitch), with 5.5 µm average deposit width (Figure 3 (c)). Due to gallium oxide on the galinstan surface, deposits do not flow to minimize surface area. The deposits are therefore more irregular than the spheres or domes typical of solder, and tend to become circular for very small feature sizes rather than following the square stencil shape. Five and eight micrometer gaps were attempted without significant deposition. Feature thicknesses fell with smaller holes for both stencils, from over 30 µm thickness for 100 µm holes to 0.7 µm for 10 µm holes. This results from increased sidewall pinning when sidewall area becomes similar to exposed substrate area, resulting in reduced transfer.19 Although information was unavailable for smaller features, print thickness variation for holes of 30 µm to 100 µm were consistent with prior paste measurements.19 For larger apertures, deposit thicknesses approach stencil thicknesses.19 In Figure 3 (b), several points slightly exceed total stencil thickness. This occurs because stencil removal applies a force pulling the deposit inward and upward before necking and the stencil breaking away. Oxide pins the metal in this deformed state.


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To determine minimum spacing, a test pattern was printed (Figure 3 (d)) using rectangular holes of 30-µm side lengths. Photolithography for the electroplating molds can define structures to 5 µm, setting the minimum hole spacing. With deposits smaller than holes, deposits are further apart, roughly 10 µm for 5 µm hole spacing. Lines were patterned (Figure 3(e)) using slots 0.55 mm in length, the bottom and top sets with 20-µm and 30-µm stencil-gap width and spacing respectively. Laser-confocal height profiles were taken (cross section in Figure 3 (f), along length in Figure S1).

As with rectangular features, printing creates deposits with

lateral dimensions smaller than the stencil slots. The 30-µm slot resulted in a deposit width roughly 20 µm, while line width from the 20 µm pattern was approximately 10 µm. Thickness drops with narrower gap as well, from peak height of 3 µm for the wider line to 1.6 µm for the smaller feature. Average resistance of five 30 µm lines was measured to be 2.1 Ω (standard deviation 0.76 Ω) by dipping copper wires into droplets added to the ends, with short circuit measurements to eliminate wiring and contact resistances. Since electrical continuity is important for stretchable electronics, profiles along the length of 60 lines (30 for each gap width (20 μm and 30 μm)) were characterized. Defining as discontinuous regions less than 0.3 μm thick, the number of continuous lines was 28 and 26 for 20 μm and 30 μm gaps respectively. With the higher control over printing speed and force typical of commercial settings, yield would likely rise. Although stencils were not damaged or noticeably deformed during printing for the patterns here, features less than 30 μm in width and longer than one millimeter were fragile and prone to sticking to the silicone during printing, sometimes breaking. This can be mitigated through stronger materials such as nickel or through reinforcing arches.24


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Thicker regions can pattern low resolution features, but cannot achieve the thinned-area resolution. To understand the support necessary, stencils with thinned square regions with 1.5 mm to 3 mm sides were used for patterning (Figure S2). While all stencils transferred the pattern, rippling in the 3 mm membrane suggests it was not well supported. With thicknesses used here, 2 to 3 mm side length appears to be the upper bound for stable membranes. High-density stencils with 1 mm and 3 mm membranes were used for patterning (Figure S3), reflecting thinned region area densities of 83% and 94% respectively. With re-use an important stencil-printing advantage, repeated cleaning and patterning was attempted using a multi-level stencil. Patterns were deposited followed by stencil cleaning using light rubbing with isopropyl-alcohol-soaked lint-free wipes; stencils were then used for a total of four depositions with no obvious degradation in the final pattern (Figure S4).

2 mm

200 µm (a)

(b) Measured

Mechanical clamp

Model

2.5

Resistance(Ω)

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2 1.5 1 0.5 0

Galinstan droplet (electrical contact)

0

20

40

Strain (%)

(c)

(d)

Figure 4. (a) Printed capacitor, (b) features after sealing, (c) resistive sensor strain testing and (d) results (resistance measurement resolution 100 μΩ)


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An interdigitated capacitor was fabricated using electrodes with 30-µm widths and spacings (Figure 4 (a)); the electrode overlap region was 1 mm in length. Each line extends a further 1 mm, allowing electrical contact through manual addition of larger droplets followed by landing of tungsten probes. The device was measured with a HP 4284A precision LCR meter at 1 MHz, with capacitance 0.146 pF and quality factor 155. Short and open calibration to the probe ends accounted for wiring and probe parasitics. 2D simulations were performed using COMSOL and estimated average thickness and electrode width values of 3 μm and 20 μm respectively; these predicted a capacitance of 0.11 pF (neglecting finger tips). Since there is variation in line widths and thicknesses, COMSOL simulations of the variability effects were performed (Figure S5). For conservative estimates of the extremes in electrode width (15 to 25 μm), capacitance varies by approximately 25%, with lower thickness sensitivity (

Ultrafine Pitch Stencil Printing of Liquid Metal Alloys - ACS Applied

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