Dynamic graphical display in computerized analytical procedures

A versatile computerized system for the development and comparison of electroanalytical ... p—a timesharing operating system for laboratory automati...
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cessive iteration to perform subtraction to account for the influence on Ni of the background tail due to Cr. The spectrum subtraction method proves useful in a wide variety of ISS measurements. It enhances spectral resolution, reduces background effects, and increases sensitivity for elements present on the surface of solid materials. These measurements also indicate the validity of the binary scattering model and the linear independence of the scattered signal from each element.

LITERATURE CITED (1) D. P. Smith, J. Appl. Phys., 38, 340 (1967). (2) R. F. Goff, J. Vac. Sci. Techno/.,I O , 355 (1973). (3) G. M. McCracken, Rep. Prog. Phys., 38, 241 (19751. (4) J. T. McKinney and J. A. Leys, Paper Presented at the Eighth National Conference on Electron Probe Analysis, August 13-14, 1973, New Orleans, La.

RECEIVEDfor review October 27, 1975. Accepted January 29, 1976.

Dynamic Graphical Display in Computerized Analytical Procedures Hans J. Skov, Lars Kryger, and Daniel Jagner* Department of Chemistry, University of Aarhus, Langelandsgade,DK-8000 Aarhus

The use of computers is now extensive in connection with all types of analytical procedures and instrumentation. Computerization has meant not only automation of manual analytical procedures but also the development of new analytical techniques. An additional advantage is rapid data reduction during the execution of the analysis, thus enabling the final results t o be obtained immediately after the termination of the analysis. Computerized analytical procedures are not, however, completely free from drawbacks. Since the collection and processing of data and the evaluation of the results are left entirely to the computer, the possibility of checking the analytical procedure during its performance is very limited. Such a possibility, which is always an advantage, is imperative during the development of a new analytical technique. Although it is possible to obtain preliminary digital results on, for example, a teletype or a line-printer, such representation is often of limited value for checking purposes, since the interpretation of digital information is usually timeconsuming. This drawback may be overcome by means of a device capable of generating a rapid graphical display of the results. Based on experience gained in the development of computerized methods for titrimetric, electrochemical, and x-ray fluorescence analysis, the main demands for such a graphical device may be summarized: 1) resolution of a t least 200 X 100 points in the x-y plane. Generation of vectors between consecutive display points ought to be possible; 2) response time of less than 1 s; 3) low cost; 4) minimum interference with real time operations, Le., the device ought to have an external memory; 5) it should be possible to change part of the graphical information without having to renew the whole graphical display. This is especially advantageous for real time operations since it minimizes the number of computer cycles needed to serve the device. None of the graphical devices available meet with all the above requirements. An x-y recorder, coupled to the computer via a D/A converter, would fulfil only the first three requirements. If the recorder were replaced by a storage oscilloscope, the response time would be reduced considerably, but a high quality oscilloscope is expensive, has no external memory, and for every change in the graphical display, the whole picture must be renewed. Furthermore, the graphical display cannot be stored on the oscilloscope screen for a longer period without serious loss of resolution. A graphical screen (e.g., Tektronix 4012) has good resolution but is expensive and has no external memory. A Calcomplotter is very slow and is not suitable for displaying preliminary results. Present address, D e p a r t m e n t of A n a l y t i c a l Chemistry, U n i v e r s i t y of Goteborg, Fack, S-402 20 Goteborg 5, Sweden.

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A graphical device fulfilling all the above requirements is described below. The device, which is based on Dynamic Random Access Memories and a television monitor, has been connected to a time-shared computer, but it is constructed so that it can be used in conjunction with any processing computer. The device can be programmed for graphical and alphanumeric displays but has no hard-copy facilities.

GENERAL DESCRIPTION A block diagram of the device is shown in Figure 1. The main parts are the output registers from the processing computer, the electronic interface, and the display unit, the two latter parts being independent of the type of computer used. The display unit, which is a normal black-and-white television monitor, can be considered as a matrix of 256 columns and 192 rows, Le., with a total of 49 152 points. The memory of the interface consists of six Dynamic Random Access Memories, RAMS (Texas Instruments, T M S 4030) with a total storage capacity of 49 152 bits, each bit thus corresponding, via the video amplifier, to a point on the monitor screen. The sequence determinator of the interface performs three types of operations. I t constantly renews the contents of the RAM’S and the display on the monitor, the duration of a refresh cycle being 16 ms. The sequence determiner also accepts new information from the computer. This information is either a clear signal or an address signal. A clear signal causes all information previously written on the display to be removed during the next 16-ms refresh cycle. An address signal consists of eight x-address bits, eight yaddress bits (192 y-addresses in RAM only) and one black/ white bit. The sequence determiner transfers the signal to the appropriate address in RAM and to the corresponding point on the display. If the white bit is set, information is written on the display screen, and if the black bit is set, the corresponding point is cleared. The x, y, and black/white bits are transformed in three sequences from one 24-bit computer word to the x, y latches by means of the 8-bit internal transmission system of the computer. After completion of this transfer, a clock pulse on the write-in line (cf. Figure 1) initiates the sequence detector. The RC4000 computer is a medium size time-shared computer with 48K 24-bits words and a 2-M word disc.

SOFT WARE The necessary software consists of a driver routine and a vector generating program. The driver handles the communication between the high level language (e.g., BASIC, ALGOL, or FORTRAN) and the electronic interface and ANALYTICAL CHEMISTRY, VOL. 48, NO. 6, MAY 1976

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Figure 1. Block diagram of

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must therefore be written a t the ASSEMBLER language level. Since different computers have different ASSEMBLER compilers, the driver routine must be specific for the computer used. The vector generating program is, however, written in high-level language (here ALGOL V) and can thus be transferred, after minor alterations, to any computer with an ALGOL compiler. Since the RC4000 computer used in this work operates in a multiprogrammed environment, an ASSEMBLER routine handling communication between different loaded programs is also necessary. All software can be obtained from the authors on request. Driver Routine. The driver routine, which is part of the core-resident monitor program, is written in the SLANG ASSEMBLER language. It occupies 20 words of core. On request from a subordinate ALGOL program, the driver routine reads a 24-bit word within this program. This word

Figure 2. 934

Hardware configuration of the graphical display

ANALYTICAL CHEMISTRY, VOL. 48, NO. 6, MAY 1976

carries the x and y coordinates (8 bits each) of the point to be displayed and the black or white information in the 8 most significant bits. Of these 8 bits only 1 is, of course, needed for the black/white information. The contents of the 24-bit word are transferred to the x, y latches (cf. Figure 1) in two phases, i.e., an address phase and a data phase. In the address phase, the address to the appropriate external device (here the graphical display) and the addresses to the appropriate x, y latches in this device are established. In the data phase, 3 /LS later, the 8-bit characters are transferred to their relevant latches. During this transfer, the busy line is set high by the interface. If a busy flag is detected in the address phase, the output operation is repeated. Communication Routine COM. The ASSEMBLER communication routine COM is callable from the executive ALGOL V program. When a subordinate program requires the attention of the monitor program for 1/0 operations, the communication routine performs the necessary internal interrupts. In order to depict n points on the graphical screen, the executive ALGOL program sets up an n-dimensional array, ia, each element being structured as the computer word shown in Figure 1. The call COM ( ; a ) then results in n internal interrupts, each interrupt being followed by a call of the driver routine. Vector Generating Program, PLOT. The interface and the driver routine generates a point by point display on the television screen. This point pattern is often difficult to interpret, and it is therefore necessary to. generate vectors connecting consecutive experimental points. These vectors are generated by the ALGOL V program PLOT. The call PLOT (x, y, PEN) selects the best vector between the point last addressed and the new point x, y. This vector is then displayed by successive calls of COM. The parameter P E N decides whether the vector should be black, white, or neither. The display rate with the existing soft ware is approximately 1000 points/s. This relatively low rate is mostly due to the large number of internal interrupts necessary in the multiprogrammed environment. If necessary, the rate could be increased by a factor of 5 , without interfering with

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the time-sharing of the computer, simply by transferring 5 points per interrupt instead of 1. The display rate when a dedicated computer is used is approximately 10 000 pointds.

HARDWARE

A block scheme of the hardware configuration of the graphical display is shown in Figure 2. Each of the 12 memory modules A-L consists of 64 X 64 cells, and the modules are arranged in three rows, each row consisting of four modules. This arrangement comprises the hardware equivalent of the 192 X 256 matrix discussed above. A schematic diagram of the interface is shown in Figure 3. This scheme is given in such detail that it ought to be possible to copy the interface without further information. Consequently, only the reading and writing sequences will be further discussed. Access Times. The memory modules each have an access time of 470 ns. This makes them too slow for direct operation in connection with a television monitor where a horizontal line is scanned in 60 ws, i.e., 234 ns per point on a 256-point line. This comprises a major problem when using a normal television monitor as graphical display. Reading of the Memory Modules. In order to synchronize the display rate of the television monitor with the reading rate of the memory modules, two 4-bit latches (Mem A and Mem B in Figure 2) are used as temporary information storage. One row of memory modules, e.g., E, F, G, and H is read into one of the latches simultaneously with the multiplexing of the content of the other latch. The reading of the memory modules and the generation of the vertical and horizontal synchronizing pulses is processed by a 16-bit binary counter as is shown in-Figure 4 (cf. also Figure 2). Figure 5 shows how the three least significant bits of this binary counter process the output, sequences 1-12 being characterized by: 1) Bit 0.0 in modules A, B, C, D stored in Mem A; 2) Bit 0.0 in modules A, B, C, D stored in Mem B; 3) As 1; 4) As 2; 5 ) Multiplex 0.0 from module A stored in Mem A to video amplifier; 6) Multiplex 0.0 from module B stored in Mem A to video amplifier; 7) Multiplex 0.0 from module C stored in Mem A to video amplifier; 8) Multiplex 0.0 from module D stored in Mem A to video amplifier; 9) Multiplex 1.0 from module A stored in Mem B to video amplifier; 10) Multiplex 1.0 from module B stored in Mem B to video amplifier; 11) Multiplex 1.0 from module C stored in Mem B to video amplifier; and 12) Multiplex 1.0 from module C stored in Mem B to video amplifier. 936

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The coordinates of the display points are shown in Figure 6 together with information on the relevant memory addresses for each display point. Bits 22-27 of the binary counter specify the x address (0-255) and bits P-213 specify the y address (0-191). Each time bit 27 goes from high to low, a display line has been scanned and a vertical synchronizing pulse is generated. Each time bit 215 goes from high to low, a horizontal synchronizing pulse is generated and a new reading cycle of the memory modules is initiated. Writing into the Memory Modules. New information is written into the memory modules by converting a read cycle into a write cycle. The address of the information to be written is transferred from the executing program to the memory modules via a 16-bit register (8-bit add x 8-bit add y in Figure 2). This address is decoded in the write selector with the help of bits 2O, 2l, 2" and 215 of the binary counter. These bits determine which module the information should be written into according to

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During this decoding, a coordinate system, with its origin in the upper left corner of the display, is generated. The origin can be moved, e.g., to the lower left corner of the display by inverting bits P-213 and transferring bit 215 into 215,new = 215 214. Bit 214 is not changed. The writing rate is 16 &point. Clearing of the Memory Information. If all information in the memory modules is to be removed the read/ write input of the modules are set in the write mode for 20 ms. All memory cells then contain the same information, Le., either high or low. Whether this information is high or low is determined by the setting of data in 1/0 shown in Figure 2. After a consecutive read cycle, all display points will be either black or white.

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DISCUSSION The hardware configuration of the dynamic graphical display can be used in combination with any processing computer, those computers with word lengths of 16, 24, or 32 bits being easier to interface. The assembler driver routines linking the graphical display to the operating system

of the computer are, of course, specific for the particular computer used Driver routines for the graphical display are, however, of medium complexity, whereas programs generating vectors between different display points can be written in high level language. The hardware cost of the graphical display is modest. If the cost of a second-hand black-and-white television monitor is omitted, the total hardware cost for the system is less than $500. With the aid of the schematic diagrams given in Figures 2 and 3, assembling time ought to be less than 1 month.

Using the same approach as described above, the graphical display can be modified to operate in connection with a color television monitor. This would, however, increase the hardware cost by approximately a factor of five.

RECEIVEDfor review November 4, 1975. Accepted January 16, 1976. This work has been supported by the Danish Natural Research Council through a guest professorship to Daniel Jagner.

Gas Chromatographic Multidetector Coupled to a Glass Capillary Column Milan Hhvnaz,' Walter Frischknecht,' and Lenka Cechova Givaudan Forschungsgesellschaft AG, Dubendorf, Switzerland

Sulfur- and/or nitrogen-containing compounds are sensorically important constituents of many flavor materials. Their presence in complex mixtures can be elegantly detected by means of the GC-MS coupling technique, provided that well-defined mass spectra of the constituents are obtained. The application of glass capillary columns with their high resolving power, therefore, will in many cases be of advantage ( I , 2). In spite of high gas chromatographic resolution, trace compounds of interest may occasionally be overlapped by large neighboring components in the chromatogram, so that only the mass spectrum of the dominating constituent is observed while the information concerning the trace is lost. Even from well-separated trace components hardly interpretable mass spectra may result, due t o the limited sensitivity of the GC-MS system or because of increasing interference from column bleed a t elevated working temperatures. In such cases, element-specific GC detectors can be employed advantageously to signal the presence of S- and/or N-containing substances. These detectors, up to now, were mostly operated in combination with packed GC columns; newer applications are covered in a recent paper by Ettre e t al. ( 3 ) .The combination with capillary columns has been reported lately by Goretti e t al. ( 4 ) (S-mode FPD) and

Figure 1. Schematic view of

the splitting arrangement

(1) Column outlet; (2) PTFE shrink tubing; (3) initial splitting: (4) final splitting: (5) purge gas inlet

Present address, EMPA, Dubendorf, Switzerland.

Hartigan e t al. ( 5 ) (N-mode AFID); Zlatkis et al. (6) present the simultaneous use of FID and FPD (sulfur mode) in combination with a nickel capillary column without giving any technical details. Most recently, also a multiple detector system operated in combination with a packed column was described by McLeod et al. (7). We set out to couple a glass capillary column to a multiple detector arrangement consisting of a FID (serving as monitoring device), a sulfur detector, and a nitrogen detector, plus a sniffing port for the sensoric evaluation of column effluent. Since we desired simultaneous detection, the column effluent was split by means of a four-way splitter before entering the detectors. Each of these detectors re-

Figure 2. Photograph of a simple two-way end-split operated with a direct purge gas stream (A) Connection to glass capillary column: (B) purge gas line; (C) glass splitting chambre (inner volume less than 1 ,ut); (D) split stream toward the FID (through a glass-lined tubing sleeve): (E) split stream toward the extending sniffing port (split ratio FID: nose about 1:2)

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