Effect of Carrier Localization on Electrical Transport and Noise at

Centre for Nano Science and Engineering, Indian Institute of Science, Bangalore 560012, India. Nano Lett. , 2017, 17 (9), pp 5452–5457. DOI: 10.1021...
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Effect of Carrier Localization on Electrical Transport and Noise at Individual Grain Boundaries in Monolayer MoS 2

Kimberly Hsieh, Vidya Kochat, Xiang Zhang, Yongji Gong, Chandra Sekhar Tiwary, Pulickel M. Ajayan, and Arindam Ghosh Nano Lett., Just Accepted Manuscript • DOI: 10.1021/acs.nanolett.7b02099 • Publication Date (Web): 08 Aug 2017 Downloaded from http://pubs.acs.org on August 9, 2017

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Effect of Carrier Localization on Electrical Transport and Noise at Individual Grain Boundaries in Monolayer MoS2 Kimberly Hsieh,∗,†,§ Vidya Kochat,‡ Xiang Zhang,‡ Yongji Gong,‡,∥ Chandra Sekhar Tiwary,‡ Pulickel M. Ajayan,‡ and Arindam Ghosh†,¶ †Department of Physics, Indian Institute of Science, Bangalore 560012, India ‡Department of Material Science and NanoEngineering, Rice University, Houston, Texas 77005, USA ¶Centre for Nano Science and Engineering, Indian Institute of Science, Bangalore 560012, India §Correspondence should be sent to K.H. (email: [email protected]). ∥Current address: Department of Materials Science and Engineering, Stanford University, CA 94305, USA E-mail: [email protected] Phone: +91 8861549300 Abstract In spite of its importance in the large-scale synthesis of transition metal dichalcogenides (TMDC) molecular layers, the generic quantum effects on electrical transport across individual grain boundaries (GBs) in TMDC monolayers remain unclear. Here we demonstrate that strong carrier localization due to the increased density of defects determines both temperature dependence of electrical transport and low-frequency noise

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at the GBs of chemical vapour deposition (CVD)-grown MoS2 layers. Using field effect devices designed to explore transport across individual GBs, we show that the localization length of electrons in the GB region is ∼ 30 − 70% lower than that within the grain, even though the room temperature conductance across the GB, oriented perpendicular to the overall flow of current, may be lower or higher than the intra-grain region. Remarkably, we find that the stronger localization is accompanied by nearly five orders of magnitude enhancement in the low-frequency noise at the GB region, which increases exponentially when the temperature is reduced. The microscopic framework of electrical transport and noise developed in this paper may be readily extended to other strongly localised two dimensional systems, including other members of the TMDC family.

Keywords CVD MoS2 , grain boundaries, McWhorter, variable range hopping, low frequency 1/f noise

Introduction Molybdenum disulphide (MoS2 ) is an excellent candidate for future electronic and optoelectronic applications 1 due to its layer-tunable band gap (≈ 2.4 eV for monolayer MoS2 2,3 ), reasonably high carrier mobilities (> 30 cm2 V−1 s−1 ) even for unencapsulated monolayer devices at room temperature 3,4 and high on/off current ratio (108 ) 5,6 making it suitable for switching and logic integrated circuits. 7 Its unique properties allow it to have wide-ranging applications as chemical sensors, 8 photodetectors, 9,10 solar cells, 11 energy converters, 12 generators 13 and in DNA sequencing. 14,15 However, commercial applications of such MoS2 nanosheets would require a low-cost yet scalable alternative to conventional top-down methods such as mechanical cleavage. Chemical vapour deposition (CVD) is an excellent route towards scaling up , 16–19 but a major drawback of this method is that it typically leads to the formation

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of polycrystalline grains separated by grain boundaries (GBs). 17,18,20–27 The GBs are generally detrimental to electrical performance in 2D electronics, resulting in low mobility and reduced on-off current ratio, 17,21,22,24,25 as well as high electrical noise 28 as compared to their mechanically exfoliated counterparts. 29–35 The phenomenology of GBs in atomically thin layers of TMDC is rich and complex, 23,36,37 which makes identifying a generic transport mechanism a challenging task. High resolution electron microscopy indicate occurrence of both tilt and mirror twin GBs, with localized midgap states at 8 − 4 defects. 23 Extended mid-gap metallic modes have been observed at inverted twin boundaries using scanning tunneling spectroscopy (STS) and angle resolved photoemission spectroscopy (ARPES) measurements. 36,38 These 1D metallic states have been suggested to arise from a polar discontinuity at the edges and boundaries of the TMDC film 39 and its low energy spectra have been addressed with the Tomonaga Luttinger liquid (TLL) formalism. 38 The numerical studies further confirm the broad phase space, extending from strong localization at low tilt angles, to metallic GBs for 60○ tilt angles, 40 as well as prediction of half-metallic states at Mo-terminated inversion twin boundaries. 41 The anisotropy along and across the GB makes the room temperature electrical conductance either exceed or fall short of the intra-grain conductance, 23 thereby failing to identify the underlying transport mechanism without ambiguity. In this work, we employed detailed investigation of temperature and gate voltage dependence of electrical conductance and low-frequency noise to explore the impact of electron localization on transport across individual GBs in CVD-grown MoS2 . The role of localization in exfoliated monolayers of MoS2 has been under debate as both variable range hopping (VRH) through single particle states in the presence of short range disorder, 4,31,42–45 as well as classical percolation of charge due to long range inhomogeneity 46,47 have been reported. Electrical transport in CVD-grown graphene has however been largely attributed to the Mott-type VRH mechanism, 43–45 where the localized electrons can hop to sites at large distances which are energetically favorable. The localised states can arise from poor

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screening of the fluctuating Coulomb potential from trapped charges at the MoS2 -SiO2 interface, 44 and/or the defect states, such as sulphur vacancies, point defects and line defects, within MoS2 itself. 42,48 In our experiments, VRH transport is observed both within a single grain (SG) and across the tilt GBs, albeit the localization length ξ (the exponential decay length scale of the localized electronic wave function) in the GB region was found to be consistently lower by ∼ 30 − 70% than that in the SG region. This is reflected in stronger T -dependence of conductance and nearly five orders of magnitude increase in low-frequency noise. The reduction in ξ at the GB, provides a crucial insight to nature of electronic states in TMDC monolayers as structural defects proliferate, leading to poorer screening properties, and stronger potential fluctuations from trapped charges in the substrate.

Results and Discussion Chemical vapour deposition of crystalline MoS2 grains were carried out directly on the SiO2 /Si wafer (see Supplementary Information for more details on growth conditions and Fig. S1 for preliminary characterization). A representative GB region separating two monolayer MoS2 grains, and the corresponding field-effect device structure are shown in Fig. 1(a) and (b), respectively. For this work, we investigated three devices with GBs separating grains (misorientation angles given in Table 1). Four equispaced electrical contacts (20 nm Au) were fabricated approximately parallel to the GB, so that the overall current flow occurs perpendicular to the GB itself, while transport in the adjacent SG regions could also be Table 1: Details of the devices (µFE values shown for 267 K) Device Angle

µSG_L

µGB

µSG_R

(cm2 V−1 s−1 ) (cm2 V−1 s−1 ) (cm2 V−1 s−1 )

T0GB K

1

13○

2.6

2.3

2.7

5 × 104

2

3○

2.7

1.2

3.1

105

3

32.5○

7.4

8.2

8.5

3 × 104

4

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(a)

(c)

(d)

VDS

1.2

G (10-6 :-1)

MoS2

0.8

VBG

0.4 SG2_L GB2 SG2_R

1.0

267 K

IDS

SG_L GB SG_R

'VBG = 40 V

0.5

Vth

0.0

Dev 2 0

50

0.0

Dev 1 Dev 2 Dev 3

100

VBG (V)

(f)

1.6

'VBG= 29 V

GB

10-4

G T (:-1 K)

1.2

0.8

SG GB

0.4 100

200

300

T (K)

(h)

(g)

10-5

10-5

40 V

10-6 0V

0.14

SG

10-4

'VBG

105

T0 (K)

(e) G (T)/G (267 K)

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G (10-6 :-1)

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40 V

0V

0.16

0.18

0.20

10-6 0.14

'VBG

0.16

0.18

T -1/3 (K -1/3)

T -1/3 (K -1/3)

0.20

104

GB SG

Dev 1

0

20

40

'VBG (V)

Figure 1: (Color online) Optical micrographs of (a) a pair of triangular monolayer MoS2 grains prior to etching and (b) a typical device etched into a rectangular pattern and contacted by Au (20 nm) contacts. Scale bar, 10 µm (c) The sheet conductance G◻ of the GB and two adjacent SG regions (SG_L and SG_R) of Dev 2 as a function of back-gate voltage VBG at 267 K. Inset: Schematic of a typical CVD grown monolayer MoS2 FET showing two grains (SG) with a grain boundary (GB) in between. (d) Comparison of sheet conductance G◻ of SG and GB regions for all three devices 1, 2 and 3. (e) Sheet conductance G◻ of SG and GB region normalised to their respective values at 267 K as a function of temperature T at ∆VBG = 29 V for Dev 2. The temperature dependence of conductivity of GB (f) and SG (g) at different ∆VBG (0 V to 40 V in intervals of 5 V) indicating VRH transport. The solid lines are fits to the data according to Eq. 1. (h) T0 values as a function of ∆VBG extracted from the fits of Eq. 1 for GB and SG regions of Dev 1.

measured simultaneously for immediate comparison. All measurements were carried out in two-probe configuration, with the heavily doped Si substrate acting as the global backgate (inset of Fig. 1(c)). Fig. 1(c) shows the low-bias (Vsd = 0.1 V for all measurements) sheet conductance (G◻ ) of the SG and GB regions of Dev 2 close to room temperature as a function of gate voltage (VBG ) indicating intrinsic n-type behaviour above the threshold voltage Vth (indicated by arrow). The zero drain current IDS intercept of the linear part of the transfer characteristic curve is used to extract Vth at low source-drain bias. 49 Importantly, comparing the room 5

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temperature conductance for a fixed ∆VBG = VBG − Vth at room temperature suggests that the GB region is not necessarily more resistive than the SG region (Fig. 1(d)), which is not surprising given the anisotropy of electrical conduction at the GB and its sensitivity to the exact growth conditions and misorientation angle. 25,45,50 Table 1 shows the field effect mobilities µFE = [L/(W Cox VSD )] × [dI/dVBG ] of the GB and adjacent SG regions of all three devices close to room temperature. Our results are consistent with previous findings which reported mobility suppression for GBs with tilt angles < 9○ , followed by a nonlinear increase in mobility as a function of misorientation angle, finally saturating around ≈ 20○ . 50 We also observe that the conductance of the GB region decreases faster than that of the SG region as the T is decreased (Fig. 1(e)), suggesting stronger influence of carrier localization. Quantitatively, we have analysed the T -dependence of G◻ within the two-dimensional MottVRH framework, 31,51

G◻ =

⎡ ⎢

T0 G0◻ (T ) exp ⎢⎢− ( ) ⎢ ⎣

T

1 3

⎤ ⎥ ⎥ ⎥ ⎥ ⎦

(1)

where T0 = β/kB ξ 2 N(EF ) and G0◻ ∝ T −m are the correlation energy scale and the conductivity prefactor, respectively. (Here β ≈ 13.8 and m = 0.8 − 1 are numerical constants, while N(EF ) ≈ 1014 eV−1 cm−2 is the (weakly varying) density of the localized states at Fermi energy EF . 52 Fig. 1(f) and 1(g) illustrate the Mott-VRH of conductivity for the GB and SG regions, respectively, of Dev 1 for different values of ∆VBG . The observation of VRH in CVD-grown MoS2 is in agreement with earlier reports, 43–45,53 which seems to be the case for both SG and GB regions. Interestingly, VRH can be used to explain conduction even in the ON-state suggesting that our simple SiO2 back-gated geometry is unable to probe the extended states beyond the true mobility edge. This is not surprising since the characteristic energy width of the conduction band tail was found by Zhu, et al. to be significantly large φ ≈ 100 meV. 52 The overall magnitude of T0 ∼ 104 − 105 K is also in agreement with existing literature 31,44,53,54 (Fig. 1(h)), suggesting typical localization length ξ ≈ 1 − 5 nm, 31,55 which approaches the effective Bohr radius of the hydrogenic centers in MoS2 in the strong disorder 6

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limit. 31 The key observation, however, is the distinctly larger magnitude of T0 for GB transport, irrespective of ∆VBG , compared with that in the SG region (Fig. 1(h)). This was observed in most other cases as well (Supplementary Fig. S3). The factor of ∼ 2 − 3 increase in T0 in the GB region suggests stronger electron localization, with an overall reduction of ∼ 30 −70% in ξ among all devices and gate voltage range. Since both SG and GB regions are located on the same substrate, the microscopic origin of the stronger localization must be connected to the increase in the local defect concentration at the MoS2 GB region itself. This leads to weaker screening of the trapped charges at the MoS2 /SiO2 interface, and therefore stronger potential fluctuations. Carrier localization also manifests in characteristic features in low-frequency conductance noise, or 1/f noise, which allows us to cross-verify the possibility of enhanced localization at the GB region. In this work, we have carried out detailed measurements of 1/f noise (for measurement technique, see Ghosh, et al. 56 for details) in both GB and SG regions as a function of T and VBG . The right panel of Fig. 2(a) shows the time series of slow current fluctuations across the GB region at different VBG (left). The corresponding power spectral density (PSD) SI varies inversely with frequency f , revealing the 1/f nature of the noise (Fig. 2(b)). For a quantitative comparison across different devices, we estimated the normalized noise variance A × ⟨δI 2 ⟩/I 2 , where A and ⟨δI 2 ⟩ are the area of the region between the contact probes, and net current variance (integrated SI over the experimental bandwidth), respectively. At room temperature, the normalized variance at the GB exceeds the intra-grain noise magnitude in all devices, especially near the conduction threshold, which is a direct manifestation of enhanced concentration of disorder (Fig. 2(c)). While a similar observation has already been made for GBs in CVD grown graphene, 28 recent STS measurements have indicated significantly enhanced trapping-detrapping noise on MoSe2 GBs and their intersections. 57 We first focus on the gate voltage dependence of noise, which helps in identifying the

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(a)

GI/I (u

ISD (nA)

100 V

120

(b)

(c)

10-3

1.0

85 V

0.5 40 50 V

40

80

0

VBG (V)

0.0 200

100

~ 1/f

10-5 10-6 10-7

0 0

SI /I2 (Hz-1)

10-4

80

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50 V 85 V 100 V

0.1

1

10

f (Hz)

Time (s)

(d)

(e) GB

137 K 208 K 267 K

SG

10-3

137 K 267 K

10-4

10-4

10-5

10-5

10-6 10-6 20

40

60

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SG_L GB SG_R

1020

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10-3

¢GI2²/ I2

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1019 SiO2

1018 1017

40

60 80 VBG (V)

100

Dev 1

Dev 2

Dev 3

Figure 2: (Color online) (a) Transfer characteristics (left) of GB region of Dev 1 with the corresponding time series of current fluctuations (right) at three gate voltages. (b) Normalized power spectral density SI /I 2 as a function of frequency at VBG = 50, 85 and 100 V obtained from (a). (c) Noise parameter (A × ⟨δI 2 ⟩/⟨I⟩2 ) of GB and adjacent SG regions of all three devices at two gate voltages ∆VBG = 0, 40 V. (d)The normalized variance ⟨δI 2 ⟩/⟨I⟩2 (markers) as a function of gate voltage VBG for GB (left) and SG (right) at different temperatures. The solid lines show fits to Eq. 2. The downward arrows indicate the threshold voltage Vth of the corresponding transfer characteristic curve. (e) Extracted Dit values for GB and SG regions of all three devices at 267 K. Shaded region indicates the range of Dit values for SiO2 obtained from literature

underlying microscopic mechanism. The origin of electrical noise in TMDC systems has been a matter of debate, 33,58–63 and both Hooge mobility fluctuations (HMF) 58,59 and McWhorter carrier number fluctuations (CNF), 33,60,61,64 as well as a combination of the two, 62,63,65 have been suggested. In the low density and low mobility regime, however, noise in TMDC FETs has been explained by the McWhorter model, 35

A

gm 2 ⟨δI 2 ⟩ 6.2e2 kB T D ( ≈ ) it 2 κ ⟨I⟩2 Cox I 8

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(2)

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where Cox , κ ≈ 109 m−1 , Dit and gm = ∂I/∂VBG , are the oxide capacitance, inverse of the decay length scale of the electronic wave function inside the oxide, the density of trap states at the SiO2 surface, and transconductance, respectively. The proportionality A⟨δI 2 ⟩/I 2 ∝ (gm /I)2 in Eq. 2 reflects slow intermittent trapping and de-trapping of charge at the MoS2 /SiO2 interface causing random fluctuations in the effective gate voltage that manifests in the noise in source-drain current via transconductance gm . By computing the VBG -dependence of gm directly from the experimental transfer characteristics, we show that A⟨δI 2 ⟩/I 2 is indeed

∝ (gm /I)2 in the GB region for VBG ≳ Vth (solid lines in Fig. 2(d)), while the proportionality constant extracted from the fit allows one to estimate the density of trap states Dit from Eq. 2. The McWhorter’s number fluctuation model explains noise behavior in the SG region too (right panel of Fig. 2(d)), although due to the lower (∼ 1 − 2 orders of magnitude, Fig. 2(c)) magnitude than the GB case, a VBG -independent contact noise 35 seems to dominate the SG noise at low temperatures. Intriguingly, extraction of Dit from Eq. 2, using Cox ≈ 1.21 × 10−4 F for 285 nm-thick SiO2 dielectric, yields Dit up to ∼ 1020 eV−1 cm−3 for the GB region (Fig. 2(e)), which is ∼ 2 orders of magnitude larger than that expected for trap density at the SiO2 surface for all devices. Importantly, the Dit ≈ 1019 eV−1 cm−3 values for the SG regions agree well with previous studies on noise in exfoliated MoS2 devices. 60,66 The unphysically large estimate for Dit in the GB region is a strong indication that the conventional framework of McWhorter model (Eq. 2) breaks down for electronic channels with strongly localized carriers. This is not surprising because Eq. 2 implicitly assumes diffusive transport within the channel, and hence extended (or weakly localized) wave function of the charge carriers. Indeed, we find the T -dependence of noise in our devices to be very different from that expected from the McWhorter model (∝ T , Eq. 2, assuming T -independent gate voltage noise), but increases exponentially with decreasing T in both SG and GB regions as illustrated in Fig. 3(a) for Dev 1. The deviation from the McWhorter model is further emphasized in Fig. 3(b), where we have shown the ratio of the observed noise magnitude and that expected from Eq. 2, with experimentally obtained (gm /I)2 , and 9

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(b) DVBG= 30 V

~ exp(-BT/T0)

2

-4

10

10-5 100

104 103

10-3

N / NSiO McW

A ´ ádI2ñ/ I2(mm2)

GB1 GB2 GB3 SG1 SG2 SG3

101

SG_L GB SG_R

Dev 1

200

100

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120

160

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280

T (K)

T (K)

(c)

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McWhorter

6 (d) 10

DOS

L SGL LGB L SGR

EF

2DEG

105

Noise

NGB /N'SG

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SiO2 E McWhorter in VRH

DOS

VRH

Mobility Edge

EF

104 Dev 1 Dev 2 Dev 3

103

δ

Noise

0

SiO2 E

20

40

60

80

DVBG (V)

Figure 3: (Color online) (a) Noise parameter (A × ⟨δI 2 ⟩/⟨I⟩2 ) of GB and SG regions of Dev 1 as a function of temperature at a fixed ∆VBG . (b) Observed noise magnitude N of GB and SG region normalised to that expected from Eq. 2 for a typical value of SiO2 trap density of 1018 eV−1 cm−3 showing an exponential increase in noise with decreasing temperature (solid SiO2 lines indicate fits to data). N SG /NmcW is shown only for T> 200 K where contact noise does not dominate the measured noise. (c) Schematic representation comparing the original McWhorter model formulated for extended states (top) and the modified version for VRH systems (bottom). Black arrows in (c) indicate the two sources of charge traps which lead to fluctuations in the conduction band of CVD grown MoS2 channels. Grey shaded region indicate band of localised states in MoS2 . (d) Ratio of the noise from GB alone NGB to the ′ noise from an equivalent area of SG region NSG showing colossal increase in noise due to GBs. Inset: Schematic showing the addition of noise from SG and GB regions to give the total intergrain noise. Dit = 1018 eV−1 cm−3 for SiO2 . While the intra-grain (SG) noise is larger by a factor of ∼ 5 − 20, the GB noise can exceed the expected noise from McWhorter model by ∼ 2 − 4 orders of magnitude, especially at low temperatures. We also rule out quantum interference effects, 32,67,68 since these processes lead to only power law (∝ T −1 ) dependence of the noise magnitude on temperature. 10

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The exponential T -dependence of noise is, however, a key feature in the VRH transport, arising from the slow exchange of charge with states lying outside the hopping conduction energy band δ (see schematic of Fig. 3(c)). 69 At low T , noise increases rapidly as finding localized states outside the energy band δ = kB (T0 T 2 )1/3 becomes progressively easier. How-

ever, the proportionality of the noise magnitude to (gm /I)2 (Fig. 2(d)) suggests a mechanism

based on effective gate voltage fluctuations. In the schematic of Fig. 3(c), we elucidate a combined framework, where the carrier number fluctuations via transition to an empty localized state, located either within the MoS2 layer or at the substrate interface, but outside the hopping band, leads to the effective gate voltage fluctuations (δVg )2 . For Mott-VRH,

(δVg )2 ∝ exp(−BT /T0 ), where B is a numerical factor. 69 The overall current noise is then, gm 2 gm 2 BT ⟨δI 2 ⟩ 2 ) ∼ (δV ) × ( ) ∝ ( ) exp (− g 2 I I I T0

(3)

which also explains larger noise for the GB region, where T0 is larger by ∼ a factor of two (Fig. 1(h)). Thus, larger noise is another direct result of the stronger localization in the GB region. Finally, to compare the noise from the GB region to that from an equivalent area within the grain, we assume the GB to consist of a uniform distribution of defects over the width WGB ∼ 1 − 10 nm 23,24,28 (also see Supplementary Fig. S4) . In such a case NGB LGB ⟨(δI)2GB ⟩ ≈ ′ NSG WGB ⟨(δI)2SG ⟩

(4)

where LGB = 7.8 µm is the contact separation for the inter-grain measurement. The ratio ′ NGB /NSG is plotted for all devices in Fig. 3(d) as a function of gate voltage at 267 K assuming

an average GB width WGB ≈ 5 nm. Similar to CVD graphene, 28 we observe that noise from the GB can be 104 − 105 times larger than that from single crystalline regions of equivalent dimensions at room temperature, thereby hindering the quality and performance of electronic components fabricated from such multidomain MoS2 grains.

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In conclusion, our experiment on electrical transport across individual grain boundaries in CVD-grown MoS2 reveals stronger localizaion of electrons at the grain boundaries than that within the grain. The reduction in the localization length by ∼ 30 − 70% suppresses the electrical conductivity, and enhances low-frequency noise by ∼ 1−3 orders of magnitude at the grain boundaries, with these effects becoming more severe at low temperatures. We show that a modified McWhorter number fluctuation model for strongly localized electronic channels explains the enhanced noise and its unusual temperature dependence. Strong localization of electronic states at the TMDC grain boundaries may be the microscopic origin of performance degradation in polycrystalline TMDC layers.

Acknowledgement This work was supported by the Department of Science and Technology, Government of India and the MURI ARO program, grant number W911NF-11-1-0362, by FAME, one of six centers of STARnet, a Semiconductor Research Corporation program sponsored by MARCO and DARPA. This work was partially funded by the Air Force Office of Scientific Research (AFOSR) Grant No. FA9550-14-1-0268. K.H. and A.G. thank the National Nanofabrication Center, CeNSE, IISc (NNfC) for providing clean room facilities and the Micro and Nano Characterization Facility, CeNSE, IISc (MNCF) for Raman characterization.

Supporting Information Available MoS2 Growth and Device Fabrication, Raman and photoluminescence (PL) characterization, X-Ray Photoemission Spectroscopy, Calculation of Misorientation Angle, T0 for other devices, TEM Imaging and Analysis. This material is available free of charge via the Internet at http://pubs.acs.org/.

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DOS

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1 ACS Paragon Plus Environment 2 Silicon 10 μm 𝐸 3

Localised states