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Enhanced Quality CVD-Grown Graphene via a DoublePlateau Copper Surface Planarization Methodology Mark H. Griep, Travis M. Tumlin, Joshua T. Smith, Satoshi Oida, Tomoko Sano, John Demaree, and Christos Dimitrakopoulos Cryst. Growth Des., Just Accepted Manuscript • DOI: 10.1021/acs.cgd.7b00687 • Publication Date (Web): 02 Oct 2017 Downloaded from http://pubs.acs.org on October 6, 2017

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Crystal Growth & Design

Enhanced Quality CVD-Grown Graphene via a Double-Plateau Copper Surface Planarization Methodology Mark H. Griep1*, Travis M. Tumlin1, Joshua T. Smith2, Satoshi Oida2, Tomoko Sano1, Derek Demaree1, and Christos Dimitrakopoulos3 1

U.S. Army Research Laboratory, 4600 Deer Creek Loop, APG, MD 21005. IBM T.J. Watson Research Center, 1101 Kitchawan Rd., Yorktown Heights, NY 10598. 3 Department of Chemical Engineering, University of Massachusetts Amherst, MA 01003. 2

Keywords: Graphene, Copper Substrate Roughness, Electropolishing, Nanoelectronics, 2D Nanomaterial

ABSTRACT Two-dimensional (2D) nanomaterials have been of intense interest in recent years due to their exceptional electronic, thermal, and mechanical properties. Tailoring these novel properties toward their intrinsic potential requires precise control of the atomic layer growth process and the underlying catalytic growth substrate, as the morphology and purity of the catalytic surface plays a critical role on the shape, size, and growth kinetics of the 2D nanomaterial. In this work, we present a systematic study on the role of the catalytic surface morphology and interface properties on the subsequent carrier mobility properties of CVD-grown graphene. A modified

ACS Paragon Plus Environment

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electropolishing methodology results in a dramatic reduction of over 99% in Cu surface roughness that enhances the carrier mobility of the CVD-grown graphene by as much as 125% compared to unpolished and lower planarization level growth substrates, providing a clear correlation between the smoothness of the Cu growth substrate and the resulting electrical properties of the graphene. Mobility measurements also reveal a systematic and controllable reduction in carrier concentration for increased electropolishing time. In addition to enhanced transport properties, the 100-fold reduction in the copper surface roughness leads to the ability to grow high-quality graphene at lower process temperatures.

INTRODUCTION Recent literature has begun to elucidate the effect of catalytic metal surface roughness on the quality of 2D nanomaterials grown subsequently on such surfaces by CVD. To date, multiple methodologies have been explored to increase the control of the active growth substrate surface’s grain size, crystal orientation, oxide thickness, exposed functional groups, and surface roughness including tailored annealing, H2 treatments, controlled oxide growth 1, etchant pre-cleaning 2, and electropolishing 3-5, respectively. Since the graphene growth process predominantly involves a surface diffusion and nucleation process due to the low solubility of carbon species into the copper substrate, the effect of the growth surface morphology, crystal structure, and defects on the resulting 2D nanomaterial quality is of concern. Increased surface coverage, control of nucleation density, and larger single crystalline domains have been achieved for CVD-grown graphene utilizing planarized copper growth substrates

3, 5

which has directly translated into

improved graphene mechanical properties 6. Varying 2D material systems, such as h-BN, have


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shown substantially increased grain size 7 and increased tailorability of the growth mechanisms due to control of substrate roughness 8. The impact of a planarized growth substrate is theorized to impact multiple stages of the 2D nanomaterial growth process 9. Once a nucleation site is formed, the surface mobility of the diffusing carbon species determines its likelihood of interacting with an existing graphene flake 10

. As graphene islands tend to nucleate at surface imperfections such as grooves or grain

boundaries

11-12

, a reduction in nucleation density can be achieved through reducing the defect

points on the Cu surface. Beyond nucleation events, conformation of the synthesized graphene on the rough metal surface has been shown to induce uneven strain within the film and defects in the carbon lattice

13-14

, although surface features do not limit continuous graphene growth

14

.

Graphene growth follows the morphology of the growth substrate; therefore, when the graphene is removed from the non-planar underlying metal, it is unable to lay flat on the target surface resulting in cracking and wrinkling within the transferred graphene film 15. As wrinkled regions have been shown to modulate the local electronic environment

16

, the reduction of wrinkle

defects are also critical to realize graphene’s electronic potential. Although the utilization of electropolishing towards planarized foil preparation for graphene growth has become more common, the precise mechanism for growth enhancement has yet to be clarified. Additionally, standard electropolishing methodologies reported in literature for CVD graphene growth, to date, yield only moderate reductions in surface roughness and do not present a focused study isolating the role of varying surface planarization levels on 2D nanomaterial electrical properties. In this study, we utilize a recently established electropolishing methodology that allows tailored preparations of ultrasmooth Cu substrates with >99% reduction in surface roughness 6, extending substrate smoothness parameters far below literature reported to date

3, 5, 17-18

and providing


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planarized substrates comparable to those prepared via more complex methods such as epitaxial sputtering and template stripping

19-20

. The material properties of the resulting electropolished

foils are examined, and the effect of Cu surface roughness on the resulting electronic transport properties of graphene is reported. METHODS Electro-polishing of Cu foil. Standard copper foils were purchased from Alfa Aesar (25 µm, 99.8%) and degreased with acetone, IPA, and milli-Q water sequential rinsing prior to use. Planarization of the Cu foil surface was achieved utilizing a Struers Lectropol 5 electropolishing unit. The optimized electrolyte was composed of 330 mL dI H20, 167 mL ortho-phosphoric acid, 167 mL ethanol, 33 mL isopropyl alcohol, and 3.3 g urea. Cleaned Cu foils were cut to 5 cm x 5 cm pieces, and specific areas of 5 cm2 were electropolished at the center of the foil at 8V under constant electrolyte flow for 60s (low), 90s (medium), and 120s (high) timepoints. Precise control of the electropolishing area and shape is achieved with masks made specifically for the Struers electropolishing unit. Cu foil characterization. Copper foil surface morphology and roughness values were measured with an Asylum MFP-3D atomic force microscope (AFM) in non-contact tapping mode and an Olympus LEXT OLS3100 profilometer.

Near-surface compositional measurements were

conducted by x-ray photoelectron spectroscopy (XPS), using a Kratos Axis Ultra system equipped with a hemispherical analyzer. The sample was irradiated with a 150 W monochromatic Al Kα (1486.7 eV) beam, and both magnetic and electrostatic lenses were used to select photoelectrons from a ~ 1 mm × 2 mm area of the solid surface with a take-off angle of 90°. The pressure in the XPS chamber was held between 10

-8

and 10

-9

Torr. Elemental high


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resolution scans for C 1s, Cu 2p, and O 1s were acquired in the constant analyzer energy mode with a pass energy of 20.0 eV. A low energy electron neutralizer was employed to reduce surface charging, and the spectra were adjusted for any residual charging by adjusting the energy of the adventitious C 1s peak to a binding energy of 285.0 eV. Surface composition was calculated using relative sensitivity factors supplied for the Kratos Axis Ultra system and CasaXPS analysis software, which was also used to deconvolute the Cu 2p peak to determine the relative fraction of copper bonding states present at the surface. Crystallographic structure of the copper domains was determined utilizing electron backscatter diffraction (EBSD) on a FEI Nova 600 NanoSEM scanning electron microscope (SEM) equipped with an EDAX Pegasus XM 4 with a Digiview EBSD system. Graphene grown on control and planarized Cu foils were transferred to a Si/SiO2 wafer for RAMAN characterization. RAMAN was performed on a Horiba LabRAM Aramis spectrometer with a 532nm excitation laser wavelength. Graphene growth, transfer, and characterization. Graphene films were synthesized using standard

CVD techniques. In brief, prepared foils were placed into a quartz tube furnace and the chamber was evacuated to 50 mtorr. Hydrogen was then introduced into the system at 2 sccm and samples were annealed in a hydrogen atmosphere for 30 minutes at 1000°C. To initiate growth, a methane flow of 0.1sccm and continued for 10 minutes to achieve full coverage. Graphene was transferred using a polymer support technique. Briefly, 10 wt.% of Poly(Bisphenol A) Carbonate (Sigma) in chloroform was spin coated on graphene coated copper foils at 5000 rpm for 1 minute followed by annealing in air at 160°C for 2 minutes. Samples were then placed in a 0.1 M solution of ammonium persulfate and allowed to etch overnight. Polymer/graphene films were then rinsed in three successive baths of deionized, distilled water followed by transfer to the SiO2 substrate. The sample was annealed in vacuum to remove polymer residue and other dopant


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molecules. Mobility measurements were performed in air via the Van der Pauw method, with probes placed at the corners of the graphene samples. Multiple measurements were performed without relocation of the probes.

RESULTS AND DISCUSSION Efforts to control copper surface morphology for 2D nanomaterial growth have primarily included chemical mechanical polishing (CMP)

21

, electropolishing, or a hybrid of the two

methodologies. While planarizing Cu foils with CMP has been shown to have a positive effect, the metal CMP process is still poorly understood

22

. The abrasive nature of the CMP process

has been shown to create amorphous Beilby layers, alter grain structure, create foreign atomistic inclusions, and induce plastic deformation, ultimately altering the material structure of the reactive superficial layer

23-24

. With the semi-smooth/sub-micron roughness of the standard Cu

foils utilized for graphene growth, this work shows that mechanical polishing is unnecessary and sub-10nm surface roughness can be readily achieved solely by utilizing electropolishing techniques. As shown in Figure 1, a high degree of Cu surface planarization control has been attained through an optimized electropolishing setup, yielding the ability to reduce surface roughness 10 to 100 fold relative to as-received foils. The primary variables that control the electropolishing process include electrolyte composition, pertaining to the acid concentration and viscosity, and the electropolishing setup details, ranging from the sample/bath dimensions, electrode arrangement,

and

electrolyte

temperature/circulation

rate.

Traditionally

optmized

electropolishing protocols are performed in the 1.5-2.0V, which is below oxygen evolution region of most electrolytes and can reduce the occurrence of substrate pitting 24. In our studies,


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however, it was found that a secondary current-voltage plateau occurs for electropolishing around 8V which yield stable 0.40-0.45 A/ cm2 current densities (Supplemental Information, Figure S1). The higher voltage/current levels achieved enhanced surface roughness reduction and overall surface consistency, while avoiding pitting in the substrate. These settings also allow for extremely rapid electropolishing rates, yielding ultra-smooth Cu substrates in less than twominutes. Further electropolishing beyond the two-minute timepoint yielded substrate defects due to the rapid formation of pits and areas of complete copper dissolution thru the foil. The optimized protocol yields surface roughness reductions from control (Ra 390nm) of 93% (60s epolish, Ra 27.3nm), 98.7% (90s epolish, Ra 4.9nm), and 99.3% (120s epolish, Ra 2.8nm).


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Figure 1. Images of engineered Cu foils, optical close up images (15um scale bar), and AFM 3D topographical analysis, respectively, for (a,b) as-received Cu foils, (c,d) low electropolished Cu foil (60s), (e,f) medium electropolished Cu foil (90s), and (g,h) high electropolished Cu foil (120s).

Beyond changes in surface topography, slight changes in the Cu foil’s elemental composition and crystallographic structure resulted from the electropolishing procedure. Elemental analysis by XPS indicated that all of the samples had a significant amount of carbon, oxygen, sodium, and phosphorus present at the surface, in addition to copper. Considering that the sampling depth of XPS for Cu 2p photoelectrons is approximately 5 nm, it is estimated that the surface


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contamination layer on the as-received sample is approximately 4.5 nm, but is somewhat thinner (approximately 3 nm) after electropolishing. The Cu 2p3/2 peak can be deconvoluted to determine the relative fraction of Cu atoms that are present in an elemental state and in an oxidized (II) state. It is worth noting that the binding energy and peak shape of the Cu 2p3/2 peak cannot distinguish between elemental Cu and Cu2O, but that the shape of the Cu LMM Auger peaks and the total amount of oxygen detected (mostly bound to carbon and phosphorus) indicate that the largest copper peak corresponds to elemental copper only. All three electropolishing conditions reported in this study reduced the fraction of oxidized Cu from 12% to approximately 6%, with little difference between electropolished samples themselves (Figure 2). The small amount of CuO still remaining on the electropolished samples likely resulted from post-polishing air exposure, or a small reaction with the carbonaceous and phosphate-rich surface contamination layer, which is removed by high temperature hydrogen reduction prior to graphene growth.


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Figure 2. XPS spectra characterizing oxide levels in the (a) control and (b) epolished samples. (c) Atomic percentage of Cu oxides in surface layers for each Cu substrate processing point.

Copper foil crystal orientations pre and post-anneal are shown in Figure 3. Utilizing electron backscatter diffraction (EBSD) analysis, it was quantitatively determined that electropolishing improved the foil surface with respect to smoothness and reduced strain within the grains. Each EBSD data point has a “confidence index” (CI), which is an EDAX Inc’s patented calculation method to evaluate the indexing. The CI value for each collected point indicates the degree of indexing certainty of that point’s orientation calculation. The possible values of CI range from 0 to 1, with 0 being the least robust solution though the indexing could still be correct. The CI value is lower if the sample surface at that point is not smooth, for example, due to poor polishing, the material being strained, or at a grain boundary. Using the 0 value of the CI as an indicator of surface imperfection, the fraction of points with CI of 0 was calculated for each EBSD scan. For the pre-annealed control samples, the fraction of points with a CI of 0 was 29.5%. The CI(0) value fractions were substantially reduced for the electropolished samples, with 0-value fractions of 7.3%, 6.5%, and 4.6% calculated for the low, medium, and high electropolished samples, respectively. Since the area observed is identical for all four EBSD scans, with the average grain sizes within 10% of each other, it can be expected that each scan area has similar number of grain boundaries. Hence the fraction of CI being 0 decreasing with increasing electropolishing time is an indication of surface improvement. The same trend was observed with the post-annealed EBSD scans as well, with the fraction of points with CI of 0 being 6.7% for the control Cu foil and reducing to 0.8% for the high epolish scan. Plots of the


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EBSD fraction points at CI=0 for pre and post-annealed samples at each electropolishing period is shown in Figure S3. Figure 3 shows the color coded EBSD inverse pole figure maps showing the microstructure, including the grain size and shape, as well as the orientation of each grain based on the standard stereographic triangle key in the upper right. In the lower right, the amount of texture is depicted with the inverse pole figure triangle for the corresponding EBSD scan. All samples showed a high frequency of observation of the [001] normal orientation as shown in the maximum red color in the multiples of random distribution scale. (If the maximum value is 3.498, then that indicates that the red orientation is observed 3.498 times more than random, which has a value of 1.) For the annealed samples, an additional orientation of about [122] is observed and generally a higher maximum multiples of random distribution value. Therefore no significant alterations to the grain orientation or size results from electropolishing, isolating the surface roughness levels as a key determinate to subsequent 2D nanomaterial properties.


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Figure 3. Inverse pole figure maps showing the crystallographic orientation based on the standard stereographic triangle color key (top middle) and inverse pole figures showing the crystallographic orientation intensities for pre and post-annealed Cu substrates, respectively at varying surface planarization levels: (a,b) as-received Cu foils, (c,d) low electropolished Cu foil, (e,f) medium electropolished Cu foil, and (g,h) high electropolished Cu foil.

To quantify the impact of varying catalytic substrate roughness parameters on transport properties of as-produced graphene, carrier mobility versus carrier concentration measurements were carried out. RAMAN analysis demonstrates predominantly monolayer graphene within the local probe region measured, with an I2D/IG ratio for all samples averaging around 2.25, as shown


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in Figure 4.

Carrier mobility has been demonstrated as a reliable parameter to determine

graphene quality due to its dependence on point defects and domain boundaries. The mobility versus carrier concentration values for a universal curve of graphene samples synthesized on asreceived foils are compared with the graphene grown on multiple roughness level substrates. As shown in Figure 5, a direct relation between decreased surface roughness and improved electrical properties is found. With the 60s electropolished substrate, mobility values around 1000 cm2/Vs were measured with carrier concentration 3 to 4 times greater than control graphene. With increased polishing time the carrier density was reduced and the mobility values further increased to between 1500-2000 cm2/Vs and 2000-2500 cm2/Vs for 90s and 120s electropolished samples, respectively. For polycrystalline Cu-synthesized graphene transferred onto Si/SiO2 through a wet-transfer and measured at room temperature, the use of ultrasmooth Cu substrates in this work compares favorably to the mobility values previously reported in the 1400 ± 300 cm2/Vs range

25

.

Methodologies to further enhance mobility characteristics have been

demonstrated through multi-step post-transfer high temperature annealing processes (5750 cm2/Vs)

25

, graphene isolation/encapsulation (350x103 cm2/Vs)

26

, and suspended graphene

designs (200x103 cm2/Vs) 27. The graphene produced via the electropolishing method reported in this work could readily be applied to such approaches, potentially allowing for further mobility enhancements through these post-processing optimization routes. Additionally, the mobility improvements trends are in agreement with sheet resistance values measured previously6; where the graphene sheet resistance (Rs) values were improved to 260 ± 86.3 Ω/□, 170 ± 19.6 Ω/□, and 120 ± 13.1 Ω/□ for the 60s, 90s, and 120s EP growth foils, respectively, from a measured control Rs of 647.1 ± 102.4 Ω/□. The improved graphene sheet resistance properties achieved on highly planarized Cu substrates yields values similar to ITO and exceeds graphene properties recently


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reported

28-29

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. Compared to control graphene and previously reported results, the ultrasmooth

catalytic substrates, with a 100-fold reduction in surface roughness, display a marked increase in electrical performance and validate the efficacy of the enhanced planarization levels.

Figure 4. RAMAN spectra of graphene grown on control and electropolished copper substrates.


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Figure 5. Mobility versus carrier density plot of graphene synthesized at 1050°°C on low (blue circle), medium (green square), and high (pink triangle) electropolished substrates. Graphene grown on high electropolished substrates grown at 950°°C (red diamond) yield similar properties to control graphene growth at 1050°°C.

The improved carrier mobilities demonstrated in the ultrasmooth Cu foils strongly correlates with the decrease in surface roughness. It is hypothesized that the reduced magnitude of surface features/steps in the Cu foil results in both a lowered nucleation density during the graphene growth process 8, ultimately resulting in the growth of larger single crystal graphene domains, and a reduction in the amount of graphene wrinkles created during the growth/transfer process 30. Wrinkle formation is the result mechanical strain induced due to the thermal expansion mismatch between the graphene and growth substrate

31

, with a direct link between increased surface

morphology/roughness and elevated wrinkle density being reported

32

.

The reduction of surface

wrinkles resulting from the highly planarized substrates could increase carrier mobilities through multiple mechanisms, including the reduction of charge carrier barriers inherent wrinkling 33 and the reduced trapping of impurities within the produced wrinkles that can act as dopants/scatterers


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. Trapping of airborne contaminants, such as O2, have been shown responsible for elevated p-

doping of graphene samples in ambient conditions, with single layer graphene shown to have enhanced sensitivity to dopants

34

. The quantity of such charge traps emerges in the transport

properties through an inverse asymptotic relationship between mobility and carrier density

35

.

The transport properties shown in Figure 5 reveals a p-doping trend among the electropolished samples with graphene grown at 1050°C, suggesting that increasing Cu planarization levels results in a reduced graphene affinity to trap contaminants. Additionally, it should be noted that the p-doping behavior is apparent across the multitude of prepared control samples (>10 independent samples), with a lower apparent direct point than the trend shown with planarized growth substrates. Further study is required to isolate the precise dopant trapping mechanism, however a clear correlation between a decrease in p-doping behavior with increasing Cu planarization levels is shown. Adding to the beneficial nature of highly planarized substrates, it was found that increased Cu smoothness allowed for the growth of high-quality graphene at reduced temperature of 950°C, versus standard 1050°C, that yielded equivalent electrical properties of standard graphene grown at 1050°C. The ability to reduce the processing temperature and maintain high quality graphene synthesis is a key step to facilitating further scale-up of 2D nanomaterial production.

CONCLUSION In summary, we demonstrated the role of ultra-smooth Cu growth surface morphologies towards the improvement of graphene quality in terms of improved carrier mobility. A systematic approach to evaluate the impact of 10-fold and 100-fold reductions in surface roughness over control foils verified a direct trend of improved graphene quality with lowered growth substrate


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roughness. A direct trend of increase graphene carrier mobility with increased growth substrate planarization is demonstrated, which yields over up to a 125% improvement in carrier mobility over control. Beyond direct improvements in graphene functional properties, the ultra-smooth foils also present the opportunity to lower growth processing temperatures while maintaining material properties equivalent to graphene grown on control foils at standard processing temperatures.

These results present new opportunities to optimize graphene’s electrical

properties and further industrialize scalability with lowered growth temperatures.


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AUTHOR INFORMATION Corresponding Author * Email: [email protected] Author Contributions The manuscript was written through contributions of all authors. All authors have given approval to the final version of the manuscript. Funding Sources This IBM efforts on this work was supported through the DARPA Open Manufacturing Program, Contract No. HR0011-12-C-0038.

Supporting Information The Supporting Information is available free of charge on the ACS Publications website at DOI: xxxx. Electropolishing polarization curve (S1), Roughness versus electropolishing plot (S2), EBSD fraction of points at CI=0 for pre and post-annealed Cu foils at select electropolishing timepoints (S3).

ACKNOWLEDGMENT We thank Dr. Eric Wetzel, Dr. Kris Behler, Dr. Emil Sandoz-Rosada, Dr. Rad Balu, and Dr. Ross Sausa for helpful discussions on the preparation/analysis of Cu foils and dynamics of graphene nucleation/growth.


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ABBREVIATIONS AFM, Atomic Force Microscopy; CI, Confidence Index; CMP, Chemical Mechanical Polishing; Cu, Copper; EBSD, Electron Backscattering Diffraction; EP, Electropolish; ITO, Indium Tin Oxide; XPS, X-ray photoelectron spectroscopy


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“For Table of Contents Use Only”

Enhanced Quality CVD-Grown Graphene via a Double-Plateau Copper Surface Planarization Methodology Mark H. Griep1*, Travis M. Tumlin1, Joshua T. Smith2, Satoshi Oida2, Tomoko Sano1, Derek Demaree1, and Christos Dimitrakopoulos3 1

U.S. Army Research Laboratory, 4600 Deer Creek Loop, APG, MD 21005. IBM T.J. Watson Research Center, 1101 Kitchawan Rd., Yorktown Heights, NY 10598. 3 Department of Chemical Engineering, University of Massachusetts Amherst, MA 01003. 2

TOC Graphic

TOC Synopsis The influence of CVD growth substrate morphology towards as-synthesized graphene electrical properties is explored through this work.

It is demonstrated that ultra-smooth Cu growth

substrates yield a substantial improvement in graphene transport properties, with a direct correlation between Cu surface roughness levels and subsequent graphene carrier mobility values being shown.


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Enhanced Quality CVD-Grown Graphene via a ... - ACS Publications

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