NANO LETTERS
Fabrication of Large Number Density Platinum Nanowire Arrays by Size Reduction Lithography and Nanoimprint Lithography
2005 Vol. 5, No. 4 745-748
X.-M. Yan,† S. Kwon,‡ A. M. Contreras,† J. Bokor,‡,§ and G. A. Somorjai*,†,| Department of Chemistry, UniVersity of California, Berkeley, California 94720, The Molecular Foundry, Lawrence Berkeley National Laboratory, Berkeley, California 94720, Department of Electrical Engineering and Computer Science, UniVersity of California, Berkeley, California 94720, Materials Science DiVision, Lawrence Berkeley National Laboratory, Berkeley, California 94720 Received February 3, 2005; Revised Manuscript Received February 28, 2005
ABSTRACT Large number density Pt nanowires with typical dimensions of 12 µm × 20 nm × 5 nm (length × width × height) are fabricated on planar oxide supports. First sub-20 nm single crystalline silicon nanowires are fabricated by size reduction lithography, and then the Si nanowire pattern is replicated to produce a large number of Pt nanowires by nanoimprint lithography. The width and height of the Pt nanowires are uniform and are controlled with nanometer precision. The nanowire number density is 4 × 104 cm-1, resulting in a Pt surface area larger than 2 cm2 on a 5 × 5 cm2 oxide substrate. Bimodal nanowires with different width have been generated by using a Pt shadow deposition technique. Using this technique, alternating 10 and 19 nm wide nanowires are produced.
One-dimensional (1D) nanostructure materials, including metal nanowires, have drawn considerable attention from both scientific and engineering communities in the past decade. These structures have very unique physical and chemical properties originating from their small size and large surface-to-volume ratio.1,2 They are expected to play an important role in the fabrication of nanoscale electronic and optical and mechanical devices, as well as finding use in scientific investigation of quantized and localized effects as modal systems.3-8 To fulfill the expectations, there is great motivation to synthesize or fabricate the 1D nanostructures with well-controlled dimensions, morphology, phase purity, chemical composition, and patterns. The routes of making nanowires can be roughly divided into two approaches: chemical synthesis and nanofabrication. The methodology of the chemical syntheses has been comprehensively reviewed by Xia and Yang.9 The major challenge with the chemical syntheses is how to place and align the resultant nanowires to desired configurations or patterns. As opposed to chemical methods, nanofabrication techniques, such as electron-beam (EB)10 or focused-ion* Corresponding author:
[email protected]. † Department of Chemistry, U.C., Berkeley. ‡ The Molecular Foundry, LBNL. § Department of Electrical Engineering and Computer Science, U.C., Berkeley. | Materials Science Division, LBNL. 10.1021/nl050228q CCC: $30.25 Published on Web 03/09/2005
© 2005 American Chemical Society
beam (FIB)11 writing, proximal probe patterning,12 and X-ray13 or extreme-UV lithography,14,15 suffer from highcost, low-throughput, and large dimensions rather than placement and alignment. With the maturation of nanoimprint lithography (NIL),16,17 features as small as sub-10 nm on molds as large as 150 mm diameter wafers can be replicated precisely and fast, and the cost of nanofabrication is significantly decreased and its throughput is greatly increased. A reliable mold with desired structures is the starting point of NIL. Most molds with sub-100 nm features have been fabricated by EB writing. Thus searching for a cheaper and faster method to generate nanostructure molds is necessary. In this letter we demonstrate the ability to parallel fabricate Pt nanowires on planar oxide surfaces by combining sublithographic nanofabrication18 and nanoimprint technology.16,17 The dimensions of the nanowires are uniform and controllable with nanometer precision. The typical size of a single Pt nanowire is 12 µm × 20 nm × 5 nm (length × width × height). On a 5 × 5 cm2 substrate this is equivalent to 8 × 108 nanowires. The resultant total exposed metal surface area is larger than 2 cm2. Large metal surface areas are often desired in the fabrication of sensors, adsorbents, and catalysts. We have also fabricated bimodal nanowires with different width by using a Pt shadow deposition technique.
Figure 1. (a) Schematic drawing of the size reduction lithography process. (b and c) SEM top and cross-section views of the final nanostructures, which are used as an imprint mold. The Si wire mold has features 16 nm wide and 110 nm high with 250-nm pitch. The green bar is 100 nm.
Fabrication of a Single Crystalline Si Mold by Size Reduction Lithography (SRL). A detailed description of SRL can be found else where.19,20 The scheme of SRL is given in Figure 1. A 50-nm hard mask oxide is thermally grown on a Si(100) wafer. A 120-nm polysilicon film is deposited on the hard mask oxide by low-pressure chemical vapor deposition (LPCVD) of silane. The polysilicon serves as a sacrificial layer to support and hold the sidewall spacers. It is then patterned by deep UV lithography and plasma reactive ion etching (RIE) to form a 0.25-µm wide × 12µm long polysilicon line pattern with 0.25-µm spacing between lines. A 10-nm thick high-temperature oxide (HTO) 746
film is conformally deposited on both the top and sidewall of patterned polysilicon by the LPCVD of SiH2Cl2 and N2O. After the HTO is etched back anisotropically by CF4 plasma, the polysilicon is exposed and removed by HBr plasma etching. 10-nm sidewall oxide spacers are left and serve as an etching mask to pattern the underlying crystalline silicon. These relatively tall HTO spacers are transferred to the hard mask thermal oxide by CF4 plasma. Continuously, the crystalline silicon is anisotropically etched by Cl2-based plasma. The residual thermal oxide mask is removed by buffered HF wet etching. Further size reduction of the silicon wires can be achieved by thermal oxidation.20,21 The principle of the SRL is based on the fact that material deposited during low-pressure chemical vapor deposition covers the step edge as well as the top of the step, known as conformal deposition. In contrast, plasma etching is an anisotropic technique, removing materials preferentially in the direction perpendicular to the surface. Therefore, by depositing a material that has a different etching rate than the sacrificial layer and directionally etching the material on the top of the step, the sacrificial layer can be removed selectively, leaving only the material deposited on the sacrificial structure sidewall. Thus the feature size generated is determined by the thickness of the deposited material, not by the photolithography, but the pattern pitch is determined by the minimum pattern obtainable with photolithography. Because the thickness of the deposited film can be controlled to 10-nm or less with high precision, this method is capable of generating nanopatterns far smaller than possible by optical lithography. In this way we have batch-fabricated sub-20 nm Si wires from 250-nm patterns generated by DUV photolithography (Figure 1b and 1c). Fabrication of Pt Wires by Nanoimprint Lithography. The single crystalline Si nanowire structures fabricated by SRL are used as a mold for producing high surface area Pt wires by nanoimprint lithography. The process flow for nanoimprint patterning is show in Figure 2a. A thin film of PMMA is spin-cast on a desired oxide surface. PMMA (M.W. ) 15 000) is dissolved in toluene at room temperature and kept in the solvent for 24 h to ensure full solution. Before use, the solution is filtered by a 0.2 µm PTFE filter and ultrasonicated for 3 h to rid the solution of any dissolved gas. The film thickness is controlled by both the PMMA concentration and spin rate. A typical 160-nm thick film is obtained under conditions of 8wt % and 5600 rpm. Immediately after a film is spin-cast, it is baked at 150 °C for 5 min to evaporate all residual solvent from the polymer layer. It is then cut to the size of the Si mold. To separate the as-imprinted substrate and mold, the surface of the Si mold is functionalized by tridecafluoro1,1,2,2-tetrahydrooctyl-1-trichlorosilane (FTS) to form a fluorine-terminated self-assembled monolayer (SAM) before use. To form the SAM, the mold is first cleaned in piranha (98% H2SO4 + 30% H2O2) at 120 °C to remove the organic contaminants, during which a thin layer of surface oxide and silanol groups form. Then the cleaned mold is transferred into an oven filled with 2 mTorr FTS at 90 °C. A functionalized surface is produced within 300 s. FunctionNano Lett., Vol. 5, No. 4, 2005
Figure 2. (a) Scheme of imprint process. (b) SEM top-view of the negative nanostuctures in PMMA resist as imprinted. The trench width (18 nm) is a little larger than the original mold width (16 nm). (c-e) SEM top view of the Pt nanowires with different widths (20, 26, and 40 nm). The wire height can be easily controlled by deposited Pt thickness. The green bars are 300 nm.
alizing the surface lowers the surface energy in comparison with the PMMA substrate, therefore facilitating moldsubstrate separation after imprinting. Water contact angle measurements show a contact angle larger than 105° after the SAM deposition. Finally the substrate and the mold, covered by PMMA and FTS respectively, are brought into close contact. Up to this step, all processes are performed in a class-100 clean room environment to avoid possible dust contamination, which may ruin the conformal contact between the substrate and the mold. The samples are imprinted under 4000 PSI at 120 °C for 300 s using a homemade press.21 The imprint cell (Φ ) 64 mm) is heated resistively from room temperature to the imprinting temperature at ramp rate 2 °C/min. The cell is vacuum-pumped by a mechanical pump to remove the vapors that the sample outgasses during heating and pressing. After the imprint, the sample is air cooled to room temperature under pressure, and the substrate and mold are manually separated. The top-view SEM image of an imprinted PMMA film is shown in Figure 2b. The width of the trenches is about 2 nm larger than the dimension of the original Si wires. We believe that the broadening is not the result of the imprinting process but the FTS SAM cover layer. Cross-sectional SEM (not shown) of the as-imprinted sample shows that there is still residual PMMA at the bottom of the imprinted trenches, which is eliminated by O2 plasma. Due to an isotropic contribution to the PMMA etching, i.e., the etching is not perfectly perpendicular to the substrate, the trench width in the PMMA is increased by a few nm. The broadening caused by the isotropic etching can also be utilized to produce Nano Lett., Vol. 5, No. 4, 2005
Figure 3. (a) Scheme of fabricating bimodal nanowires. A nanowire mold with large height difference at both sides of the wires is used to generate the different height PMMA terraces. One edge of the lower terraces is NOT covered by silica during the angle deposition due to the shadow effect of the higher terraces (highlighted by a circle). During O2 plasma breakthrough, PMMA covered by a silica mask remains intact but the exposed PMMA is etched away anisotropically such that trenches with different widths are formed as a Pt deposition template. Refer to Figure 2a for deposition and lift-off details. (b) SEM cross-section of a high step difference mold. See Figure 1a and text for fabrication details. (c) SEM of 10(0.4 and 19(0.5 nm alternative bimodal Pt nanowires. The inset at the right upper corner is a high magnification image of the bimodal wires. All green bars are 200 nm.
different width Pt wires, and even bimodal size distribution wires (see Figure 3 for details). After the residual PMMA is removed, platinum is deposited at a rate of 0.1 nm/s by e-beam evaporation, which has a collimation of approximate 5 mrad. The Pt that is in contact with PMMA only is lifted off by acetone assisted with ultrasonication as shown in Figure 2a, and the Pt directly contacting silica forms nanowires (Figure 2b to 2e). The width of Pt wires is controlled by the initial silicon wire width in Figure 2, and the control can also be realized simply by the isotropic etching effect during O2 plasma breakthrough of PMMA. The height of Pt is controlled by the thickness of deposited Pt, which is monitored in situ by a crystal oscillator and calibrated by atomic force microscopy (not shown). The upper limit is quarter of the depth of the imprinted PMMA trenches (25 nm). A Pt film thicker than the given number will cause difficulties during the lift-off. The lower limit of the wire height is determined by the sensitivity of the crystal oscillator (0.1 nm), which gives a submonolayer Pt film. The scheme to fabricate bimodal wires is shown in Figure 3a. During the HTO etch back step, thermal oxide is overetched by CF4, resulting in different thickness oxide at the two sides of the HTO sidewall. The difference is magnified more by using less selective Cl2 (1:10 of oxide to Si) rather than HBr plasma (1:400 of oxide to Si) during the sacrificial poly-Si etch away step. Thus, a mold with high step difference between the two sides of the wires is formed (Figure 3b). An imprinted PMMA film has the negative 747
patterns of the mold so the step surface is formed. Deposition of silica, which serves as a hard mask for O2 plasma breakthrough of PMMA, is performed onto the step surface with incident angle 30 degrees with respect to surface normal of the sample (Figure 3a). Because of the shadow effect of the higher terraces, one edge of the lower terraces cannot be covered by silica and the PMMA underneath is eliminated by O2 plasma. However, the other edge is protected by silica and remains intact during PMMA breakthrough etching. Shown in Figure 3c, alternative 10(0.4 and 19(0.5 nm Pt wires are generated on silica using the shadow deposition method, giving a very sharp bimodal size distribution. The narrow nanowires have a width (10-nm) smaller than that of the Si wires (15-nm) of the mold, showing that the silica mask is deposited on both the top and the sidewall of the PMMA. The sidewall deposition raises the possibility of reducing the Pt wire width further by utilizing the shadow deposition to shrink the imprinted trench width in PMMA. These fabrication techniques have no restriction on the nature of the nanowire and substrate materials. Material alteration is straightforward, so the techniques can be used for other metals and other supports. Pt nanowires with the same dimensions have also been produced on alumina, zirconia, and ceria surfaces, which may be used as catalysts. The nanowires can also be used as chemical sensors or biosensors because the surface charge is comparable to the bulk charge in such narrow wires.3,22 The bimodal nanowires can be used as bifunctional materials either directly, such as bifunctional catalysts, or by providing different local chemical environments by adsorbing different adsorbates selectively. Summary. We have demonstrated the capability to fabricate Pt nanowires on a large planar silica surface (5 × 5 cm2) by combining size reduction lithography, nanoimprint lithography, and e-beam deposition techniques. The wire height and width are precisely controlled in the range of 1-25 nm and 20-40 nm, respectively. Bimodal nanowires can also be fabricated by using high-step mold imprint and angle deposition. This technique is capable of producing of high number density nanowires of any metal, and the oxide support can be varied as well.
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Acknowledgment. We would like to thank Dr. Ji Zhu of Lam Research Corporation and Dr. J. Grunes of Intel Corporation for their contributions to this work. This work was supported by the Director, Office of Science, Office of Basic Sciences, Chemical and Materials Sciences Divisions, of U.S. Department of Energy under Contract No. DE-AC0376SF00098. The authors wish to thank the Molecular Foundry at Lawrence Berkeley National Laboratory for fabrication support. References (1) Ruecks, T.; Kim, K.; Joselevich, E.; Tseng, G. Y.; Cheung, C.; Lieber, C. M. Science 2000, 289, 94. (2) Huang, M. H.; Mao, S.; Feick, H.; Yan, H.; Wu, Y.; Kind, H.; Weber, E.; Russo, R.; Yang, P. Science 2001, 292, 1897. (3) Cui, Y.; Wei, Q. Q.; Park, H. K.; Lieber, C. M. Science 2001, 293, 1289. (4) Krans, J. M.; van Rutenbeek, J. M.; Fisun, V. V.; Yanson, I. K.; de Johgh, L. J. Nature 1995, 375, 767. (5) Likharev, K. K.; Claeson, T. Sci. Am. 1992, June, 80. (6) Bockrath, M.; Liang, W.; Bozovic, D.; Hafner, J. H.; Lieber, C. M.; Tinkham, M.; Park, H. Science 2001, 291, 283. (7) Hu, J. T.; Odom, T. W.; Lieber, C. M. Acc. Chem. Res. 1999, 32, 435. (8) Valden, M.; Lai, X.; Goodman, D. W. Science 1998, 281, 1647. (9) Xia, Y.; Yang, P.; Sun, Y.; Wu, Y.; Mayers, B.; Gates, B.; Yin, Y.; Kim, F.; Yan, H. AdV. Mater. 2003, 15, 353. (10) Saitou, N. Int. J. Jpn. Soc. Prec. Eng. 1996, 30, 107. (11) S. Matsui, Y. Ochiai, Nanotechnology 1996, 7, 247. (12) Wouters, D.; Schubert, U. S. Angew. Chem., Int. Ed. 2004, 43, 2480. (13) Tandon, U. S.; Pant, B. D.; Kumar, A. Vacuum 1991, 42, 1219. (14) Cardinale, G. F.; Henderson, C. C.; Goldsmith. J. E. M.; Mangat, P. J. S.; Cobb, J.; Hector, S. D. J. Vac. Sci. Technol. B 1999, 17, 2970. (15) Fay, B. Microelectron. Eng. 2002, 61-2, 11. (16) Chou, S. Y.; Krauss, P. R.; Renstrom, P. J. Science 1996, 272, 85. (17) Guo, L. J. J. Phys. D: Appl. Phys. 2004, 37, R123-R141. (18) Gates, B. D.; Xu, Q.; Love, J. C.; Wolfe, D. B.; Whitesides, G. M. Annu. ReV. Mater. Res. 2004, 34, 339. (19) Choi, Y. K.; Lee, J. S.; Zhu, J.; Somorjai, G. A.; Lee, L. P.; Bokor, J. J. Vac. Sci. Technol. B 2003, 21, 2951. (20) Choi, Y. K.; Zhu, J.; Grunes, J.; Bokor, J.; Somorjai, G. A. J. Phys. Chem. B 2003, 107, 3340. (21) Zhu, J. Fabrication, Characterization and Reaction Studies of Nanofabricated Platinum Model Catalysts; Ph.D. Dissertation, University of California at Berkeley, 2003. (22) Kolmakov, A.; Moskovits, M. Annu. ReV. Mater. Res. 2004, 34, 151.
NL050228Q
Nano Lett., Vol. 5, No. 4, 2005
