NANO LETTERS
Fabrication of Metallic Nanodots in Large-Area Arrays by Mold-to-Mold Cross Imprinting (MTMCI)
2005 Vol. 5, No. 12 2557-2562
Sunghoon Kwon,† Xiaoming Yan,‡ Anthony M. Contreras,‡ J. Alexander Liddle,† Gabor A. Somorjai,‡,| and Jeffrey Bokor*,†,§ The Molecular Foundry, Lawrence Berkeley National Laboratory, Berkeley, California 94720, Department of Chemistry and Department of Electrical Engineering and Computer Science, UniVersity of California, Berkeley, California 94720, and Materials Science DiVision, Lawrence Berkeley National Laboratory, Berkeley, California 94720 Received September 29, 2005; Revised Manuscript Received November 3, 2005
ABSTRACT We have developed a mold-to-mold cross imprint (MTMCI) process, which redefines an imprint mold with another imprint mold. By performing MTMCI on two identical imprint molds with silicon spacer nanowires in a perpendicular arrangement, we fabricated a large array of sub-30-nm silicon nanopillars. Large-area arrays of Pt dots are then produced using nanoimprint lithography with the silicon nanopillar mold.
Recently, great effort has been expended to develop facile and reliable techniques to fabricate periodic nanostructures because of their potential impacts on data storage,1-3 photonic crystals,4,5 biological sensors6-8 and model catalysts.9 Electron beam lithography (EBL)10 and focused ion beam lithography (FIB)11 are the most common techniques used to fabricate sub-50-nm patterns, but their low throughput limits their application, especially when large-area patterning is required. Thus, unconventional lithographic methods for producing periodic nanostructures with high densities, large areas, and small feature sizes are being pursued actively.12-16 Nanoimprint lithography (NIL)17 is a very promising alternative because it can replicate nanoscale features with reasonable cost and throughput. State-of-the-art NIL can even replicate the features of a mold with sub-10-nm resolution. However, the technology is still fundamentally dependent on a primary pattern generation technique, such as electron or ion-beam lithography, to generate the template. Recently, a residual conformal film on the edge of a photolithographically defined pattern (a so-called “spacer”) has been used to generate nanoscale line features, with a line width that is controlled accurately by the deposited film thickness.18,19 These nanoscale line patterns generated by this technique, termed spacer lithography, were originally de* Corresponding author. E-mail:
[email protected]. † The Molecular Foundry, Lawrence Berkeley National Laboratory. ‡ Department of Chemistry, University of California, Berkeley. § Department of Electrical Engineering and Computer Science, University of California, Berkeley. | Materials Science Division, Lawrence Berkeley National Laboratory. 10.1021/nl051932+ CCC: $30.25 Published on Web 11/11/2005
© 2005 American Chemical Society
veloped to fabricate nanotransistors. This approach was adapted quickly to produce an imprint mold for metal nanowires.20 The spacer technique enables the batch fabrication of sub-20-nm line features over wafer-scale areas using conventional optical lithography with high throughput. Note that spacer lithography is not throughput-limited in the way that high-resolution serial patterning methods such as EBL or FIB are because of its use of optical lithography, which is a parallel process. Multiple iterations of the spacer process (size-reduction lithography) enable the fabrication of features with a pitch far less than that of the initial photolithography.18,19 However, these techniques are limited to fabricate closed-loop-shaped line patterns. In particular, discrete dot patterns cannot be produced because spacers are formed along the sidewalls of the original features. In this letter, we report a complete parallel process for making an imprint mold with sub-30-nm periodic dot structures by combining spacer lithography and NIL. The silicon nanowires formed using spacer lithography are converted into silicon nanopillars by our newly developed mold-to-mold cross imprint (MTMCI) process. The resulting silicon nanopillars with dimensions of 15 × 30 × 100 nm (length × width × height) are then used as an imprinting mold, and Pt nanodot patterns have been replicated from the Si pillars to Pt dots on SiO2, which could serve as two-dimensional model catalysts.21,22 Fabrication of a Single-Crystal Si Wire Mold by Spacer Lithography. Silicon nanowire molds were fabricated at wafer scale by spacer lithography. The process is shown
Figure 1. Spacer nanowire mold. (a) Schematic of spacer fabrication process. The sublithographic width is determined by the deposited film thickness, whereas the pitch of the array is set by the initial optical lithography. (b) Top view of 15-nm-wide spacer nanowires (top) and a cross-section view of the spacer nanowires (bottom). The fabricated nanowires have dimensions of 15 nm × 100 nm × 12 µm (width × height × length) and pitches of 250 nm.
schematically in Figure 1a. Details of the fabrication process can be found elsewhere.19 In our experiment, optical deepUV lithography (DUVL) was used to form the initial polysilicon line patterns with widths of 250 nm, lengths of 12 µm, and thicknesses of 120 nm. A 10-nm-thick silicon dioxide film was deposited conformally by low-pressure chemical vapor deposition (LPCVD). Directional blank etching of the silicon dioxide film removes the film on the horizontal surface to leave residual silicon dioxide spacer nanowires on the sidewalls of the original polysilicon features. Silicon dioxide nanowires were formed by selective removal of the polysilicon using reactive ion etching (RIE). 2558
Then the silicon dioxide nanowire pattern was transferred into the silicon substrate to form silicon nanowires. Note that the width of the silicon nanowire pattern is determined by the thickness of the conformal silicon dioxide layer, whereas the pitch of the silicon nanowire is determined by the initial line width of the optical lithography. Because the thickness of the deposited film can be controlled to 10 nm or less with high precision, this method permits the generation of nanopatterns far smaller than possible by optical lithography. In this way, we have batch-fabricated high aspect ratio sub-20-nm Si wires from 250-nm patterns generated by DUV optical photolithography (Figure 1b and c). The Nano Lett., Vol. 5, No. 12, 2005
nanowires have the dimensions of 15 nm × 100 nm × 12 µm (width × height × length). Fabrication of a Single-Crystalline Si Nanopillar Mold by Mold-to-Mold Cross Imprint (MTMCI). To fabricate a large-area silicon nanopillar mold, we have developed the mold-to-mold cross imprint (MTMCI) technique, which converts the silicon spacer nanowires into silicon nanopillars. The concept is to further pattern a silicon spacer nanowire mold with another spacer nanowire mold by imprinting one mold placed perpendicular onto the other. The principle difference between MTMCI and conventional NIL is that the substrates for this imprinting is not flat and will eventually be processed further to become a mold for the second imprint. The MTMCI fabrication process is shown in Figure 2a. First, the two silicon spacer nanowire molds with the dimensions of 15 nm × 100 nm × 12 µm (width × height × length) are prepared. One is a bottom mold and the other is a top mold as named in Figure 2a. A 320-nm-thick film of PMMA is spin-cast on the bottom mold. PMMA (MW ) 15 k) is dissolved in toluene at room temperature for 24 h. Before use, the solution is filtered by a 0.2-µm PTFE filter and ultrasonicated for 3 h to remove any dissolved gas in the solution. The film thickness is controlled by both the PMMA concentration and spin rate. A typical 320-nm-thick film is obtained under conditions of 8 wt % and 1500 rpm. Immediately after a film is spin-cast, it is baked at 150 °C for 5 min. The PMMA thickness should be at least twice as large as the height of the spacer nanowire to cover the surface topography of the bottom mold and prevent mechanical damage of the wires during the imprint process. Thicker PMMA films can be used to improve the imprint uniformity, but at the cost of a more difficult breakthrough etch. The top silicon mold is coated with tridecafluoro-1,1,2,2tetrahydrooctyl-1-trichlorosilane (FTS) to form a fluorineterminated self-assembled monolayer (SAM) on the surface. To form the SAM layer, the mold is first cleaned in piranha solution (a 7:3 mixture of 98% H2SO4 and 30% H2O2) at 120 °C to remove the organic contaminants and to form a thin layer of surface oxide and silanol groups on the mold surface. Then the clean mold is transferred into an oven filled with 2 mTorr FTS at 90 °C for 200 s. Functionalizing the surface lowers the surface energy in comparison with the PMMA substrate, thereby facilitating the separation of top mold from the PMMA after imprinting. Next, the top mold and the bottom mold, coated with PMMA and FTS, respectively, are aligned so that the nanowire patterns in each mold are perpendicular to each other. Up to this step, all processes are performed in a class100 clean room environment to avoid possible dust contamination, which may ruin the conformal contact between the molds. The wire patterns in the top mold are crossimprinted into the PMMA layer on the bottom mold to form narrow trenches. The samples are imprinted under 4000 PSI at 120 °C for 300 s using a homemade press.23 The imprint chamber with a diameter of 64 mm is heated resistively from room temperature to the imprinting temperature at a ramp rate of 2 °C/min. The cell is vacuum-pumped to remove the Nano Lett., Vol. 5, No. 12, 2005
vapors that the sample releases during heating and pressing. After the imprint, the sample is air cooled to room temperature under pressure, and the substrate and mold are separated manually. Because the top mold is coated by FTS, the patterned PMMA is left on the bottom nanowire mold. In this way, PMMA nanotrenches are formed on top of and perpendicular to the silicon nanowires of the bottom mold. After separating the two molds, the residual PMMA layer at the bottom of the imprinted trenches is subjected to a breakthrough etch to expose a portion of the underlying Si nanowires. There is an isotropic component to the PMMA etching, which leads to an increase of the trench width in the PMMA and thus affects the final feature sizes of the pillars. In addition, aspect-ratio-dependent etching effects cause the etch rate at the PMMA top surface to be higher than that at the bottom of the trench. To minimize the broadening during the breakthrough etching and protect the top surface of PMMA, a 10-nm-thick chromium layer is evaporated with an angle of 45° with respect to the surface normal. This angled evaporation enables us to coat selectively the top surface of the PMMA while leaving the bottom of the PMMA trenches unaffected. Breakthrough etching is performed with an O2 plasma at -100 °C. The cryo-cooling minimizes the isotropic component of the etch and reduces trench broadening. The top-view and cross-section SEM images of imprinted PMMA trenches are shown in Figure 2b. The PMMA trenches are perpendicular to the bottom silicon nanowires so that only a small portion of them is exposed. This exposed region is where the silicon nanopillar will eventually be formed. A layer of 10-nm-thick chromium is deposited by e-beam evaporation through the PMMA trenches onto the Si nanowires exposed by breakthrough etching. After lift-off of the PMMA in dichloromethane with ultrasonication, chromium nanowires anchored on the exposed part of the silicon nanowires are made. The chromium nanowires are perpendicular to the silicon spacer nanowires as shown in Figure 2c. The chromium nanowires are wider than the original silicon spacers on the top mold because of the trench broadening that occurs during the breakthrough etching and FTS coating. Finally, the silicon nanopillars are formed at the intersection of the silicon and chromium nanowires by etching the silicon using the chromium nanowire as an etch mask. The resulting silicon nanopillar mold is shown in Figure 2d. The final rectangular silicon nanopillars are 100-nm high with a top-view dimension of 15 ( 0.5 nm by 30 ( 2.3 nm. The pitch of the nanopillars is 250 nm, and areas of 25 cm2 are patterned uniformly. The MTMCI process described above produced a new mold with a dot pattern, a binary AND of the two original molds. In other words, the nanowire pattern in the original mold is converted to a nanopillar pattern. In addition, a new mold with a dashed line pattern, a binary XOR of the two original molds, can also be generated by using the imprinted PMMA trench as an etch mask for silicon instead of a liftoff mask (see Figure 3b). Although this technique was originally envisioned as a method for producing regular 2559
Figure 2. Mold-to-mold cross imprint (MTMCI). (a) Schematic of the MTMCI process for converting nanowires into nanopillars. A silicon spacer nanowire mold is redefined with another spacer nanowire mold by imprinting one mold onto the other. (b) SEM top view (left) and cross section view (right) of the PMMA trenches on the bottom mold after imprinting. The PMMA trenches are perpendicular to the bottom silicon nanowires; therefore, only a small portion of bottom silicon nanowire is exposed. This exposed pattern will become silicon nanopillars eventually. (c) SEM images of the chromium nanowires anchored on the exposed part of the silicon nanowires. The chromium nanowires are perpendicular to the silicon spacer nanowires, thus making a grid pattern together with the underlying silicon nanowires. The chromium nanowires are wider than the silicon nanowires because of the trench widening during the PMMA breakthrough etching. (d) Top view (top) and angled view (bottom) of the silicon nanopillars. Uniform silicon nanopillars are formed at the intersections of the silicon and chromium nanowires shown in c. The nanopillars are on top of the nanogrids, making two vertical levels in the mold. 2560
Nano Lett., Vol. 5, No. 12, 2005
Figure 3. Imprinting of Pt nanodots. (a) Schematic of nanoimprint process for Pt dot formation. The silicon nanopillar mold from MTMCI is used as an imprint mold. (b) Imprinted hole pattern in PMMA when the PMMA resistor layer is thinner (left) or thicker (right) than the height of the silicon nanopillars. The latter has been used for Pt dot generation practically to prevent mechanical breakage of the mold. (c) Sub-30-nm Pt dots on the oxide surface after lift-off. Uniform Pt dot arrays are produced over a large area of 25 cm2.
arrays of nanoscale features, it is clear that the features produced by the initial lithographic step are not required to be regular. In addition, substantial variations in dot size are possible by appropriately choosing the thickness of the spacer. Pitches can be reduced further by means of sizereduction lithography.18,19 Variation in feature size and spacing can be introduced at this level, again through appropriate choice of spacer and sacrificial layer thicknesses. Imprinting of Pt Nanodots. Once the silicon nanopillar mold is fabricated by MTMCI, one can pattern various metal nanodots over a large area easily using the silicon nanopillars as a NIL mold. As a demonstration, Pt dots are patterned on Nano Lett., Vol. 5, No. 12, 2005
a flat oxide substrate. The silicon nanopillar mold is imprinted into a PMMA layer on silicon dioxide. Residual PMMA is removed by a breakthrough etch after deposition of a chromium hard mask by angled evaporation. Pt dots with dimensions of 15 × 30 × 5 nm (width × length × height) are patterned using e-beam evaporation and lift-off. The imprint process shown in Figure 3a is similar to that demonstrated previously for nanowire formation,20 except that the breakthrough etching step is more challenging for dot patterning. The mold has two vertical steps because the 100-nm-tall silicon nanopillar is formed on top of the 100nm-tall grid pattern. Therefore, two different PMMA patterns 2561
can be made as shown in Figure 3b. When the thickness of PMMA for imprinting is less than the height of the silicon nanopillar, only the pillar is imprinted as a hole (Figure 3b left). If the PMMA is thicker than the height of the pillars, then nanoholes in PMMA will show up at the corners of the grids (Figure 3b, right). The breakthrough etching for the former is easier than the latter because of its lower aspect ratio and thinner residual layer. Breakthrough etching for the latter is more difficult because overetching will result in a grid pattern instead of a dot pattern (one can overetch intentionally to produce the grid pattern, that is, a binary OR pattern of the two original molds). However, we used a 250-nm-thick PMMA layer in order to prevent mechanical breakage of the mold. The PMMA is 50-nm thicker than the maximum height of the features on the mold, so direct physical contact between the substrate and the mold is avoided and results in better uniformity. Imprint in this manner leads to two vertical levels of the PMMA layer because of both the silicon nanopillars and grids. Then, timed breakthrough etching is performed to expose the pillar patterns only. Large arrays of well ordered sub-30-nm Pt dots are produced, as shown in Figure 3c. These Pt nanodots will be used as model heterogeneous catalysts. Summary. We have demonstrated mold-to-mold cross imprint (MTMCI), a parallel process to fabricate sub-30nm metal dots with high throughput by combining optical, spacer, and nanoimprint lithographies. By performing MTMCI on two identical imprint molds with silicon spacer nanowires in a perpendicular arrangement, we have fabricated large arrays of sub-30-nm silicon nanopillars. We note that substantial variations in dot size and pitch are possible by appropriately choosing the thickness of the spacer and initial line width of sacrificial layers. Large-area arrays of Pt dots are then imprinted using nanoimprint lithography with the silicon nanopillar mold. The metal nanodot arrays are well ordered because of the lithographic definition of the pitches, and their dimensions are controlled precisely to sub30-nm by combination of the spacer lithography and nanoimprint. This technique is capable of producing high areal density nanodots of any metal on any surface.
2562
Acknowledgment. Work at The Molecular Foundry was supported by the Director, Office of Science, Office of Basic Energy Sciences, Materials Sciences and Engineering Division, of the U.S. Department of Energy under contract no. DE-AC02-05CH11231. We thank the CXRO Nanofabrication Laboratory at Lawrence Berkeley National Laboratory for fabrication support. References (1) Cheng, J. Y.; Ross, C. A.; Chan, V. Z. H.; Thomas, E. L.; Lammertink, R. G. H.; Vancso, G. J. AdV. Mater. 2001, 13, 1174. (2) Hehn, M.; Ounadjela, K.; Bucher, J. P.; Rousseaux, F.; Decanini, D.; Bartenlian, B.; Chappert, C. Science 1996, 272, 1782. (3) Wu, W.; Cui, B.; Sun, X. Y.; Zhang, W.; Zhunag, L.; Chou, S. Y. J. Vac. Sci. Technol., B 1998, 16, 3825. (4) Poborechii, V. V.; Tada, T.; Kanayama, T. Appl. Phys. Lett. 1999, 75, 3276. (5) Wanke, M. C.; Lehmann, O.; Muller, K.; Wen, Q. Z.; Stuke, M. Science 1997, 275, 1284. (6) Haes, A. J.; Van Duyne, R. P. J. Am. Chem. Soc. 2002, 124, 10596. (7) Lee, K. B.; Park, S. J.; Mirkin, C. A.; Smith, J. C.; Mrksich, M. Science 2002, 295, 1702. (8) Cui, Y.; Wei, Q. Q.; Park, H. K.; Lieber, C. M. Science 2001, 293, 1289. (9) Grunes, J.; Zhu, J.; Somorjai, G. A. Chem. Comm. 2003, 19, 2510. (10) Saitou, N. Int. J. Jpn. Soc. Precis. Eng. 1996, 30, 107-111. (11) Matsui, S.; Ochiai, Y. Nanotechnology 1996, 7, 247-258. (12) Fay, B. Miroelectron. Eng. 2002, 11, 61. (13) Gates, B. D.; Xu, Q.; Love, J. C.; Wolfe, D. B.; Whitesides, G. M. Annu. ReV. Mater. Res. 2004, 34, 339. (14) Younan, X.; Whitesides, G. M. Angew. Chem., Int. Ed. 1998, 37, 550. (15) Hamley, I. W. Angew. Chem., Int. Ed. 2003, 42, 1692-1712. (16) Suh, K. Y.; Choi, S.-J.; Baek, S. J.; Kim, T. W.; Langer, R. AdV. Mater. 2005, 17, 560. (17) Guo, L. J. J. Phys. D: Appl. Phys. 2004, 37, R123-R141. (18) Choi, Y. K.; Lee, J. S.; Zhu, J.; Somorjai, G. A.; Lee, L. P.; Bokor, J. J. Vac. Sci. Technol., B 2003, 21, 2951. (19) Choi, Y. K.; Zhu, J.; Grunes, J.; Bokor, J.; Somorjai, G. A. J. Phys. Chem. B 2003, 107, 3340. (20) Yan, X. M.; Kwon, S.; Contreras, A. M.; Bokor, J.; Somorjai, G. A. Nano Lett. 2005, 5, 745. (21) Contreras, A. M.; Grunes, J.; Yan, X. M.; Liddle, A.; Somorjai, G. A. Catal. Lett. 2005, 100, 115. (22) Yan, X. M.; Kwon, S.; Contreras, A. M.; Bokor, J.; Somorjai, G. A. Catal Lett., in press. (23) Zhu, J. Fabrication, Characterization and Reaction Studies of Nanofabricated Platinum Model Catalysts. Ph.D. Dissertation, University of California at Berkeley, 2003.
NL051932+
Nano Lett., Vol. 5, No. 12, 2005
