Flexible, Low-Power Thin-Film Transistors Made of Vapor-Phase

Jun 1, 2017 - ... Section, Electronics and Telecommunications Research Institute (ETRI), 218 Gajeong-ro, Yuseong-gu, Daejeon 34129, Republic of Korea...
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Flexible, Low-Power Thin-Film Transistors Made of Vapor-Phase Synthesized High‑k, Ultrathin Polymer Gate Dielectrics Junhwan Choi,† Munkyu Joo,† Hyejeong Seong,† Kwanyong Pak,† Hongkeun Park,† Chan Woo Park,‡ and Sung Gap Im*,† †

Chemical and Biomolecular Engineering and KI for NanoCentury at Korea Advanced Institute of Science and Technology (KAIST), 291 Daehak-ro, Yuseong-gu, Daejeon 34141, Republic of Korea ‡ Wearable Device Research Section, Electronics and Telecommunications Research Institute (ETRI), 218 Gajeong-ro, Yuseong-gu, Daejeon 34129, Republic of Korea S Supporting Information *

ABSTRACT: A series of high-k, ultrathin copolymer gate dielectrics were synthesized from 2-cyanoethyl acrylate (CEA) and di(ethylene glycol) divinyl ether (DEGDVE) monomers by a free radical polymerization via a one-step, vapor-phase, initiated chemical vapor deposition (iCVD) method. The chemical composition of the copolymers was systematically optimized by tuning the input ratio of the vaporized CEA and DEGDVE monomers to achieve a high dielectric constant (k) as well as excellent dielectric strength. Interestingly, DEGDVE was nonhomopolymerizable but it was able to form a copolymer with other kinds of monomers. Utilizing this interesting property of the DEGDVE cross-linker, the dielectric constant of the copolymer film could be maximized with minimum incorporation of the cross-linker moiety. To our knowledge, this is the first report on the synthesis of a cyanide-containing polymer in the vapor phase, where a high-purity polymer film with a maximized dielectric constant was achieved. The dielectric film with the optimized composition showed a dielectric constant greater than 6 and extremely low leakage current densities (106 >107

applications requiring a high level of ID, such as the driving circuit of active-matrix organic light emitting diodes (AMOLEDs).52 Beside the bottom-gated OTFTs, pC1D1 deposited by iCVD was also compatible with the top-gated IGZO TFTs because the solvent-free deposition process does not damage the underlying layers. Therefore, we could fabricate a highperformance IGZO TFT with low-voltage operation by employing a 27 nm-thick pC1D1 dielectric layer. The transfer and output characteristics are shown in Figure 4e,f, respectively. Similar to the C8-BTBT OTFTs, the IGZO TFTs could be operated within ±3 V with extremely small gate leakage current (IG). The μsat and Ion/Ioff were also above 30 cm2/V s and 107, respectively. The ideal transfer characteristic of the top-gated IGZO TFT clearly demonstrates the capability of the iCVD process to form a favorable interface with the highly sensitive surface of the oxide semiconductor. We anticipate that the interfacial compatibility of the pC1D1 layer with organic and oxide semiconductors as well as the versatility in the TFT configuration, both bottom- and top-gated geometry, can enhance the wide applicability of pC1D1 to the fabrication of various types of TFTs. Finally, tensile strain was applied to the C8-BTBT OTFTs described in Figure 4a to investigate the device flexibility. The transfer characteristics of the OTFTs bent in various radii of curvature are shown in Figure 5b compared to those of the flat, pristine devices. The variation in device parameters such as VT, μsat, and S.S. were monitored with respect to the applied tensile strain (Figure 5c). For statistical analysis, at least three devices were measured. All of the transfer characteristics clearly represent ideal TFT behavior and the IG of the devices was extremely small (less than 6.2 × 10−9 A/cm2), even with 2.1% of applied tensile strain (Figure 5b). The changes in VT and S.S. due to the applied strain up to 2.1% were also minimal. VT showed only a slight increase (−0.2 V) with 2.1% of applied strain and the fluctuation of S.S. was only in the range of ±9.0 mV/decade. However, μsat gradually decreased to 1.28 cm2/V s in response to the strain of 2.1%. The μsat decrease is most likely due to the change in intermolecular distance between the grains of the organic semiconductor, which has also been observed repeatedly in previous reports.53−55 Further, when the applied strain was fully released, μsat also recovered to its initial value (1.75 cm2/V s) (Figure S7), which also supports the observation above. The polycrystallinity of C8-BTBT rather than the failure of the gate dielectric is mainly responsible for the change in intermolecular distance of the channel layer resulting in the decrease in μsat as described in Figure S8. Note that μsat was still quite high even at 2.1% of applied strain, although it was slightly decreased compared to the initial value. This is most likely due to the long alkyl chain in the C8-BTBT organic semiconductor, which could stabilize the organic semiconductor morphology against the applied strain, as reported in a previous study.53 It is also worth mentioning that 2.1% is one of the highest values of strain applied to OTFTs without neutral plane manipulation to date.56−59 Therefore, the OTFT developed in this study is one of the

compared to that of the pCEA homopolymer. pCEA and pC1D1 films (120 nm thick) were deposited on a Si substrate and immersed in various kinds of solvents, and morphology and thickness changes were monitored by AFM and ellipsometry, respectively, as shown in Figure S6 and Table S1. pCEA was readily soluble in polar solvents such as acetone and tetrahydrofuran (THF). Severe damage to its surface morphology was also observed when the pCEA film was soaked in toluene. However, the cross-linked pC1D1 film was insoluble in all of the tested solvents and no noticeable morphological change was detected, which confirms the superior chemical stability of the cross-linked pC1D1 layers against various kinds of solvents. Such unconventionally high Ci and excellent mechanical flexibility of pC1D1 reported in this work makes it a promising candidate dielectric material for the fabrication of low-power flexible TFTs. Moreover, the outstanding mechanical and chemical stability will render the polymer compatible with postdevice fabrication steps such as solution-based processing and photolithographic patterning. 2.3. Application of pC1D1 to TFTs. To apply the high-k pC1D1 layer to TFTs, bottom-gated TFTs with p-type 2,7dioctyl[1]benzothieno[3,2-b][1]benzothiophene (C8BTBT)49,50 and top-gated TFTs with n-type indium− gallium−zinc oxide (IGZO) as active layers were fabricated with top-contact geometry, as shown in Figure 4a,d, respectively. The device parameters extracted from the transfer curve of each device are summarized in Table 2. For lowvoltage operation, 34 nm- and 27 nm-thick pC1D1 gate dielectric layers were used for the C8-BTBT and IGZO TFTs, respectively. At least three devices were measured to confirm the device-to-device uniformity. In the transfer curve of the C8BTBT OTFTs (Figure 4b), the OTFTs could reach a saturation regime with about −3 V of negative bias, and the threshold voltage (VT) was only −2 V, due to the extremely thin gate dielectric layer. It is worth noting that any hysteresis behavior that occurs frequently in many TFTs with other highk dielectric layers18,30,51 was not observed during OTFT operation. Such hysteresis-free TFT operation strongly implies that the trap density in the high-k dielectric layer is extremely low. The saturation mobility (μsat) was also quite high (>1.8 cm2/V s), which indicates that an excellent interface was formed between C8-BTBT and the high-k pC1D1 layer. In addition, the C8-BTBT TFTs with the pC1D1 dielectric layer showed extremely low variation in device parameters. The device-to-device uniformity is critically dependent upon the uniformity of the gate dielectrics across a large area. In this regard, iCVD is highly desirable due to its capability for generating ultrathin but highly uniform dielectric layers, as shown in previous reports.7,33 The subthreshold swing (S.S.) was extremely small (98.5 mV/decade) and a high on/off ratio (Ion/Ioff) larger than 106 was obtained from the C8-BTBT TFTs with the pC1D1 dielectric layer. Figure 4c shows the output characteristic of the C8-BTBT OTFTs with the pC1D1 dielectric layer. A large amount of drain current (ID) was obtained with just 3 V of applied bias, thanks to the high μsat and Ci. The high output ID achieved in the C8-BTBT TFTs makes the copolymer dielectric layer appropriate for TFT 20814

DOI: 10.1021/acsami.7b03537 ACS Appl. Mater. Interfaces 2017, 9, 20808−20817

Research Article

ACS Applied Materials & Interfaces

just 20 nm, excellent mechanical flexibility, and chemical stability against various kinds of organic solvents. Highperformance organic and oxide TFTs with diverse device configurations were fabricated and their low-voltage operation was successfully demonstrated thanks to the high Ci and excellent dielectric performance of the copolymer dielectric layer. In addition, flexible OTFTs on a plastic substrate maintained their high-performance even with an applied tensile stress of up to 2.1%, one of the highest strain values applied to OTFTs to date. Because of these unique advantages, we believe that the high-k copolymer dielectrics developed in this study can be promising candidate platform materials for future wearable electronics.

4. EXPERIMENTAL SECTION 4.1. Materials and Substrates. CEA (>95.0%) was purchased from Tokyo Chemical Industry. DEGDVE and TBPO (99% for DEGDVE and 98% for TBPO) were purchased from Sigma-Aldrich. All of the chemicals were used as received without further purification. Glass substrates (Eagle XG glass, Samsung Corning Co.) were cleaned by ultrasonication in deionized water, acetone, and isopropyl alcohol for 20 min per each solvent. PEN substrates with 100 μm thickness (Film Type Teonex Q65H, Teijin DuPont Films) were used as received without solvent cleaning. 4.2. Thin-Film Deposition. Polymer thin films were deposited by an iCVD system (Daeki High-Tech Co.). For the deposition of pCEA and p(CEA-co-DEGDVE), CEA, DEGDVE, and TBPO were introduced into the iCVD reactor with the flow rates described in Table 1. The chamber pressure and substrate temperature were maintained at 60 mTorr and 30 °C, respectively. To decompose the initiator (TBPO) molecules and produce radicals, the filaments in the chamber were heated to 130 °C. Al2O3 was deposited by ALD, wherein the injection time of trimethyl aluminum (TMA) and water was 0.5 s and a N2 purge of 15 s occurred between TMA and water exposure. 4.3. Film Characterization. The FTIR spectra were obtained by the ALPHA FTIR (Bruker Optics) with 64 scans in absorbance mode and XPS with depth profile analysis was performed with a Sigma Probe Multipurpose spectrometer (Thermo VG Scientific) with a monochromatized Al Kα source. To observe the surface morphologies of the synthesized polymers, 2 μm × 2 μm AFM images were taken by a scanning probe microscope (XE-100; Park Systems). The thicknesses of the polymers were measured by a spectroscopic ellipsometer (M2000D; Woollam), and the XRD spectra of the polymers and C8BTBT were obtained by a thin-film X-ray diffractometer (Rigaku). 4.4. Device Fabrication and Characterization. To estimate the dielectric constant and the dielectric strengths, MIM devices were fabricated on a glass substrate with an area of 1 mm2. Al electrodes (50 nm) were thermally evaporated and dielectrics were deposited by iCVD as described above. To visualize the MIM device, the device was sliced by a focused ion beam (Helios 600), and cross-sectional images were obtained by high-resolution TEM (HRTEM, Tecnai F30 STwin). The MIM devices were also fabricated on a PEN substrate to investigate the flexibilities of the dielectrics. The tensile strain was calculated by the equation below

Figure 5. (a) Photograph of C8-BTBT OTFT array on the PEN substrate (100 μm). (b) Initial transfer characteristics of the flat surface and under tensile strain. (c) The device parameters extracted from the transfer curves with respect to the applied tensile strain.

most flexible TFTs reported so far and has sufficient potential to become an ultraflexible OTFT by combining the device with a proper ultrathin substrate and using neutral plane manipulation techniques. We believe that the outstanding flexibility of this high-k, ultrathin dielectric layer will prompt the realization of future high-performance wearable electronic devices.

3. CONCLUSIONS A series of high-k polymer dielectrics composed of CEA and DEGDVE were newly synthesized by a simple, one-step method in an iCVD chamber. To the best of our knowledge, this is the first report on the synthesis of a cyanide-containing polymer in the vapor phase and shows the outstanding thickness down-scalability of polymer dielectrics. The highly polar cyanide functional group in CEA is responsible for the enhanced dielectric constant, and excellent dielectric performance could be achieved by incorporating the DEGDVE crosslinker moiety. The chemical composition of the copolymer dielectrics could be controlled precisely by tuning the flow rate ratio of the two input monomers, which was confirmed by XPS and FTIR analysis. The in situ DEGDVE-mediated crosslinking substantially enhanced the dielectric strength of the cyano group-containing high-k dielectric layer without any additional post-treatment. The chemical composition of the copolymer dielectric layer was optimized to achieve both a high dielectric constant and superior dielectric strength. The optimized copolymer dielectric layer, pC1D1, showed a high dielectric constant of 6.2, extremely low J with a thickness of

S = dsub(2R + dsub)−1

(3)

where S is the tensile strain, and R and dsub are the bending radius and thickness of the substrate, respectively. For the fabrication of the bottom-gated C8-BTBT OTFTs, Al gate electrodes and gate dielectrics on the PEN substrate were deposited as described in the fabrication of the MIM devices and C8-BTBT (30 nm) and Au electrodes (60 nm) as source (S)/drain (D) were thermally evaporated. The deposition rates of the metals and C8BTBT were set to 0.1 and 0.03 nm/s, respectively, with vacuum under 2 × 10−6 Torr. IGZO with 20 nm thickness was deposited on the glass substrate as a channel layer for the top-gated TFTs by radio-frequency sputtering (RF-sputtering) using In/Ga/Zn (2:1:2, atomic ratio, 20815

DOI: 10.1021/acsami.7b03537 ACS Appl. Mater. Interfaces 2017, 9, 20808−20817

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ACS Applied Materials & Interfaces Advanced Nano Product Corp., 99.99%) and annealed at 200 °C for 40 min on a hot plate. Al S/D electrodes (60 nm) were thermally evaporated followed by deposition of the iCVD dielectrics and Al gate electrodes (50 nm). The channel width (W) and length (L) of the C8BTBT OTFTs were 1000 and 175 μm, respectively, and those of the IGZO TFTs were 1000 and 200 μm, respectively. The electrical characteristics of the devices were measured by a B1500A semiconductor device analyzer (Agilent Technologies), and all of the depositions and electrical measurements were performed in a N2-filled glove box except for the RF-sputtering of the IGZO.



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ASSOCIATED CONTENT

S Supporting Information *

The Supporting Information is available free of charge on the ACS Publications website at DOI: 10.1021/acsami.7b03537. Deposition rate of each polymer; high-resolution XPS C1s and O1s spectra and XPS depth profile data of pCEA and the copolymers; XRD spectra of each polymer; AFM image of Al electrode deposited on glass substrate; AFM images and thickness of pCEA and pC1D1 films before and after soaking in various solvents; transfer characteristic and mobility of pristine C8-BTBT OTFTs, those under applied strain, and after release; XRD data and AFM image of C8-BTBT deposited on pC1D1 (PDF)



AUTHOR INFORMATION

Corresponding Author

*E-mail: [email protected]. ORCID

Chan Woo Park: 0000-0002-8666-016X Sung Gap Im: 0000-0001-7562-2929 Author Contributions

The manuscript was written through contributions of all authors. All authors have given approval to the final version of the manuscript. Notes

The authors declare no competing financial interest.



ACKNOWLEDGMENTS This work was supported by the Samsung Research Funding Center of Samsung Electronics under Project Number SRFCMA1402-00.



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