Floating Back-Gate Field Effect Transistor Fabricated Using a Single

Dec 26, 2017 - The devices can exhibit on/off current ratio of ∼102–104 at room temperature. Mobility of the NW channel as measured in different s...
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Floating Back-gate Field Effect Transistor Fabricated using a Single Nanowire of Charge Transfer Complex as a Channel Rabaya Basori, and Arup Kumar Raychaudhuri J. Phys. Chem. C, Just Accepted Manuscript • DOI: 10.1021/acs.jpcc.7b09960 • Publication Date (Web): 26 Dec 2017 Downloaded from http://pubs.acs.org on December 29, 2017

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The Journal of Physical Chemistry

Floating Back-gate Field Effect Transistor Fabricated using a Single Nanowire of Charge Transfer Complex as a Channel Rabaya Basori,*† and Arup Kumar Raychaudhuri

Theme Unit of Excellence in Nano Device Technology and Department of Condensed Matter Physics and Materials Science, S.N. Bose National Centre for Basic Sciences, Salt Lake, Kolkata-700098, India. Email: [email protected]

*

Corresponding author



Current affiliation: School of Nano Science and Technology, Indian Institute of Technology Kharagpur, Kharagpur 721302, India, Phone: +91-3222-282224, Fax: +91-3222-255303 ACS Paragon Plus Environment

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ABSTRACT

Metal-organic charge transfer complex (MOCT) material have good application potentials. We report a high carrier mobility in MOCT material Cu:tetracyanoquinodimethane (Cu:TCNQ) single nanowire (NW) . A novel floating back-gate field effect transistors is fabricatedusing Cu:TCNQ single NW of diameter ranging from ~50 ─ 100 nm and length ~1.0─2.0 µm as channel material. Floating gate is made of conducting Si (c-Si) electrically isolated from the environment by thermally grown SiO2(100 nm thickness) all around it which is an easy and inexpensive approach to reduce leakage current and improve the device performance. The devices can exhibit ON/OFF current ratio of ~ 102 ─ 104 at room temperature. Mobility of the NW channel as measured in different single NW devices is ~ 4.3 × 102 ─ 1.2 x 104 cm2V−1s−1 which is the best reported mobility in such molecular materials. The observed high mobility has been proposed to arise from π−π stacking of the molecular orbitals of donor-acceptor type CT materials and good crystallinity and also small device size that reduces carrier scattering.

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INTRODUCTION Field-effect transistors (FETs) based on organic semiconductors have been extensively studied in recent years. Achieving high-mobility for the channel, low-power dissipation, and fastswitching are among the main challenges in this particular to proceed towards ultra fast computer architectures.1–4 One of important requirement for most FET applications is high charge-carrier mobility in the channel material. To attain high performance organic FETs (OFETs), intense research efforts have been focused on the development of novel materials, improving manufacturing technology, and utilization of new device architectures. Significant progress has also been made to achieve high mobility exceeding 10 cm2V−1s−1 through the development of novel semiconducting polymers as well as optimization of the semiconducting film microstructure.1,5 Doping in channel material is another way of enhancing mobility. Very high mobility reaching ~1500 cm2V−1s−1 in black phosphorus at low temperature (260K) has been achieved via Al doping.6 Conjugated polymer semiconductors composed of electron donor (D) and electron acceptor (A) moieties (called D-A type) have shown impressive potential for achieving high mobility owing to their strong intermolecular interactions and excellent π─stacking.7 Metal-organic charge-transfer (CT) complex materials have desirable electron donor−electron acceptor property, where charge is transferred from metal to the ligand. CT complex materials form highly anisotropic one dimensional structure via π─π stacking along the direction of growth. However, FETs using CT complexes have not been reported before although such a transistor is expected to have low resistance in the on-state.8,9 Recently, new types of materials modifications have been done on the devices to enhance the mobility. This has been primarily done by functionalization, modification of contacts or interfaces and use of CT complex materials like TTF:TCNQ, F2-TCNQ (TCNQ - 7,7,8,8-tetracyanoquinodimethane) etc.4,10–12 Among all the CT complex materials, TTF:TCNQ is the first CT complex material that

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was found to have high conductance and exhibit room temperature mobility, µ ≈ 3±1 cm2V−1s−113, that reaches to ~ 103 cm2V−1s−1 at 60 K. In this article, we have reported a new channel material and simple device architecture to achieve high mobility. For the first time, we study a FET fabricated from a single strand of a Cu:TCNQ CT complex NW as a channel material which has not been investigated before in this material. We find that the channel made from the CT complex NW grown from vapour phase can exhibit very high mobility which can approach ~104 cm2V−1s−1 even at room temperature. The Cu:TCNQ used in this investigation is a well known D-A type metal-organic CT complex material,9,14 where electron is easily transferred from low ionization potential Cu (~7.7 eV) to high electron affinity TCNQ (~2.7 eV). It is a highly conducting polymeric material Cu:TCNQ (σ ~ 3×102 S/cm)15 at room temperature and can show significant non-linear conductivity that even leads to Charge Density Wave (CDW) transition at low temperatures.16 This material also has considerable interest for its electrical resistive state switching,8-9,17 applications as conducting electrodes10,18 and excellent opto-electronic properties as a high responsive optical detector even in a single NW.15,19We have also used floating back gate device architecture to reduce leakage current. The device so fabricated allows us to measure the mobility in a single NW.

EXPERIMENTAL DETAILS The single NW device as shown in Figure 1, is fabricated from vapour phase deposited Cu:TCNQ NW that grow between pre-fabricated bi-metallic contact pads as described below. Firstly, a highly doped conducting Si (c-Si) wrapped with thermally grown 100 nm thick SiO2is taken as a substrate. The bimetallic electrodes of Cu/Au of ~ 1 – 2 µm spacing are then fabricated on the (100nm)SiO2/cSi/SiO2(100nm) substrate using photo-lithography followed by electron beam lithography and lift-off. Low dimensional NWs are grown on the predefined Cu/Au electrodes by physical vapor deposition (PVD) method under high vacuum (~ 2 × 10−6 mbar). Specific reason of fabricating bi-metallic Cu/Au electrodes is to control over the NW growth. Au has very high ionization potential (~ 9.22 eV) compared to that of Cu (~7.7 eV). As a result the vapors of TCNQ reacts only with Cu and form highly ACS Paragon Plus Environment

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anisotropic one dimensional Cu:TCNQ NW structure. Au being top electrode, it prevents the growth from top electrode surface. As a result NWs only grow from exposed sidewall of Cu. Such electrode configuration controls the NW growth and fever in-plane growth in a defined direction.18(Note: We grow and fabricate such type of nanowire device reproducibly by following the procedure narrated below. During metal deposition the Electron beam lithography written patterned and developed substrate is kept exactly above the Cu source so that Cu vapour flux falls vertically on the designed patterns. After Cu evaporation, we do evaporate Au on top of Cu in the same chamber in a certain angle (optimized by trial and error) such that only one side of the sidewall of Cu film is covered by Au.) During NW growth, Cu:TCNQ molecules form closely packed π−π stacking along the length of the NW. Schematic of such two consecutive Cu:TCNQ molecules forming π−π stacking is shown in Figure 1(b). NWs grown from Cu bridge the other electrodes. Number of NWs growing from Cu of one electrode and terminates on the other Cu/Au electrode can be controlled by controlling the growth parameters like deposition rate, reaction time and temperature etc. The bridging of the two Cu/Au electrodes by the NW naturally connects them as source (S) and drain (D) on the two sides. SEM image of a typical device under test (DUT) is shown in Figure 1(c), where the single NW of diameter ~70 nm and length ~1.4µm. Since Cu:TCNQ NW grows directly from pure Cu, the growth end of the NW (i.e. Cu) acts as low barrier Ohmic contact and free end of the NW, connecting other Cu/Au electrode acts as Schottky contact.15,20 For better contacts, we have anchored the Schottky contact side of the NW with Focused Electron Beam deposited Pt as shown in Figure 1(c). Cu/Au interface does not affect the conduction process. The process of anchoring has been used by us before for improving performances of photo-detectors made from singe NW of Cu:TCNQ.20Main advantage of anchoring is that it reduces the barrier height (~0.2eV) of the Schottky contact without hampering the conduction process.

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Back-gate was fabricated by depositing Cr/Au in a predefined window just below the NW device. In this configuration, c-Si is floated between two SiO2 layers and acts as floating gate and deposited Cr/Au on back-SiO2 as control gate. The c-Si floating gate wrapped by insulating SiO2 layer, being electrically isolated from the surroundings, charges induced in the floating gate remain captive for a long time. Such floating-gate configuration with double dielectric layer also reduces leakage current through the device. It is our experience that without the floating gate configuration the gate current can be large, thus interfering with proper FET operation. The measurements were performed in vacuum chamber (10−3 mbar). Output and transconductance characteristics of the device were measured using Keitheley SM-2410, where voltage was used as source and current as measured quantity. A constant gate bias in control gate was applied from another sourcemeter and corresponding gate-current was measured with the same to ensure that the gate current remains a small fraction of the drain current.

RESULTS AND DISCUSSIONS NWs as synthesized by PVD method are characterized by SEM, FTIR, XRD and Raman which confirm phase-I crystal structure of the NWs.16From the Raman study it is observed that, the C̶ CN stretching mode (Raman active mode) is shifted from 1451 cm-1 (neutral TCNQ) to 1376 cm-1 (Cu:TCNQ) through the formation of Cu:TCNQ complex by means of the redox reaction between Cu and TCNQ as shown in Figure 2 (a). This confirms the charge transfer from Cu to TCNQ and formation of Cu:TCNQ complex material.To establish the high crystallinity of Cu:TCNQ NWs, we have performed XRD as shown in Figure 2(b) which confirms high crystalline nature of the synthesized NWs used for measurements. Mobility of carriers in a material strongly depends on its crystalline nature and the extent of crystalline order. Transmission Electron Microscope (TEM) measurement was performed on different spots along the length of a single NW. Figure 3 shows TEM bright field image of single strand of a NW. Inset (a) in the same figure clearly shows the atomic fringes with interplanar spacing ~0.389 nm as obtained in the high resolution TEM (HRTEM) which corresponds to tetragonal Cu:TCNQ crystal (022) interplanar ACS Paragon Plus Environment

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spacing. Inset (b) of Figure 3 shows the selected area electron diffraction (SAED) patterns from a single NW which indicates that as grown Cu:TCNQ NWs are highly crystalline (tetragonal) in nature. Different crystalline planes are indexed in inset (b).The high mobility observed in the NWs is enabled by the crystalline order of the NW. The transfer characteristics for the floating back-gate NW FET (FG-NWFET) were measured with constant drain-source voltage (VDS) and measuring drain current (IDS) for different values of gate-source voltage (Vg). We performed the same measurements on another device of simple back-gate of ~200nm thickness (Figure S1(a)) where we have observed very high leakage current (Figure S2(a) and (b)), which may limit the FET operation. In the floating gate configuration, since, the gate terminal is electrically isolated from the remaining terminals (S, D and NW or channel material), Ig is approximately 3 orders less than IDS which is shown in FigureS2 in supplementary information section. This is due to the presence of pin-holes even at a thickness of 200nm oxide that led to leakage. The leakage occurs not exactly at the gate region of the device, but in the long leads. Thus to reduce leakage current with same thickness of SiO2, we restructure our device and considered floating back-gate configuration. The floating gate thus ensures a proper FET operation avoiding leakage from gate. The transfer characteristics show that the transistor is turned on at~ −0.6V (See Figure S3 in supplementary information) which is a very low bias. The surface plot in Figure 4(a) (with colour code) shows both the transfer characteristics as well as the output characteristics together. In Figure 4(b) and (c), we show respectively the transfer characteristics for a given value of VDS=1V when the gate bias Vg is swept from 0 to +5 V and the output characteristics for a given value of gate bias Vg=0 to 5 V when the VDS is changed from 0 to 1 V. A positive gate bias enhances the current IDS. From the output characteristic curves it is observed that at low VDS, IDS is increasing linearly and at high VDS, IDS is going towards saturation, although it is not a perfect saturation as a conventional FET generally shows.3,11 This is due to the short channel length (~ 1.0 ─ 2.0 µm) of our device. For this short channel length, VDS starts interacting with the available ACS Paragon Plus Environment

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energy levels in the conduction band of the NW channel even if for a constant Vg(Figure S4 and S5). This does not happen for larger device. In larger device, VDS only interacts with the energy levels of contacts (‘S’ and ‘D’) and not with that of channel materials (for details please see supporting information).21We have performed same characteristics on another floating-gate NW FET device with different dimension (~ 90nm and length ~1.9µm)(Figure S6). The data obtained from both the devices are summarized in Table 1. We evaluated the transconductance, gm (

∂I DS , for constant VDS) of the device from the data in the ∂V g

linear region. The transconductance, gm as obtained from the slope of transfer characteristic is ~ 1.3 × 10-5 S. This allows us to calculate the charge carrier mobility µ using the relation: gm = d µCiV ; DS L where d is channel width (diameter of the NW), L channel length (length of the NW), and Cithe

gate insulator capacitance i.e. capacitance of the dielectric (SiO2) layer per unit area. Using the cylinder-on-plate capacitance model22 we calculate the specific gate capacitance using the relation Ci =

2π kε 0 L Cin , where, Cin = , is the back gate capacitance, A is area of the capacitance, 2A ln(4W / d )

the relative permittivity ( ε 0 ) is 8.854 × 10−12 Fm−1 and W is thickness of dielectric layer. Factor ’2’ comes in Ci due to floating gate configuration. Using the value of the known parameters we obtain Ci = 2.83 × 10−4 F/m2). The single NW device shows a room temperature mobility, µ ~ 1.2 × 104 cm2V−1s−1 measured on different devices, which is much higher than other CT complex materials4,8,10,23 and probably highest mobility in the organic FET family reported till date.5,24 Table 2 summarizes some high-mobility organic materials having mobility > 1. Although the ON/OFF ratio is comparatively low3,10,12,25 in Cu:TCNQ, it shows extensively high mobility due to the material property as well as constrained dimension (lower diameter and shorter length) of the NWDUT. To understand the mechanism and reason behind enhancement of current due to positive gate voltage of the NW FET, a gate-controlled metal-semiconductor barrier modulation is proposed ACS Paragon Plus Environment

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to

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interpret

the

carrier

transport

in

Cu:TCNQ.

Cu:TCNQ

NW

is

an

n-type

semiconductor.26,27Figure 5 represents the energy band diagram along the horizontal axis showing the effect of bias applied in between S, D and G. Flow of IDS from D to S through the channel will be determined by the available energy states in the channel material. Application of VDS > 0 lowers all the energy levels in the D by an amount qVDS, which results in current flow from D to S. Applied Vg > 0 lowers the energy levels in the channel region relative to the two contacts S and D. This enhances the available energy state in the channel material, resulting in enhancement in IDS. Application of Vg < 0 raises the energy levels of the channel materials upwards and consequently the available energy states in the channel material get reduced. Change of IDS due to Vg can also be explained by the floating gate band diagram along vertical axis of the device as shown in Figure 6.

Figure 6 illustrates the electrical gating effect along the vertical axis for various gate conditions in the floating gate device. The bandgaps and work functions of different materials associated with the floating-gate configuration are also shown. The barriers are induced due to a mismatch between the work functions of p−Si, SiO2 and Cu:TCNQ, and they can be enlarged or reduced by applying the negative or positive Vg, respectively. When Vg> 0, the electrons are attracted to the interface between Cu:TCNQ and SiO2 to form an accumulation layer in Cu:TCNQ NW. With increasing +Vg, number of accumulated negative carrier in the NW increases and device current also increases as experimentally obtained in Figure 4(c). These induced or accumulated charges fill the trap or defect states in the NW which effectively reduces electron scattering centre and hence mobility in the material increases. The role of carriers filling the defect states and thus enhancing their mobility has also been observed in other semiconductor materials like ZnO.28 When Vg< 0, the electrons are repelled from the interface to establish a depletion layer. We have also simulated the distribution of bias applied across source, drain and gate (Figure7) which effectively reflects the induced charge in the device channel (q = CV ). This is done using ACS Paragon Plus Environment

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COMSOL Multiphysics. Color code represents the potential and arrow indicates the direction of field induced in the device. In addition to obtaining a high performance floating gate FET based on a single strand of a NW of a molecular material like Cu:TCNQ, the paper also observed a high mobility in the NWs that range from 4.3 × 102 to 1.2 × 104 cm2V−1s−1. The difference in mobility likely arises as the wires were grown on different batches. The mobility of the carriers in the wire depends on the extent of charge transfer and the extent of slight disorder in π-π stacking sequence as has been shown by our previous publication [16]. During growth the variability in the arriving flux that may happen from batch to batch causes small differences in these factors which, however, have a big impact on the mobility. There are several factors that could be responsible for observation of such high mobility in Cu:TCNQ. We discuss them below.

The simulation in Figure7 shows that due to its small size, the gate bias can have a component parallel to the NW. This will effectively enhance the field along the NW axis and would modulate (add or subtract) the VDS value. This in principle will enhance the device current and will make the effective mobility appear to be larger. From the field simulation we estimate that this can at best enhance the observed mobility by one order. In that case, the actual mobility will be factor of 3 to 5 less. Even then the mobility is quite large still compared to that of other such similar systems. The most plausible reason for high mobility in the NW is the crystal structure and intra-chain molecular orientation of Cu:TCNQ. Recently, remarkable progress has been made in achieving high carrier mobilities in molecular materials,3,23 primarily due to improved rational molecular designs and the synthesis of donor-acceptor type conjugated copolymers, which typically have alternating configurations of donor and acceptor units across the main chain of polymers. These types of D−A copolymers typically have a strong aggregation preference due to their strong interactions in intermolecular fashion, and a strong electronic coupling property, which facilitates efficient charge-carrier transportation.3,23 In Cu:TCNQ, Cu acts as donor and TCNQ ACS Paragon Plus Environment

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as an acceptor. During NW growth, charge is transferred between these molecular entities. The charge-transfer among the molecules will have preferential π−character and orbitals must have a sufficiently strong overlap with the smallest possible spacing and they preferably have the same symmetry. This leads to cleaner conduction path of charge carriers due to ordered π−π stacking of TCNQ molecules around Cu in Cu:TCNQ phase-I.16,29 This type of orientation has been found particularly useful in achieving high mobilities since the π−π stacking direction is in the plane of the current flowing direction12,30 which has also been observed in Pentathienoacene (PTA), an organic FET.31 The π−π stacking in TCNQ molecule along the direction of the length of Cu:TCNQ NW is schematically shown in Figure 1 (b). The small size of the NW length (~ 1 − 2µm) as well as diameter ( 104. Such excellent performance of the device is suggested to arise from D−A type CT complex material Cu:TCNQ, mainly π−π stacking of TCNQ molecules along NW length.

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SUPPORTING INFORMATION. The contents of Supporting Information may include the following: (1) fabrication of floating gate device, (2) reason of reduction of leakage current (3) explanation of output characteristic in Nano Transistor, (4) low threshold voltage data, (5) reduced leakage current data, (6) on-off ratio exceeding 104 data

ACKNOWLEDGMENT

The work is carried out under the projects Theme Unit of Excellence in Nanodevice Technology (SR/NM/NS09/2011(G)) funded by the Nanomission, Dept. of Science and Technology, Government of India. A.K.R acknowledges the project Unit for Nanoscience (SR/NM/NS53/2010) funded by the Nanomission, Dept. of Science and Technology, Government of India for partial manpower support and J. C. Bose Fellowship (SR/S2/JCB-17/2006) of Science and Engineering Research Board. R. B. acknowledges the project [DST/INSPIRE Faculty Award/2016/DST/INSPIRE/04/2015/003152]

funded

by

the

Ministry

of

Science

and

Technology, Dept. of Science and Technology, Government of India for partial manpower support.

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FIGURE with CAPTIONS

Figure 1: (a) Schematic of floating back-gate FET structure of a single NW. (b) Schematic of two Cu:TCNQ molecules forming π−π stacking along the direction of NW growth. (c) SEM image of a single Cu:TCNQ NW of diameter 70 nm growing from Cu of one electrode and

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terminates on the other Cu/Au electrodeof separation~1.9 µm used to measure FET effect. Terminated NW end of the NW is anchored with focused electron beam deposited Pt.

Figure 2: Raman spectra of (a) Cu:TCNQ (upper) and TCNQ (lower) respectively. (b) XRD of Cu:TCNQ nanowire powder sample. ACS Paragon Plus Environment

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Figure 3: Bright field TEM image of a single strand of NW used for measurement. Inset (a) High Resolution TEM image and (b) SAED patterns performed on the same NW showing highly crystalline nature of the NW.

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Figure 4: (a) The device current IDS as function of gate bias Vg for different constant drainsource voltage VDS (surface plot). (b) Transfer characteristic of the FG-NWFET single NW device for fixed VDS. (c) Output characteristic curves of the FG-NWFET single NW device for fixed Vg = 0V to 5V.

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Figure 5: The energy band diagrams along the horizontal axis (z) illustrate various VDS and Vg conditions.

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Figure6: The energy band diagrams along the vertical axis (z) illustrate various gating conditions, including (a) flat-band, (b) equilibrium (Vg = 0), (c) accumulation (Vg> 0) and (d) depletion (Vg< 0). The blue solid lines denote the vacuum and dash line as Fermi levels, respectively.

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Figure 7: Distribution of potential and electric field through the floating back-gate FET for positive bias applied to the floating back gate.

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TABLES

Table 1: Cu:TCNQ FG-NWFET observed in two distinct Cu:TCNQ Single NW device. Device

ON/OFF

VT (V)

µ (cm2V−1s−1)

Dimension ratio L=1.4µm;

102

-0.6

1.2 × 104

104

-0.2

4.3 × 102

d=70nm L=1.9µm; d=90nm

Table 2: Comparative study of room temperature mobility of Cu:TCNQ with that of other highmobility organic materials. Material

ON/OFF ratio

µ (cm2V−1s−1)

Ref.

TCNQ

106

2

24

TTF:TCNQ

> 105

3

10

F2-TCNQ

> 101

7

4

NDI-based copolymers

108

8.5

12

Rubrene

-

40

23

Cu:TCNQ

> 104

1.2 × 104

This work

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The Journal of Physical Chemistry

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