Formation of a Stable pân Junction in a Liquid-Gated MoS2

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Formation of a Stable p-n Junction in a Liquid-Gated MoS Ambipolar Transistor 2

Yijin Zhang, Jianting Ye, Yohei Yomogida, Taishi Takenobu, and Yoshihiro Iwasa Nano Lett., Just Accepted Manuscript • DOI: 10.1021/nl400902v • Publication Date (Web): 24 Jun 2013 Downloaded from http://pubs.acs.org on June 25, 2013

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Formation of a Stable p-n Junction in a Liquid-Gated MoS2 Ambipolar Transistor Y. J. Zhang1*, J. T. Ye1*, Y. Yomogida2, T. Takenobu2, and Y. Iwasa1,3

1

Quantum-Phase Electronics Center and Department of Applied Physics,

The University of Tokyo, 7-3-1 Hongo, Bunkyo-ku, Tokyo 113-8656, Japan 2

Department of Applied Physics, Waseda University, Tokyo, Japan & PRESTO, Japan Science and Technology Agency 3

CERG, Riken, Hirosawa 2-1, Wako 351-0198, Japan

Molybdenum disulfide (MoS2) has gained attention because of its high mobility and circular dichroism. As a crucial step to merge these advantages into a single device, we present a method that electronically controls and locates p-n junctions in liquidgated ambipolar MoS2 transistors. A bias-independent p-n junction was formed, and it displayed rectifying I-V characteristics. This p-n diode could perform a crucial role in the development of optoelectronic valleytronic devices. * [email protected] * [email protected] KEYWORDS: molybdenum disulfide, electric double-layer transistor, ambipolar, p-n junction

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Molybdenum disulfide (MoS2), an exemplary layered transition-metal dichalcogenide, consists of covalently bonded metal-chalcogen-metal tri-planed monolayers arranged by van der Waals stacking. Because of this layered configuration and the finite energy gap in its band structure, MoS2 has received increased attention since the discovery of graphene by the Scotchtape method. The gapped electronic structure of MoS2 was expected to overcome the difficulties associated with device applications using graphene.1,2 After the initial demonstration of a field effect transistor (FET) device composed of mechanically exfoliated MoS2 with n-type operation,2 a significant enhancement in FET operation was realized by introducing a high-k gate dielectric made of HfO2 showing clear transistor operation with high mobility.3 A further development was made by introducing electric double-layer transistors (EDLTs) using liquid gate dielectrics.4 Inherently, with a higher gate efficiency in EDLT, the ambipolar operation was realized indicating that the Fermi energy could be changed from the conduction band to the valence band through the MoS2 band gap. The accessing of valence band allowed the first observations of p-type transport in MoS2, where the hole mobility was found to be comparable or even higher than the electron mobility, indicating that hole conduction could be more suitable than electron conduction for high performance devices.5 Recently, superconductivity was realized with field effect n-doping adding new controllable properties in these EDLT devices.6 In addition to the high gate efficiency, the EDLT device also benefited from the fact that the transistor channel was formed at a semiconductor/organic interface (top surface) where significant reduction of trapping states originally formed at the semiconductor/solid dielectric (such as SiO2) at bottom surface was avoided. Recently, similar ambipolar operation was reported even in the conventional FET structure after a special preparation of such a semiconductor/organic interface with effectively reduced trapping states.29 Besides the improved electrical performance, the unique optical response in MoS2 was theoretically studied, and this revealed the presence of variable electronic structures from


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indirect band gaps in bulk (1.3 eV between the Γ point of the valence band and the middle of the Γ-K of the conduction band) to direct gaps (1.9 eV at the K point) in monolayers.7,8 The optical transitions between multi-valleys with inequivalent K and K’ points exhibited circular dichroism in photoluminescence,9-11 leading to a novel functionality termed valleytronics.12 Due to the high electrical device performance and the inherent valley-sensitive optical properties, a strong demand exists for the development of electrically induced light emission and its polarization control as a powerful tool for controlling the valley and the spin degrees of freedom in MoS2. As a first step toward this goal, we developed a stable p-n junction on the channel of a MoS2 ambipolar transistor in a similar manner as the ambipolar light-emitting transistors that were made on organic semiconductors and carbon nanotubes.13-20 As shown in Figure 1, depending on the bias condition, unipolar (Figure 1 a) or ambipolar (Figure 1 b) modes can be created through carrier accumulation by controlling the potential difference between the gate, source, and drain electrodes. In the unipolar mode (Figure 1a), the carriers are uniformly accumulated on the transistor channel if the gate voltage VGS is in the linear region of the output curve when VGS > drain voltage VDS. In the ambipolar mode (Figure 1b), the source and drain electrodes are negatively and positively biased, respectively, while the gate electrode is grounded. We can then create adjacent regions with electron and hole doping at the channel surface. At the center of the channel where these two regions meet, a pseudo p-n junction is formed with the tunability of its position depending on the bias condition. This junction was utilized as an efficient light emission source in organic semiconductor and carbon nanotube devices.13-19 In this letter, we report the fabrication of a stable p-n junction on the channel of a transistor device fabricated on cleaved MoS2 thin flakes. The stable p-n junction was obtained after fixing the ionic movement by lowering the temperature below the glass transition temperature of the ionic liquid when the device was biased with the configuration shown in


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Figure 1b. In contrast to conventional ambipolar FETs,15 further changes in the bias conditions after freezing the ionic liquid would not modify the device structure due to fixed ions. This freezing-while-gating technique is a unique feature of EDLTs in making a stable p-n junction against changes of the bias. The transition between tunable and stable device structures associated with the glass transition of an ionic liquid cannot be duplicated in conventional transistors with solid gate dielectrics and have potential applications in the design of novel electronic/valleytronic functions. We synthesized MoS2 single crystals using a conventional chemical vapor transport crystal growth method.21,22 Stoichiometric amounts of 99.99% Mo and 99.999% S (Kojundo Chemical Laboratory CO., LTD.) powders were mixed and sealed in a quartz ampoule under high vacuum (approximately 10-5 torr). The mixture was repeatedly heated and remixed using a Muffle furnace at 700°C and 1100°C to make high-quality polycrystalline powders. Bulk single crystals were grown by chemical vapor transport using 99.999% I2 (5 mg/cc of ampoule volume) as a transport agent. We fabricated thin flakes of MoS2 single crystals using the Scotchtape method that was widely used in graphene research.1,2 The thickness (approximately 10–15 nm) and the surface flatness of these flakes were characterized by a color coding method previously developed.5 A Hall bar configuration with a side gate electrode for liquid gating (Ti/Au electrodes: 5/75 nm) was attached to the flake using e-beam lithography, metal evaporation, and lift-off. A droplet of ionic liquid, DEME-TFSI (N,N-diethyl-N-methyl-N-(2methoxyethyl) ammonium bis (trifluoromethylsulfonyl)imide),5 was placed to immerse both the channel surface and the gate electrode for bridging the ion movement. Here, DEME-TFSI was selected from a wide variation of ionicliquids based on its performance in reaching an ambipolar operation in many previous researches.5,27,28 The transport measurements were performed under high vacuum (10-5 Torr) using a physical property measurement system (Quantum Design, Inc.) at or below 220 K, a temperature which is slightly above the glass transition temperature of DEME-TFSI, in order to reduce the possibility of chemical reaction. All of the applied voltages,


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such as VGS, were defined as the difference between the biases applied to the respective electrodes, e.g., VGS = VG – VS, where VG and VS denote the voltage applied to the gate and source electrodes, respectively. We first measured the transistor characteristics on single crystal devices using a twoterminal configuration. Figures 2a and b show the transfer curve (a: fix source-drain voltage VDS, scan gate voltage VGS) and the output curve (b: fix VGS, scan VDS) at 220 K, respectively. As shown in Figure 2a, the device showed ambipolar behavior characterized as the switch-on of the source-drain current (IDS) for both positive and negative gate biases. The field-effect mobilities deduced using capacitances5 of 4.7 and 7.2 µF/cm2 were 8.5 and 14 cm2/Vs for the p- and nchannels, respectively. The device was n-type at the zero gate bias, which suggested the unintentional electron doping originated from sulfur vacancies that can exist in pristine MoS2 bulk single crystals and/or can be introduced during the cleavage and microfabrication processes. This initial doping in the device caused the asymmetric maximum IDS of electrons (20 µA) and holes (3 µA) in the ON state. Nevertheless, high ON/OFF ratios were measured as 106 and 105 for both n- and p-doping, respectively, and were only limited by the measurement resolution of the OFF current (Keithley 2400, approximately 10 pA for the lower limit). Both ratios reached the requirement of state-of-the-art solid-gated FET devices indicating both hole and electron transport could be used for making high performance transistors.23 Our device was highly stable, as demonstrated by the transport properties remaining largely unchanged through repeating VGS scans (Figure 2c). The reproducibility of the ambipolar operation was also satisfactory for the ON currents and the ON/OFF ratio (Figure 2d), although the absolute values of ON and OFF currents slightly fluctuate due to intrinsic difference in flakes for contact resistance. We observed ambipolar transport in four from seven devices that we fabricated. The other devices did not exhibit any transistor behavior, which was probably due to bad contacts.


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As shown in Figure 2b, ambipolar operation was also clearly observed in the output curve. In the low VDS range (VDS < 0.5 V), IDS linearly increased with increasing VDS, corresponding to e

the linear region in transistor operation. When VDS exceeded VGS – VTh and the effective gate voltage around the drain electrode (VGD) became smaller than the threshold voltage for electron e

accumulation (VTh ), IDS was saturated regardless of the increasing VGS entering the saturation region. At even higher VDS, an upturn from the saturated IDS was observed for several curves with small and negative VGS, indicating hole accumulation at the channel surface when the bias met the condition of a sufficiently large negative VGD for hole accumulation: VGD < threshold voltage for hole accumulation VThh (Figure 2a). Using additional electrodes in the four-terminal (4T) configuration, we measured voltage drops at the voltage probes to detect the formation of the p-n junction. We chose one bias condition at which the ambipolarity was found in the output curve with linear and saturation regions followed by the second upturn of IDS entering the ambipolar region (Figure 3a). To guarantee the electron accumulation around the source electrode under all VDS values, VGS was fixed to 1 V (see Figure 2a). The red line in the plot shows the fitting using a simple model with quadratic equations for saturation currents.15,23,24 The IDS for each region is given by the following equations: #$%

0

&

' ' !

! "

& "

! "

Here, L and W represent the channel length and width. µ and C denote the mobility and capacitance. The superscripts “e” and “h” stand for electron and hole, respectively. Four fitting e

parameters (µ and VTh) were estimated using the same electron and hole capacitance values (C


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2 h 2 e h = 7.2 µF/cm and C = 4.7 µF/cm ).5 We obtained ( = 6.1 cm2/Vs, ( = 19 cm2/Vs. From ∆V = e

h

VTh - VTh = 1.2 V, we can determine the band gap of 1.2 eV in consistency with the band gap of bulk MoS2 (1.3 eV).7 The accurate determination of band gap is enabled by the dominate contribution of quantum capacitance Cq when Fermi level is inside the band gap of the -1

semiconductor. This is because the total capacitance, C = (1/Cq + 1/Cg) , is composed by the contribution from both the quantum capacitance Cq (which scales proportionally to the density of state (DOS)) and the geometrical capacitance Cg. Here, C is dominated by quantum capacitance25 when Cg is very large (double layer thickness ~1 nm); and Cq is very small (the absence of the DOS and reduced trapping states inside the gap)27. Using similar estimation, band gap in ambipolar EDLTs made of organic semiconductors26 and WS227 could also be consistently determined. It is worth noting that total capacitance is contributed by both Cg and Cq if VG is larger than Vthh or Vthe , where DOS at valence or conduction band starts to be accessed, respectively. The carrier accumulation will then behave similarly to the case of graphene EDLT.25,30 The location of the p-n junction was traced by the voltage drop V4T between the voltage probes (as schematically shown in Figure 3d), which was measured simultaneously with the output curve (Figure 3a). As shown in Figure 3b, we calculated the local channel voltage V(x) as a function of the channel position (x) along the source-drain direction (x = 0 and L corresponds to the source and drain electrodes, respectively) under various VDS using the following equations:23 )* )+

/*

,-. 0. 1*2' 1*+3

)* )+

,-.

' ' 4*+1*0. 5*2' ' 6

(n-doped region)

(p-doped region)


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Here, µC and VTh were obtained from the fit of the output curve (Figure 3a). The boundary conditions were V(0) = 0 and V(L) = VDS. For simplicity, we assumed that the pinch-off points for the electrons and holes were identical in the device, i.e., the width of the p-n junction was ignored. Because the geometry of the device was fixed (L = 7 µm and the two voltage probes located at x = 3.5 and 5.5 µm), we simulated V4T variation as a function of VDS from the calculated V(x): V4T = V(5.5 µm) – V(3.5 µm) (the orange line in Figure 3c). At four representative VDS points (A-D, indicated as arrows in Figure 3c) in the output curve, the doping profiles in the channel are schematically illustrated in Figure 3d. Point A represents a profile at a typical saturation region where the pinch-off point appears adjacent to the drain electrode in which increasing VDS is almost fully dropped. The voltage probes measured a highly doped channel far from the pinch-off position, showing low V4T with a weak VDS dependence. Points B to D correspond to the ambipolar region, where both n- and p-type regions are present. With increasing p-doping at the drain electrode, the p-n junction gradually shifted to one of the voltage probes (Point B), thus entering the measurement region. At Point C, the p-n junction entered the region between the voltage probes showing the strongest enhancement in V4T before moving away from the left voltage probe at Point D. As shown in Figure 3c, the measured V4T qualitatively agrees with the simulation (orange line). The observed Points B, C, and D appeared at a higher VDS due to the VDS drops at the contract between the nor p-doped region and electrodes. Also, the measured voltage peak is broader than the calculation because we ignored the finite width of the p-n junctions (p-i-n junction in reality)16 in the simulation. In the real device operation, the finite width of the highly resistive p-n junction broadened the peak in simulated V4T (orange line) when the p-n junction passed through the voltage probes. As seen in the analysis in Figure 3, the I-V characteristics at 220 K are affected by contributions from the position and the profile of the p-n junction, and sensitively depend on the


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bias configurations (VGS and VDS). To make a stable p-n junction independent of bias, we used the freezing-while-gating technique to take advantage of liquid gating where charge accumulation is coupled to ion motion. After biasing VDS (VGS was fixed to 1 V) at 220 K to several voltages indicated by arrows in the inset of Figure 4, the device was cooled down to freeze the movement of ions by passing the glass transition temperature of DEME-TFSI at 200 K. Thus, a stable p-n junction was formed at 180 K. It is worth noting that despite the high gate efficiency found in this particular ionic liquid shown in many previous reports,5,6, 27-29 the glass transition temperature at around 200 K is not an ideal choice for commercialization, for which a room temperature operation is preferred. A further optimization should be made on finding an ionic liquid with balanced properties of high gate efficiency and high glass transition temperature so that the induced p-n junction could be stabilized after a glass transition close to the room temperature ready for application. As shown in Figure 4, the typical output curve of the MoS2 EDLT at 220 K changed substantially when the device was cooled to 180 K at different VDS. When VDS is in the linear region at 220 K, the channel is uniformly n-doped. Therefore, we observed almost symmetric IV characteristics at 180 K (filled circles in Figure 4). The non-linear features close to VDS = 0 V originated from the Schottky barriers formed at the electrodes. When the device was cooled with VDS at the saturation region (filled triangles), the I-V curves became highly anisotropic at 180 K, indicating that the bias direction preference in IDS began to appear because the channel was not uniformly doped due to the pinch-off. Additional characteristic changes were observed when we cooled the device with VDS bias in the ambipolar region (filled square). The I-V characteristic curve changed to a highly rectifying shape due to a stable bias-independent p-n junction fixed by the frozen ionic liquid. Here, a positive VDS means that the drain electrode (and the p-doped region) is positively biased against the source electrode (and the n-doped region), corresponding to the forward bias condition that is typical for p-n diodes. Noticeably, the forward current (IDS under positive VDS) is larger than that measured in junctions formed by


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cooling from the saturation region (filled triangles). This increase in IDS originates from the reduced Schottky barrier due to the appearance of the p-type region around the drain electrode, which decreases the contact resistance under larger positive VDS. In Figure 5, we compare the detailed I-V characteristic curves at temperatures above and below the glass transition of the ionic liquid (220 K and 180 K, respectively). For data measured at 180 K, the carriers were accumulated when VDS = 5 V and VGS = 1 V (red curve). At the low temperature (180 K), the output curve displayed diode-like rectifying behavior (blue curve) for the entire scanned region of VDS. Because the carrier concentrations for the electrons and holes under these bias conditions were not large enough to drive the insulator-to-metal transition in MoS2,5 the resistance of the device increased as the temperature was lowered from 220 K to 180 K, causing a reduction in the maximum IDS at VDS = 5 V. The inset of Figure 5 shows log|IDS| as a function of VDS bias for a more clear comparison between the forward and reverse biases after forming a stable p-n junction. Compared with the Schockley equation,23 the present diode formed by the freezing-while-gating technique showed a slight increase in the IDS under a reverse bias, indicating the difference from an ideal device behavior. The difference could be caused by the unique structure of the present device, in which the junction is only formed on the surface. The I-V characteristics were also affected by the underlying bulk conduction that is connected in parallel to the channel surface, limiting the reverse-bias performance. In summary, we demonstrated the formation and detection of field-induced p-n junctions in ambipolar MoS2-EDLTs by measuring the voltage drops between a set of voltage probes. The position of the intrinsic region of the p-n junction could be electronically detected and controlled. A bias-independent p-n junction was formed by cooling the device across the glass transition temperature of the ionic liquid in the ambipolar region. These junctions displayed clear rectifying characteristics. These results offer novel opportunities for fabricating and


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characterizing p-n junctions with EDLTs. EDLT showed superiorities over conventional ambipolar FETs in creating stable p-n junction and in the ability to control position and emission intensity separately. Fabricating this type of p-n diode with monolayer MoS2 is expected to have a crucial role in optoelectronic devices for valleytronics.9-12 The electrical creation, control, and characterization of the p-n junction structure may also be integrated with field-induced superconductivity in MoS2 devices6 for more novel functionalities.

Acknowledgements We thank M. Yoshida, Y. Kasahara for experimental support. S. Ishiwata is highly appreciated for his valuable advice on crystal growth. This work was supported by Strategic International Collaborative Research Program (SICORP), Japan Science and Technology Agency, Grant-inAid for Scientific Research (S) (No. 21224009), for Specially Promoted Research (No. 25000003), and the “Funding Program for World-Leading Innovative R&D on Science and Technology (FIRST Program)” from JSPS, Japan.


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(23) Sze, S. M. Physics of Semiconductor Device 2nd edition, Wiley, New York, NY, USA 1981 (24) Dimitrakopoulos, C. D.; Malenfant, P. R. L.; Adv. Mater. 2002, 14, 99. (25) Ye, J. T.; Craciun, M. F.; Koshino, M.; Russo, S.; Inoue, S.; Yuan, H.; Shimotani, H.; Morpurgo, A. F.; Iwasa, Y. Proc. Natl. Acad. Sci. U.S.A. 2011, 108, 13002. (26) Yomogida, Y.; Pu, J.; Shimotani, H.; Ono, S.; Hotta, S.; Iwasa, Y.; Takenobu, T. Adv. Mater. 2012, 24, 4392. (27) Braga, D.; Lezama, I. G.; Berger, H.; Morpurgo, A. F. Nano Lett. 2012, 12, 5218. (28) Pu, J.; Yomogida, Y.; Liu, K.-K.; Li, L.-J.; Iwasa, Y.; Takenobu, T. Nano Lett. 2012, 12, 4013 (29) Bao, W.; Cai, X.; Kim, D.; Sridhara, K.; Fuhrer, M. S. Appl. Phys. Lett. 2013, 102, 042104 (30) Das, S.; Pisana, S.; Chakraborty, B.; Piscanec, S.; Saha, S. K.; Waghmare, U. V.; Novoselov, K. S.; Krishnamurthy, H. R.; Geim, A. K.; Ferrari, A. C.; Sood, A. K. Nat. Nanothechnol. 2008, 3, 210


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Figure Captions Figure 1. Schematics of unipolar and ambipolar carrier accumulation in electric double-layer transistors (EDLTs). (a) A unipolar carrier accumulation mode. When VDS is much smaller than VGS, the transistor channel is formed by a single type of carrier. (b) An ambipolar carrier accumulation mode and formation of a p-n junction on the channel surface. When VDS - VGS is larger than a certain threshold, the effective gate voltage measured from the drain electrode becomes sufficiently negative to create hole accumulation. The induced holes near the drain electrode and the remaining electrons around the source electrode form a p-n junction on the channel of the EDLT. Figure 2. Basic transport properties of a thin-flake MoS2 EDLT (device1) at 220 K. (a) Transfer curve with a full-cycle gate sweep (VGS) at a speed of 20 mV/s. We limited the gate sweeping range to -5 V < VGS < 3 V to suppress a possible chemical reaction. (b) Output curve with various VGS values from -0.5 V to 1.5 V in a step of 0.1 V. The VDS scan speed was 20 mV/s. When VGS > 0.8 V, typical n-type FET operation was observed in the linear and saturation regions, while at small and negative VGS values, IDS exhibited an increase at large VDS, indicating that the transistor is in an ambipolar region. (c) Time evolution of the transfer curve during three full cycles of the VGS sweep. The maximum ON and OFF currents are highly reproducible. (d) The sample dependence of the transport properties. Hysteresis denotes VG difference required for the identical IDS between charge accumulation and release, while shift represents VG shift between two successive VG scan. Figure 3. Electrical detection of a p-n junction (device2). (a) An output curve measured at 220 K (open circle) and a fit to the output curve (red line). The second upturn in the output curve at high VDS is evidence for the emergence of hole doping around the drain electrode. (b) The calculated voltage profile across the channel under various fixed VDS values using parameters determined from the fitting of the output curve (red line in (a)). The grey area corresponds to the


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measurement area of the voltage probes. (c) The four-terminal voltage drop (V4T) measured during the same scan as the output curve (open circle in (a)) and the numerically simulated V4T from the calculated voltage profile in (b) (orange line). The evolution of the four-terminal voltage drop recorded the movement of the p-n junction. (d) Schematics of charge accumulation for four representative bias conditions of VDS as denoted by A-D in (a). Figure 4. The I-V characteristics at 180 K (device3). The inset shows the output curve at 220 K measured right before each cooling down to ensure the device stability. After being biased at VDS denoted by arrows in the inset, the device was cooled from 220 K to 180 K to reduce ionic motion. The I-V characteristics in the main panel were recorded at 180 K. The I-V characteristics are strongly dependent on the initial bias condition. Cooling the device when VDS resides in the linear region resulted in symmetric I-V characteristics with a slight nonlinearity that originated from the Schottky contact between the channel and electrodes. Increasing asymmetry was observed when the device was cooled with VDS entering the saturation region. Cooling at the ambipolar region created a clear rectifying I-V dependence because of the formation of the p-n junction at the channel surface. Figure 5. A comparison of the I-V characteristics at 220 K and 180 K (device4). The inset shows a semi-log plot of the 180 K curve in the main figure. The device was cooled from 220 K to 180 K by setting VGS to 1 V and VDS to 5 V. During cooling, the IDS at VDS = 5 V decreased with decreasing temperature.


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Figure 1


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Figure 2


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Figure 3


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Figure 4


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Figure 5


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Formation of a Stable pân Junction in a Liquid-Gated MoS2

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Formation of a Stable pân Junction in a Liquid-Gated MoS2