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Guiding the Growth of Conductive Filament by Nano-Indentation to Improve Resistive Switching Yiming Sun, Cheng Song, Jun Yin, Xianzhe Chen, Qin Wan, Fei Zeng, and Feng Pan ACS Appl. Mater. Interfaces, Just Accepted Manuscript • DOI: 10.1021/acsami.7b09710 • Publication Date (Web): 13 Sep 2017 Downloaded from http://pubs.acs.org on September 14, 2017
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Guiding the Growth of Conductive Filament by Nano-Indentation to Improve Resistive Switching Yiming Sun, Cheng Song,* Jun Yin, Xianzhe Chen, Qin Wan, Fei Zeng, and Feng Pan§ Key Laboratory of Advanced Materials (MOE), School of Materials Science and Engineering, Tsinghua University, Beijing 100084, China
ABSTRACT: Redox-based memristor devices, which are considered as a promising nonvolatile memory, mainly operate through the formation/rupture of nanoscale conductive filaments. However, the random growth of conductive filaments is an obstacle for the stability of memory devices and the cell-to-cell uniformity. Here, we investigate the guiding effect of nano-indentation on the growth of conductive filaments in resistive memory devices. The nano-indented top electrodes generate electric field concentration and the resultant precise control of a conductive filament in two typical memory devices Ag/SiO2/Pt and W/Ta2O5/Pt. The nano-indented cells possess a much larger ON/OFF ratio, a sharper RESET process, a higher response speed and better cell-to-cell uniformity, compared with the conventional ones. Our finding reflects that the use of large-scale nano-transfer printing might be a unique way to improve the performance of resistive random access memory.
KEYWORDS: resistive switching, nano-indentation, conductive filament, precise control, uniformity, nano-transfer printing
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1. INTRODUCTION Resistive random access memory (RRAM) is considered as one of the most promising nonvolatile memory due to its simple metal-insulator-metal (MIM) structure, low power consumption, high response speed, high storage density and complementary-metal-oxide-semiconductor (CMOS)-compatibility.1−3 Among various types of resistive memories, redox-based RRAM operate through the formation and rupture of conductive filaments (CFs). However, the random growth of CFs result in unexpected resistive switching behaviors, unsatisfied endurance and cell-to-cell variation, which are supported by the direct observation through the transmission electron microscope (TEM) graphs.4-6 Several methods have been investigated for the precise control of the CF growth, among which manipulating electric fields by device design proves to be a prospective method to address the issue, including inserting metal nanoparticles7,8, impurity doping9, and fabricating tips10,11. For example, Shin et al.10 utilized anisotropic etching to prepare 2 µm-pyramids in the Ag/Al2O3/Pt, and You et al.11 sputtered Ag on the etched SiO2 patterned with solvent-assisted nano-transfer printing (S-nTP) to acquire Ag nanocones. However, the methods mentioned above require either specific materials systems or a complicated etching process, demanding urgently for more simple and universal ways to fabricate reliable memory devices. In this study, we consider using physically based deformation to attain tips in memory cells. Nano-indentation is a technique developed over the last decade for probing the mechanical properties of materials at very small scales12, which is commonly used in the mechanical characterization of thin films and thin surface layers at present. We first take advantage of nano-indentation tests on the storage media to obtain inverted tri-pyramids. This fabrication method is compatible with the 2
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standard photo lithography and lifting-off process, without any additional microelectronic process. We select a typical electro-chemical metallization (ECM) mechanism system Ag/SiO2/Pt6,11,13 and a valence change memory (VCM) system W/Ta2O5/Pt14,15, to realize our idea. The observation of the sectional sample under TEM proves that the thickness of the flat film and the distance between Ag pyramids and Pt are 80 and 40 nm, respectively. The nano-indented memory cells possess better resistive switching properties including a huge ON/OFF ratio, a high response speed, concentrated operating voltages and resistances, compared with conventional ones. Our method is simple and suitable for improving the performance of most RRAM systems. This work may provide guidance to the application of nano-transfer printing in memory industry.
2. RESULTS AND DISCUSSION Device Design and Fabrication. The nano-indented RRAM schematic is shown in Figure 1a. The special tri-pyramid-shaped electrodes are designed to provide an electric-field-concentrated region for the CF growth, as shown in Figure 1b. Figure 1c−j show the fabrication process in both the top and front views. Firstly, media layers (~80 nm) are sputtered on the cleaned commercial Pt/Ti/SiO2/Si substrates as presented in Figure 1c−d. Secondly, positive photoresist is spin-coated on the media layer. An array of independent circles (φ~100 µm) is fabricated after ultraviolet exposure and development, as Figure 1e−f shows. Next, the circle-shaped pits can be observed under the optical microscope and the nano-indentations (depth~40 nm) can be fabricated at the selected locations in the pits (Figure 1g−h). Finally, the samples are placed in the vacuum chamber and the top electrode (TE) metals are deposited, followed by lift-off process (Figure 1i−j). In this way, we can ensure that the TE 3
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metals can enter the indentations thereby forming the designed memory cells. The whole process is carried out at room temperature, which is compatible with the CMOS process. More details of the fabrication process for the tri-pyramid-shaped devices are described in the Experimental Section. After the fabrication, we use the atomic force microscope (AFM) scanning to observe the nano-indentation on the SiO2 media layer before and after sputtering Ag TE, as displayed in Figure 2a−2b. The indentation is obviously shaped like an inverted tri-pyramid with a tip. The SiO2 layer has an evident bump around the indentation just like a micro-volcano. The indentation is deep enough that the tip location can be observed under AFM even though TE is deposited on it. In order to ensure that the parameters of the nano-indented memory devices are consistent to our design, we fabricate a TEM sectional sample from one of the high-performance cells. TEM images are shown in Figure 2c. In the expanded scale images, the thickness of the flat SiO2 media layer is ~80 nm (Figure 2d), and the distance between the tip of nano-indentation and the bottom electrode (BE) is ~40 nm (Figure 2e). In this way, a tip location that has a much shorter distance than the flat film from BE has been created. Resistive Switching Properties. The direct current (DC) voltage is applied to the TE and the BE is grounded by the use of a probe station, as shown in Figure 1a. The conventional devices are fabricated for a comparison, of which the functional layers are SiO2 (~40 nm) and Ta2O5 (~40 nm). Figure 3 displays the electrical performance of the Ag/SiO2/Pt system. Firstly, a positive voltage is first applied to the TE with the compliance current (cc) of 1 mA to prevent thermal-induced breakdown.16−18 And then a negative voltage is applied to the TE. Both conventional memory cells and nano-indented ones show stable bipolar resistive switching behaviors after the 4
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forming process as presented in Figure 3a. For the Ag/SiO2/Pt, the conventional cell exhibits high resistance state (HRS) of ~105 Ω, low resistance state (LRS) of ~102 Ω and the corresponding ON/OFF ratio is ~103, while the nano-indented one exhibits HRS of ~1010 Ω, LRS of ~102 Ω and the corresponding ON/OFF ratio is ~108. The typical I-V (Current-Voltage) curves reveal that the nano-indented cells have a smaller VRESET, a much larger ON/OFF ratio and much sharper SET and RESET process, compared with the conventional ones. The histograms and statistical charts in Figure 3b show the switching voltage distributions obtained from the I-V curves. The switching voltages of convention cells distribute in widespread ranges of 0.25 to 4.80 V (SET) and −4.20 to −0.56 V (RESET), while the switching voltages of nano-indented cells distribute in ranges of 0.36 to 2.53 V (SET) and −1.64 to −0.42V (RESET). Obviously, the switching voltages of nano-indented cells are much more concentrated than those of conventional ones. Figure 3c presents the HRS/LRS cumulative probability of conventional and nano-indented cells. The resistances of nano-indented cells distribute around 102 Ω for LRS and 1010−1011 Ω for HRS. In contrast to the nano-indented ones, the resistances of conventional cells scatter in a scale of around 102 Ω for LRS and 104−106 Ω for HRS. The tri-pyramid-shaped electrodes obviously improve the uniformity of resistive switching behaviors in the SiO2 media layer. Meanwhile, the retention time is tested under both HRS and LRS, the nano-indented memory devices can be maintained for longer than 105 s at room temperature without any obvious degradation. An identical experiment was carried out for W/Ta2O5/Pt. Although the ON/OFF ratio of the nano-indented Ag/SiO2/Pt is much higher than W/Ta2O5/Pt and they belong to different mechanisms, the electrical properties show qualitatively similar tendency. The conventional device exhibits HRS of ~105 Ω, LRS of ~102 Ω and the 5
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corresponding ON/OFF ratio is ~103, while the nano-indented one exhibits HRS of ~106 Ω, LRS of ~102 Ω and the ON/OFF ratio is ~104. Also, the distribution of the switching voltage and the resistance are much more concentrated, even better than those of Ag/SiO2/Pt, as shown in Figure 4b−c. The retention time is also up to 105 s at room temperature without any obvious degradation (Figure 4d). Response Time Tests. For this experiment, in order to evaluate the response speed of memory devices, we designed a set of pulses (±5 V for SET and RESET) and used a small reading voltage (constant 0.1 V) before and after pulses, as illustrated in Figure 5a−b. We can obtain the response time by the step decreased pulse width (reduce 10 ns each time from 200 ns) until the devices complete the SET/RESET process. Figure 5c and 5d are I-V curves of the SET and RESET process, respectively. For the SET process, the current lies in a low state under the reading voltage. After the positive pulse, the cell is switched from HRS to LRS successfully. Therefore, the current becomes large under the same reading voltage. The RESET process is similar. The shortest pulse width corresponds to the shortest response time. Corresponding data are displayed in Table 1. In contrast, our nano-indented method does not affect the response speed of SET process significantly, but effectively accelerate the speed of RESET process. Possible reasons will be discussed in the next part. These memory cells have a much higher response speed than that of the flash memory19,20, which is one of the most competitors as next-generation nonvolatile memories. Mechanism of Resistive Switching Behavior in Nano-indented Devices. To further understand the resistive switching mechanism of the memory device, we replot the I-V characteristics in a log-log scale shown in Figure 4a (Ag/SiO2/Pt) and 4b (W/Ta2O5/Pt). The I-V relationships in LRS both exhibit an Ohmic conductive behavior with a slope of about 1.00, which is regarded to the formation of CFs in the 6
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device during the SET process.4,21 As for HRS, the conductive mechanism is more complex. Fitting results show that the charge transport behavior accords with the space charge limited conduction (SCLC)22-24, which is composed of three portions: the Ohmic region (I∝V), the Child’s law region (I∝V2) and a steep current increase region.4,15 As is reported in previous papers, we can estimate that Ag/SiO2/Pt conforms to the ECM mechanism6,11,13 and W/Ta2O5/Pt conforms to the VCM mechanism14,15. The former depends on Ag CFs for resistive switching while the latter depends on VO. Next, we demonstrate the mechanism of the RS property improvement in the nano-indented Ag/SiO2/Pt memory devices. Figure 6c−e and 6f−h show the process of resistive switching behaviors in a single cell. As is reported before, the growth direction is from the electrochemically inert counter electrode (CE) to the electrochemically active electrode (AE) in the Ag/SiO2/Pt structure.5 When a positive voltage is applied to the active Ag TE, Ag atoms are oxidized into Ag+ ions (Ag−e−→ Ag+) as shown in Figure 6c and 6f. The positively charged ions migrate on to the Pt BE along the electric field and are reduced back to Ag atoms (Ag++e−→Ag). After the accumulation of Ag atoms as Figure 6d and 6g show, the Ag CFs are formed, which results in the LRS. Obviously, the atom-to-atom coupling of conductive filaments displays shape-like Gaussian distribution even at nanoscale, which plays an important role in the RS behavior.5,25−27 Moreover, the growth mode depends on the cluster interactions and formation processes, which are strongly affected by kinetic factors according to the electro-dynamics.27−29 When a negative voltage is applied to the Ag TE, an electrochemical dissolution takes place somewhere (usually at the thinnest locations) along the CF, resetting the 7
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cell back to the HRS (Figure 6e and 6h).17,30 It should be noted that in the conventional cell, the Ag CFs grow randomly and have a large quantity. As a result, it is hard to diffuse the Ag CFs completely in the RESET process, which may impair the properties of the memory cell. In the nano-indented cell, the tri-pyramid-shaped electrode creates an electric-field-concentrated region, which can guide the orientated growth of CFs. Due to the ultra-small size of the nano-indentations (less than 1 µm2), the tip can control the number of CFs and facilitate the RESET process. Therefore, the easier RESET process leads to smaller RESET switching voltages and a higher response speed reasonably, which explains the improvement in response time to some extent. Moreover, although the W/nano-indented Ta2O5/Pt memory cells display similar improvement of RS properties, the mechanism is different from the ECM Ag/SiO2/Pt system. When the TE is positively biased, the VOs will migrate toward the cathode (Pt) and then accumulate in its vicinity. Because VOs that can create an acceptor level near the conduction band are the sources of electron carriers in the nuclei of n-type semiconducting CFs. Subsequently, these nuclei would grow towards the anode (W). Once the CF is complete, the cell is SET to LRS. When the TE is negatively biased, most of Joule heat would be generated at the thinnest part of the CFs, accelerating the mobility of VOs and leading to the rupture of the VO CFs.1,14 The source of Ag CFs is TE, mainly the tip location, while VOs can form anywhere in the Ta2O5 layer, so the distribution of VOs is much more widespread than that of Ag+, and the resultant HRS resistance of W/Ta2O5/Pt is much lower than that of Ag/SiO2/Pt. The ON/OFF ratio depends on both the LRS and HRS. When the memory cell lies in HRS, the resistance depends on the insulating media layer31, hence the thickness and condition of flat media layers are dominant. In the conventional cell, for the 8
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RESET process with a negative bias voltage applied to the TE, the filaments near the TE/SiO2 interface with the highest electrical potential is electrochemically dissolved, back to the HRS (Figure 6e).32 Due to a large amount of filaments, the ruptured filament segment is still left in the media, resulting in the actual thickness of the media layer is much lower than the nominal one. Differently, in the nano-indented cell, the filaments can be dissolved in the RESET process much more completely due to the concentrated electric field, so the resistance of HRS is much higher than that in conventional cells. For the LRS, the conductivity depends on the CFs33, and thus the resistances are comparable in both two kinds of cells. Therefore, the ON/OFF ratios are much larger after nano-indented in both memory systems. The cell-to-cell uniformity also shows a remarkable improvement, whether the resistances or the switching voltages. In the conventional cell, as mentioned above, when it is set to LRS, the random growth and the number of CFs (Ag or VO) is uncontrollable, which lead to the dispersive resistances. The unexpected appearance can be improved by the tri-pyramid electrodes. Only the location near the tip exists redox reactions and CFs. When it is reset to HRS, CFs usually cannot be ruptured neatly in conventional cells due to the random SET process. In comparison, the nano-indented cells can be RESET back to the originate state to the maximum extent, which apparently causes the better uniformity.
CONCLUSIONS In summary, a simple and effective method, which is compatible with the photolithography and stripping of CMOS, is developed to improve resistive switching properties in both the ECM and VCM mechanisms of RRAM. Two kinds of nano-indented memory devices based on Ag/SiO2/Pt and W/Ta2O5/Pt are developed 9
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with an ultrahigh ON/OFF ratio, a sharp RESET process, excellent cell-to-cell uniformity, considerable response time and retention time. Moreover, a reasonable physical model is established to explain the better properties in the modified memory devices.
We
expect
this
method
can
provide
guidance
for
fabricating
high-performance and high-stability memory applications. This work may promote the application of large-scale nano-transfer printing in RRAM.
3. EXPERIMENTAL SECTION Device Fabrication. The Ag/SiO2/Pt and W/Ta2O5/Pt devices were completely fabricated at room temperature on commercial Pt(~120nm)/Ti(~15nm)/SiO2/Si substrates. We take the Ag/SiO2/Pt as an example. Firstly, the substrates were ultrasonically cleaned in acetone, ethanol and deionized water for a period of 5 min, respectively. Secondly, the SiO2 films (~40 nm) were deposited by radio-frequency (RF) magnetron sputtering with a ceramic SiO2 target (99.99% purity, 3 in. in diameter). The base vacuum of the chamber was better than 8 × 10−4 Pa. During the deposition, the RF power and pure argon atmosphere were taken to be 200 W and 0.35 Pa, respectively. Thirdly, photoresist (PR1-500A, Futurrex, Inc.) was spin-coated on the substrate at 3000 rpm for 40 s and then dried at 115 °C for 40 s. The ultraviolet intensity was 3.5 mW·cm–2 and the exposure time was 23 s. Forthly, nano-indentations were fabricated in the pits made by photoetching. Finally, the Ag top electrodes (~200 nm) were deposited by DC magnetron sputtering, followed by the lift-off process. In the W/Ta2O5/Pt system, Ta2O5 was deposited by RF magnetron sputtering with a Ta2O5 target with the power of 100W and the pure argon atmosphere of 0.35 Pa, and the W electrodes were deposited by DC magnetron sputtering. Device Characterization. All electrical properties of the RRAM devices were 10
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characterized at room temperature and in atmospheric environment. The pulse measurements were conducted on an arbitrary function generator (B1530, Agilent), and the others were all conducted on a semiconductor device analyzer (B1500A, Agilent). All TEM specimens were fabricated by an focused ion beam (FIB) system (LYRA 3, TESCAN). TEM images of the device in LRS were obtained from JEOL 2011 with 200 keV accelerating voltage. TEM images of the virgin device and the device in HRS were obtained from JEOL 2010F (200 keV).
AUTHOR INFORMATION Corresponding Author *
[email protected] (C.S.)
§
panf@@mail.tsinghua.edu.cn (F.P.)
Notes The authors declare no competing financial interest. ACKNOWLEDGMENT This work was supported by Ministry of Science and Technology of the People's Republic of China (Grant No. 2016YFA0203800) and National Natural Science foundation of China (Grant Nos. 51231004). The authors are grateful to the support of Beijing Innovation Center for Future Chip.
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Deposited Carbon Films -A New Insight. Carbon 2016, 122, 653-663 26. Ali, M.; Lin, I. Phase Transitions and Critical Phenomena of Tiny Grains Thin Films Synthesized in Microwave Plasma Chemical Vapor Deposition and Origin of v1 Peak. arXiv: 1604.07152 27. Ali, M.; Lin, I. Tapping Opportunity of Tiny Shaped Particles and Role of Precursor in Developing Shaped Particles. arXiv: 1605.02296 28. Hu L.; Fu S.; Chen Y.; Cao H.; Liang L.; Zhang H.; Gao J.; Wang J.; Zhuge F. Ultrasensitive Memristive Synapses Based on Lightly Oxidized Sulfide Films. Adv. Mater. 2017, 29, 1606927. 29. Yang, Y.; Gao, P.; Li, L.; Pan, X.; Tappertzhofen, S.; Choi, S.; Waser, R.; Valov, I.; Lu, W. Electrochemical Dynamics of Nanoscale Metallic Inclusions in Dielectrics. Nat. Commun. 2014, 5, 4232. 30. Suh, Y.; Lu, N.; Lee, S. H.; Chung, W. S.; Kim, K.; Kim, B.; Ko, M. J.; Kim, M. J. Degradation of a Thin Ag Layer Induced by Poly (3,4-ethylenedioxythiophene): Polystyrene Sulfonate in a Transmission Electron Microscopy Specimen of an Inverted Polymer Solar Cell. ACS Appl. Mater. & Interfaces 2012, 4, 5118-5124. 31. Yalon, E.; Karpov, I.; Karpov, V.; Riess, I.; Kalaev, D.; Ritter, D. Detection of the Insulating Gap and Conductive Filament Growth Direction in Resistive Memories. Nanoscale 2015, 7, 15434-15441. 32. Peng, S.; Zhuge, F.; Chen, X.; Zhu, X.; Hu, B.; Pan, L.; Chen, B.; Li, R. Mechanism for Resistive Switching in an Oxide-based Electrochemical Metallization Memory. Appl. Phys. Lett. 2012, 100, 072101. 33. Liu, Q.; Long, S.; Lv, H.; Wang, W.; Niu, J.; Huo, Z.; Chen, J.; Liu, M. Controllable Growth of Nanoscale Conductive Filaments in Solid-Electrolyte-Based ReRAM by Using a Metal Nanocrystal Covered Bottom Electrode. ACS Nano 2010, 4, 15
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6162-6168.
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Table 1. The response time of the conventional memory cells and nano-indented ones. Conventional
Nano-indented
Response Time SET
RESET
SET
RESET
Ag/SiO2/Pt
30 ns
100 ns
30 ns (−)
50 ns (↓)
W/Ta2O5/Pt
100 ns
100 ns
90 ns (↓)
80 ns (↓)
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Figure Captions: Figure 1. (a) Schematic of the nano-indented memory device. (b) Expanded-scale single cell of the device. (c-j) Top and front views of the fabrication steps for the tri-pyramid-shaped TE.
Figure 2. AFM images of (a) nano-indentation on the SiO2 media layer and (b) nano-indentation under the Ag TE. (c) TEM images of the fabricated Ag tri-pyramid/ nano-indented SiO2/ Pt memory device. (d) Expanded-scale image of the flat film part. (e) Expanded-scale image of the location of the tri-pyramid tip.
Figure 3. (a) Typical I-V curves of the conventional Ag/SiO2/Pt memory cells and nano-indented ones with a compliant current of ~1 mA. (b) Histograms of the SET/RESET switching voltage in the conventional Ag/SiO2/Pt memory cells and nano-indented ones during 50 cycles. (c) Cumulative probability of HRS and LRS values for the conventional cells and nano-indented ones. (d) Retention tests of the nano-indented Ag/SiO2/Pt memory cells. The reading voltage for all resistive states was 0.08V.
Figure 4. (a) Typical I-V curves of the conventional W/Ta2O5/Pt memory cells and nano-indented ones with a compliant current of ~1 mA. (b) Histograms of the SET/RESET switching voltage in the conventional W/Ta2O5/Pt memory cells and nano-indented ones during 50 cycles. (c) Cumulative probability of HRS and LRS values for the conventional cells and nano-indented ones. (d) Retention tests of the nano-indented W/Ta2O5/Pt memory cells. The reading voltage for all resistive states was 0.08 V. 18
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Figure 5. Switching characteristics of conventional Ag/SiO2/Pt under pulsed voltages. (a-b) the SET/RESET pulse, SET: 5V/20ns, RESET: -5V/20ns, and the basal voltage is 0.1V in order to read the HRS/LRS values after pulses. (c-d) the I-V curves under the tests.
Figure
6.
Log-log
I-V
tri-pyramid/nano-indented
curves SiO2/Pt
with memory
local cells
linear and
fitting (b)
W
of
(a)
Ag
tri-pyramid/
nano-indented Ta2O5/ Pt memory cells. Schematic diagrams for the mechanism of the resistive switching process in (c-e) Ag/SiO2/Pt and (f-h) Ag tri-pyramid/nano-indented SiO2/Pt. (Oxidation is a process in which a chemical substance changes because of the emergence of oxygen. Reduction is a process in which electrons are added to an atom or ion.)
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Figure 1 140x110mm (300 x 300 DPI)
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Figure 2 140x160mm (300 x 300 DPI)
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Figure 3 140x121mm (300 x 300 DPI)
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Figure 4 140x120mm (300 x 300 DPI)
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Figure 5 140x108mm (300 x 300 DPI)
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Figure 6 140x137mm (300 x 300 DPI)
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