High-Mobility and Hysteresis-Free Flexible Oxide Thin-Film

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High-Mobility and Hysteresis-Free Flexible Oxide Thin-Film Transistors and Circuits by using bilayer Sol-Gel Gate Dielectrics Jeong-Wan Jo, Kwang-Ho Kim, Jaeyoung Kim, Seok-Gyu Ban, Yong-Hoon Kim, and Sung Kyu Park ACS Appl. Mater. Interfaces, Just Accepted Manuscript • DOI: 10.1021/acsami.7b10786 • Publication Date (Web): 27 Dec 2017 Downloaded from http://pubs.acs.org on December 28, 2017

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ACS Applied Materials & Interfaces

High-Mobility and Hysteresis-Free Flexible Oxide Thin-Film Transistors and Circuits by using bilayer Sol-Gel Gate Dielectrics Jeong-Wan Jo 1†, Kwang-Ho Kim 2†, Jaeyoung Kim 3, Seok Gyu Ban 1, Yong-Hoon Kim 3*, and Sung Kyu Park 1* 1

School of Electrical and Electronics Engineering, Chung-Ang University, Seoul 06980, Korea,

2

Korea Electronics Technology Institute, Seongnam 13509, Korea

3

School of Advanced Materials Science and Engineering, and SKKU Advanced Institute of Nanotechnology

(SAINT), Sungkyunkwan University, Suwon 16419, Korea †

: Equal contribution

Corresponding Authors : Prof. Sung Kyu Park ([email protected]) and Prof. Yong-Hoon Kim ([email protected])

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Abstract In this paper, we demonstrate high performance and hysteresis-free solution-processed indiumgallium-zinc-oxide (IGZO) thin film transistors (TFTs) and high-frequency-operating 7-stage ring oscillators using a low-temperature photochemically activated Al2O3/ZrO2 bilayer gate dielectric. It was found that the IGZO TFTs with single layer gate dielectrics such as Al2O3, ZrO2 or sodium-doped Al2O3 exhibited large hysteresis, low field-effect mobility or unstable device operation owing to the interfacial/bulk trap states, insufficient band offset or a substantial number of mobile ions present in the gate dielectric layer, respectively. In order to resolve these issues and to explain the underlying physical mechanisms, a series of electrical analyses for various single and bilayer gate dielectrics was carried out. It is shown that compared to single layer gate dielectrics, the Al2O3/ZrO2 gate dielectric exhibited high dielectric constant of 8.53, low leakage current density (~10-9 A cm-2 at 1 MV cm-1) and stable operation at high frequencies. Using the photochemically activated Al2O3/ZrO2 gate dielectric, 7-stage ring oscillators operating at an oscillation frequency of ~334 kHz with propagation delay of < 216 nanoseconds per stage were successfully demonstrated on a polymeric substrate.

Keywords Hysteresis-free, Oxide gate dielectric, Bilayer, Flexible electronics, Photochemical activation


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1. INTRODUCTION Solution-processed metal-oxide semiconductors are now considered as a promising candidate for the next-generation electronics such as transparent and flexible electronics owing to their high carrier mobility, high optical transparency, excellent operational stability and the availability of diverse fabrication methods1– 6

. In spite of their extraordinary electrical performance, the high-temperature annealing process has been

problematic in realizing fully solution-processed metal-oxide thin-film transistors (TFTs) on flexible or stretchable substrates. To overcome this limitation, alternative low-temperature annealing methods have been proposed for oxide semiconductors including sol-gel on chip process3, combustion synthesis2, deep ultraviolet photochemical activation5, and microwave annealing process7. In addition to oxide semiconductors, the development of low-temperature processable gate dielectrics has been a challenging issue since the gate dielectric plays a key role in determining the device performance such as field-effect mobility, operating voltage and stability8,9. Consequently, an intensive investigation on solution-processed gate dielectrics has been carried out including high-k dielectrics10–17, self-assembled monolayer dielectrics18– 20

, nanoparticle-based dielectrics21–23, ion gel-polymer electrolyte dielectrics24–27 and ferroelectric

dielectrics28,29. However, the vast majority of these previous works often employed relatively high temperature processes for the formation of gate dielectrics9,10,30–33, and/or the dielectrics exhibited relatively poor high-frequency operations10,32,34. More recently, a few groups have reported solution-processed metaloxide gate dielectrics fabricated at relatively low temperature ( 20). However, ZrO2 has relatively narrow band gap (Eg ~ 5.8 eV) and exhibits high leakage current, which may be disadvantageous for gate dielectric layers. Particularly, when wide band gap metal oxide 3 ACS Paragon Plus Environment


semiconductors are used as a channel layer, the gate dielectrics should have reasonably high band gap for sufficient band offset at the interface. Comparably, Al2O3 is a wide band gap material (Eg ~ 8.7 eV) and exhibits low leakage current. However, the dielectric constant of Al2O3 is relatively lower (ε ~ 9) than other high-k dielectric materials. In order to increase the dielectric constant of Al2O3, a sodium doping method has been suggested10. The sodium-doped Al2O3 has a layered crystal structure in which loosely bonded Na+ ions are sandwiched by two spinel blocks made of Al and O atoms. In this structure, the Na+ ions can move easily in the ab plane, giving a relatively high dielectric constant (~170)10. However, since the ion mobility limits the polarization response time, the capacitance of a sodium-doped Al2O3 film decreases with frequency, which interferes with the operation of the circuit in the high frequency range. In order to reduce this undesirable polarization delaying effect in a sodium-doped Al2O3 film, a relatively high temperature process (> 800 °C) is generally required. In overall, using a single layer oxide gate dielectric, it is rather difficult to obtain the key requirements for gate dielectrics at low process temperatures. Therefore, in order to meet these requirements simultaneously at a low-temperature, a combination of gate dielectrics such as the Al2O3·ZrO2·Na-Al2O3 (sodium-doped Al2O3) may be favorable rather than by using a single layered gate dielectric layer. In this study, we demonstrate high-performance and hysteresis-free IGZO TFTs by using bilayerstructured solution-processed gate dielectrics which outperform those with single layer gate dielectrics. More importantly, the bilayer-structured gate dielectrics could be fabricated at a low-temperature by using deep ultraviolet (DUV)-induced photochemical activation process5,14,15. Here, we systematically investigated the electrical properties of various single and bilayer oxide gate dielectrics (Al2O3, ZrO2, Na-Al2O3, Al2O3/ZrO2, ZrO2/Al2O3 and Na-Al2O3/ZrO2) for high-performance IGZO TFTs. Also, the correlation between the gate dielectric structure and the electrical performance of IGZO TFTs were investigated such as the field-effect mobility and hysteresis behaviors. Furthermore, by using the optimized gate dielectric structure of Al2O3/ZrO2 bilayer, high performance and high-frequency-operating IGZO TFTs and 7-stage ring oscillator were demonstrated on a flexible polymer substrate.


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2. EXPERIMENTAL SECTION Preparation of metal-oxide precursor solutions: To prepare the precursor solutions for desired gate dielectrics, metal precursors of aluminum nitrate nonahydrate (Al(NO3)3·9H2O), zirconium acetylacetonate (Zr(C5H7O2)4), zirconium oxynitrate hydrate (ZrO(NO3)3·xH2O) or sodium bisulfite (mixture of NaHSO3 and Na2S2O5) were dissolved in 2-methoxyethanol (2-ME) (all from Sigma-Aldrich). After dissolving the precursors in the solvent, the solutions were stirred for more than 3 h at 75 °C. For the IGZO precursor solution, metal precursors of indium nitrate hydrate (In(NO3)3·xH2O), gallium nitrate hydrate (Ga(NO3)3·xH2O) and zinc acetate dehydrate (Zn(CH3COO)2·2H2O) (all from Sigma-Aldrich) were dissolved in 2-ME and the solution was stirred for more than 3 h at 75 °C. (Table S1, Supporting Information) Fabrication and characterization of oxide gate dielectric layers: For the characterization of gate dielectrics, single layer Al2O3, ZrO2 and Na-Al2O3 gate dielectrics and bilayer Al2O3/ZrO2, ZrO2/Al2O3 and Na-Al2O3/ZrO2 (top layer/bottom layer) gate dielectrics were fabricated on Cr (100-nm-thick) glass substrates. Each gate dielectric layer was spin-coated after an O2 plasma treatment (30 W) and photoannealed in N2 atmosphere for 120 min. For the bilayer gate dielectrics, consecutive spin-coating and photoannealing processes were carried out. The DUV-assisted photo-annealing process was performed by using a high-density UV treatment system having a low-pressure mercury lamp (emission wavelengths of 253.7 nm (90%) and 184.9 nm (10%); UV253H, Filgen) in N2-purging condition. The output energy intensity of the lamp was 25-28 mW cm-2. During the photo-annealing process, the radiant thermal energy from the mercury lamp increased the temperature of the substrate up to 130-180 °C which was maintained during the process. The surface temperature of the substrate was measured by using an infrared camera (InfraCAM, FLIR System). The thicknesses of Al2O3, ZrO2, Na-Al2O3, Al2O3/ZrO2, ZrO2/Al2O3 and Na-Al2O3/ZrO2 gate dielectrics were 60 nm, 12-60 nm, 49 nm, 65 nm, 69 nm and 54 nm, respectively. The capacitancefrequency (C-F) and leakage current density measurements were carried out on the metal-insulator-metal (MIM) structure. The dielectric constants were extracted from the MIM capacitance values measured at 100



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Hz. All the film thicknesses were measured by using an alpha-step (KLA-Tenco, P-10). Capacitance and leakage current characteristics were measured by using an LCR meter (Agilent 4284A). Fabrication and characterization of solution-processed IGZO TFTs and circuits: For the fabrication of solution-processed IGZO TFTs on glass substrates, 0.7 mm-thick glass substrates were used. As a gate electrode, sputter-deposited Cr (50 nm) or thermally evaporated Au/Cr (45 nm/5 nm) was used which was patterned by standard photolithography and wet etching. On the gate electrode, single layer or bilayer gate dielectric layer was coated by using spin coating process and photo-annealed in N2-purging condition for 120 min. Via holes were fabricated on gate electrodes by photolithography and wet etching process for gate contact. For the channel layer, the IGZO precursor solution was spin-coated and photoannealed in N2-purging condition for 120 min. The photo annealing conditions for IGZO layer were identical to those for gate dielectric layers described above. The thickness of IGZO film was ~9 nm regardless of the gate dielectric layer as shown in Figure S1 (Supporting Information). After patterning the channel layer by photolithography, IZO source/drain electrodes (100 nm-thick) were deposited and patterned by lift-off process. For the characterization of IGZO TFTs, a semiconductor parameter analyzer (Agilent 4156C) was used and all the electrical characterizations were conducted in air ambient and dark condition. For the fabrication of solution-processed IGZO TFTs on flexible substrates, ~10 µm-thick polyimide (PI) film was used as a substrate. The PI substrates were prepared by spin-coating a PI solution (Polyzen 150, PICOMAX) on a carrier glass substrate and annealing at 300 °C. As a gate electrode, thermally evaporated Au/Cr (45 nm/5 nm) was used. On the gate electrode, an Al2O3/ZrO2 gate dielectric layer was spin-coated and photo-annealed in N2 atmosphere for 90-120 min. The thickness of the Al2O3/ZrO2 gate dielectric layer was ~65 nm. For the channel layer, the IGZO precursor solution was spun on the gate dielectric and photoannealed in N2 atmosphere. After patterning the channel layer, via holes and IZO source/drain electrodes were formed.

3. RESULT AND DISCUSSION 6 ACS Paragon Plus Environment

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A schematic structure of IGZO TFTs using solution-processed gate dielectrics is shown in Figure 1a. As described above, as gate dielectric layers, various types of single and bilayer structures were employed. More detailed information on the gate dielectric structure is summarized in Table 1. In Figure 1b, the leakage current density characteristics of various gate dielectrics are shown which were measured in an IZO/gate dielectric/Cr structure. As shown here, the single layer ZrO2 film (12 nm-thick) exhibited relatively high leakage current density, which can be attributed to their small thickness and narrow band gap property (~5.8 eV)11,41,42. Increasing the the ZrO2 thickness to ~60 nm or using a different metal precursor for the ZrO2 precursor solution (zirconium oxynitrate hydrate) had no significant influence on the leakage current characteristics of ZrO2 gate dielectric as shown in Figure S2 and S3 (Supporting Information). In contrast, a single layer Al2O3 showed much lower leakage current density of 4.51×10-9 A cm-2 (at 1 MV cm-1), mainly owing to its wide band gap property (~8.7 eV) and low defect density15,40,41,43. Also, the capacitance of the Al2O3 gate dielectric showed reasonably stable frequency-dependent characteristics as shown in Figure 1c. Particularly, when the frequency was increased from 100 Hz to 1 MHz, the areal capacitance decreased slightly from 94 nF cm-2 to 89 nF cm-2. In spite of the decent gate dielectric properties of Al2O3, the single layer Al2O3 exhibited a relatively low dielectric constant (~6.37) compared to those of vacuum-deposited Al2O3 films44,45 attributing to a loose metal-oxygen-metal (M-O-M) network or presence of voids within the film9. In an aim to increase the dielectric constant of the Al2O3 film, a sodium (Na) doping was carried out10, and with a 5 at% doping of Na, the dielectric constant could be increased up to 7.91 as shown in Figure 1c and Table 1. However, as a trade-off, the Na-doped Al2O3 (Na-Al2O3) film showed an increase in leakage current density (3.71×10-7 A cm-2 at 1 MV cm-1) mainly attributed to the increased number of mobile ions (Na+) in the film10,46. In addition to single layer gate dielectrics, various types of bilayer-structure gate dielectrics were investigated as shown in Figure 1a. Three types of bilayer structures were chosen to identify the influences of stacking order, material combination and interfacial property on the electrical properties of IGZO TFTs: these structures include Al2O3/ZrO2, ZrO2/Al2O3 and Na-Al2O3/ZrO2. As shown in Figure 1b, by inserting an additional layer of Al2O3 on top or bottom of the ZrO2 layer (Al2O3/ZrO2 or ZrO2/Al2O3), the gate 7 ACS Paragon Plus Environment


leakage current was effectively suppressed showing leakage current densities of ~10-9 A cm-2 at 1 MV cm-1. In addition, as shown in Table 1 and Figure 1c, the Al2O3/ZrO2 and ZrO2/Al2O3 gate dielectrics exhibited relatively high dielectric constants of 8.53 and 8.71, respectively. Furthermore, the Al2O3/ZrO2 and ZrO2/Al2O3 gate dielectrics showed relatively stable operation up to 1 MHz. In the case of Na-Al2O3/ZrO2 gate dielectric, a relatively high dielectric constant of 9.83 was observed, however, the leakage current density (1.99×10-5 A cm-2 at 1 MV cm-1) was much higher than those of Al2O3/ZrO2 and ZrO2/Al2O3 gate dielectrics. In order to investigate the transistor performance variation by using different gate dielectrics, solution-processed IGZO TFTs with single- or bilayer gate dielectrics were fabricated. Initially, the surface roughness of each gate dielectric layer was analyzed since a rough gate dielectric/semiconductor interface can cause substantial carrier scattering in the channel layer and lead to the formation of interfacial trap states9,40,43. However, as shown in Figure 2, all the single- and bilayer gate dielectrics exhibited smooth surfaces with root-mean-square roughness values in the range of 0.1-0.2 nm. Therefore, the influence of surface roughness on the transistor performance is likely to be minimal in this experiment. Figure 3 shows the series of transfer and output curves of IGZO TFTs with different gate dielectrics. Using single layer Al2O3 as a gate dielectric, the TFT showed relatively poor performance, having a field-effect mobility of 3.2 cm2 V−1 s−1, Ion of 3.9×10-5 A (VDS=VGS=10 V), and a large clockwise hysteresis (Figure 3a). With the NaAl2O3 gate dielectric, the IGZO TFTs showed field-effect mobility and Ion of 12.6 cm2 V−1 s−1 and ~1.7×10-4 A, respectively (Figure 3b), which are comparably higher than those with Al2O3 gate dielectric. However, a large counter-clockwise hysteresis was observed originating from the mobile Na ions in the dielectric. Interestingly, by using the bilayer Al2O3/ZrO2 gate dielectric layer, IGZO TFTs with high field-effect mobility of 13.5 cm2 V−1 s−1 and negligible hysteresis could be obtained as shown in Figure 3c. Considering that the solution-processed IGZO TFTs made on a SiO2 gate dielectric typically showed an average fieldeffect mobility ~2 cm2 V−1 s−1,5 these results suggest that the bilayer Al2O3/ZrO2 gate dielectric can be a promising candidate for enhancing the device performance. To further investigate the origin of the enhanced mobility and hysteresis attenuation by using the Al2O3/ZrO2 gate dielectric, IGZO TFTs with other types of 8 ACS Paragon Plus Environment

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bilayer gate dielectrics were also fabricated (ZrO2/Al2O3 and Na-Al2O3/ZrO2). In the case of ZrO2/Al2O3 gate dielectric (Figure 3d), the field-effect mobility and the hysteresis behaviors were largely different from the IGZO TFTs using the Al2O3/ZrO2 gate dielectric, exhibiting field-effect mobility of 4.2 cm2 V−1 s−1 and large clockwise hysteresis. Moreover, by combining the Na-Al2O3 and ZrO2 films (Na-Al2O3/ZrO2), it was possible to obtain IGZO TFTs with a high mobility of 23.6 cm2 V−1 s−1. However, large counter-clockwise hysteresis was observed as shown in Figure 3e. Figure S5 also presents the hysteresis characteristics in the C-V curves measured from various gate dielectrics in MIS structures (single or bilayer gate dielectrics). The measured C-V curves in Figure S5 were almost identical to the trends observed in the I-V characteristics in TFT devices shown in Figure 2. In order to describe the transistor performance variation by using different gate dielectrics, we constructed energy band models for IGZO TFTs as illustrated in Figure 4. For ideal dielectrics or well-made layer-by-layer deposited dielectrics47, typically only positive/negative polarization can be at the interface. In those cases, we can consider the interfacial polarization and their relaxation, and then analyze the conduction mechanism of the bi-layer dielectrics by using Maxwell-Wagner effect48 and Debye polarization theory as the thickness variation of each dielectric film. However, most of large-scaled or solution-deposited engineering dielectrics generally include a non-negligible amount of charged states or species inside the dielectric films, which are often used as a gate dielectric in the thin-film-transistor (TFT) process.16,17,49 In this paper, we are trying to understand and analyze the conduction mechanism of the engineering bi-layer dielectric system with observed phenomenon and experimental results. In the case of Al2O3 gate dielectric, electron trapping at the acceptor-like trap states in Al2O3 bulk or at the IGZO/Al2O3 interface is occurred as shown in Figure 4a, resulting in clockwise hysteresis behavior and relatively low field-effect mobility.17,50– 52

In the case of Na-Al2O3 gate dielectric (Figure 4b), a substantial number of mobile Na+ ions are present in

the film, and under positive gate bias condition (VG > 0 V), the Na+ mobile ions are likely to drift towards the IGZO/Na-Al2O3 interface inducing excessive electrons in the IGZO channel layer. As a consequence, the TFTs exhibit high field-effect mobility and counter-clockwise hysteresis due to the ionic charge displacement.16,53 In the case of bilayer gate dielectric structure, the drift of mobile ions and trap-assisted 9 ACS Paragon Plus Environment


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tunneling effect can be more complex54,55. Particularly, in the case of Al2O3/ZrO2 gate dielectric, the hysteresis behavior is attenuated compared to single layer Al2O3 gate dielectric, even though the semiconductor/gate dielectric interface is not changed. This suggests that the observed hysteresis behavior is not solely caused by the electron trapping at the IGZO/Al2O3 interface, but, an additional effect may exist which compromises the clockwise hysteresis behavior. As illustrated in Figure 4c, with an increase of transverse electric field, electrons in the bulk trap states in ZrO2 begin to emit into the Cr gate electrode as to minimize their energy state (process (1) in Figure 4c)17. As the electrons are injected into the Cr gate electrode, positively charged states remain in the ZrO2 layer17, resulting in a buildup of additional electrons in the channel layer and subsequent trap filling at the IGZO/Al2O3 interface. The hysteresis attenuation observed in the transfer characteristics shown in Figure 3c supports this phenomenon. In addition, concerning the gate leakage current, although the injection of electrons from ZrO2 to Cr gate electrode might influence the gate leakage current, the influence was minimal as also observed in a previous report17, and the leakage current remained low enough (

High-Mobility and Hysteresis-Free Flexible Oxide Thin-Film

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