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Cite This: ACS Appl. Mater. Interfaces 2018, 10, 15847−15854
High-Resolution Inkjet-Printed Oxide Thin-Film Transistors with a Self-Aligned Fine Channel Bank Structure Qing Zhang,†,∥,⊥,# Shuangshuang Shao,† Zheng Chen,*,†,‡ Vincenzo Pecunia,§ Kai Xia,§ Jianwen Zhao,*,† and Zheng Cui†
ACS Appl. Mater. Interfaces 2018.10:15847-15854. Downloaded from pubs.acs.org by TRINITY COLG DUBLIN on 10/27/18. For personal use only.
†
Printable Electronics Research Center, Suzhou Institute of Nano-Tech and Nano-Bionics, Chinese Academy of Sciences, No. 398 Ruoshui Road, SEID, Suzhou Industrial Park, Suzhou, 215123 Jiangsu, PR China ‡ MIIT Key Laboratory of Advanced Display Materials and Devices, Institute of Optoelectronics and Nanomaterials, College of Material Science and Engineering, Nanjing University of Science and Technology, Nanjing 210094, PR China § Jiangsu Key Laboratory for Carbon-Based Functional Materials & Devices, Institute of Functional Nano & Soft Materials (FUNSOM), Joint International Research Laboratory of Carbon-Based Functional Materials and Devices, Soochow University, 199 Ren’ai Road, Suzhou, 215123 Jiangsu, PR China ∥ Shanghai Institute of Ceramics, Chinese Academy of Sciences, No. 585, Heshuo Road, Jiading District, Shanghai 201899, PR China ⊥ University of Chinese Academy of Sciences, No. 19 Yuquan Road, Beijing 100049, PR China # Shanghai Tech University, No. 393, Huaxia Middle Road, Pudong New Area, Shanghai 201210, PR China S Supporting Information *
ABSTRACT: A self-aligned inkjet printing process has been developed to construct small channel metal oxide (a-IGZO) thin-film transistors (TFTs) with independent bottom gates on transparent glass substrates. Poly(methylsilsesquioxane) was used to pattern hydrophobic banks on the transparent substrate instead of commonly used self-assembled octadecyltrichlorosilane. Photolithographic exposure from backside using bottom-gate electrodes as mask formed hydrophilic channel areas for the TFTs. IGZO ink was selectively deposited by an inkjet printer in the hydrophilic channel region and confined by the hydrophobic bank structure, resulting in the precise deposition of semiconductor layers just above the gate electrodes. Inkjet-printed IGZO TFTs with independent gate electrodes of 10 μm width have been demonstrated, avoiding completely printed channel beyond the broad of the gate electrodes. The TFTs showed on/off ratios of 108, maximum mobility of 3.3 cm2 V−1 s−1, negligible hysteresis, and good uniformity. This method is conductive to minimizing the area of printed TFTs so as to the development of high-resolution printing displays. KEYWORDS: inkjet printing, metal oxide, surface-energy pattern, self-aligned, PMSQ
1. INTRODUCTION
now regarded as one of the candidates for constructing backplane driving circuits for displays.15 As the driving TFTs occupy part of a pixel in a display, it would be desirable if the TFTs took as less area as possible to maximize the OLED emission area. It is known that the operation speed of a TFT directly depends on its channel length, so TFTs with shorter channel length have been developed significantly.20−26 Nevertheless, the area of printed TFTs has been rarely concerned.5 If inkjet printing is to be employed for making the TFTs, measures need to be taken to minimize the area of the printed active layer to reduce the overall size of a TFT. However, inkjet printing is inherently of
Printable displays are gaining momentum recently with the development of solution-type organic light emitting diode (OLED) materials. While the OLED pixels are now printable, it would be ideal if the backplane thin-film transistor (TFT) array could be printable as well. Research works along this direction have been ongoing in recent years.1−7 With the development of novel semiconductor inks, printing methods and post-treatment techniques, performances of printable TFTs based on amorphous metal oxide, organics, carbon nanotubes, and two dimensional materials, have been significantly improved.7−18 Printed amorphous metal oxide TFTs exhibited high on/off ratios (up to 108), lower off currents (less than 10−14 A), and excellent uniformity, and it is possible to modulate the mobility and threshold voltage of printed TFTs by tuning the ratios of ingredients in metal oxide inks.19 Printed metal oxide TFTs are © 2018 American Chemical Society
Received: February 8, 2018 Accepted: April 12, 2018 Published: April 12, 2018 15847
DOI: 10.1021/acsami.8b02390 ACS Appl. Mater. Interfaces 2018, 10, 15847−15854
Research Article
ACS Applied Materials & Interfaces
Figure 1. Schematic illustration of the fabrication steps for bottom-gate top-contact TFT with printed channel, utilizing the predeposited gate electrode to form self-aligned wettability contrast patterns: (a) metallic gate electrode/dielectric layer formed on glass substrate; (b) photolithographic exposure from backside using bottom-gate electrode as mask; (c) wettability contrast pattern after etching the hydrophobic film, removing photoresist (PR), 350 °C annealing and UV−ozone treatment; (d) depositing oxide semiconductor in hydrophilic region to form channel of TFT; and (e) TFT device after deposition of source/drain electrodes. stirred vigorously for 120 min at room temperature and filtered with a pore size of 0.45 μm. The hydrophobic layer was prepared from PMSQ solution which was synthesized according to the previously reported work.38,39 Formic acid (5.08 g) was dissolved in deionized water (19.8 g) and added to a solution of methyltrimethoxysilane (0.37 mol) in propylene glycol monomethyl ether acetate (PGMEA) (25 g). After 30 min of stirring at room temperature, the mixture was heated at 70 °C for 60 min to initiate the polycondensation reaction. Finally, the highly viscous PMSQ prepolymer was obtained after removing the small molecules including water, formic acid, methanol, and solvent by distillation under reduced pressure at 70 °C. The PMSQ prepolymer was dissolved in the PGMEA solvent, and 0.2 g mL−1 solution was used for fabricating 170 nm PMSQ thin films by spin coating (4000 rpm, 60 s) with annealing at 400 °C for 60 min in air. 2.2. Fabrication of TFTs. Figure 1 shows schematically the fabrication sequence for the bottom-gate top-contact TFT. A 150 nm thick MoNb alloy gate electrode was deposited and patterned via magnetron sputtering and photolithography. Then, 150 nm thick alumina (AlOx) was deposited by atomic layer deposition at 250 °C as a dielectric layer (Figure 1a). A 170 nm thick PMSQ layer of hydrophobic property was spin-coated on top of the dielectric layer which was patterned from the backside of the glass substrate by photolithography and dry etching to reveal the underneath alumina surface which was the channel region of TFT (Figure 1b). A further annealing in air at 350 °C for 60 min and exposure to UV−ozone for 5 min improved the hydrophilic property of the alumina surface, to establish the wettability contrast between the channel region and the surrounding PMSQ bank (Figure 1c). IGZO precursor ink was then printed onto the channel region by an inkjet printer with a 10 pL piezoelectric nozzle (Dimatix, DMP 2831) and annealed at 350 °C for 120 min under ambient conditions (Figure 1d). Finally, the 150 nm MoNb alloy was deposited by sputtering and patterned by photolithography and lift-off to form the source/drain (S/D) electrodes (Figure 1e). Alternatively, the hydrophobic pattern could be prepared by self-assembled octadecyltrichlorosilane (OTS) which was formed by evaporating OTS in an oven of 120 °C for 120 min. The patterning of PMSQ and OTS layers was the same as patterning of SiO2 using optical exposure of PR and CHF3 gas reactive ion etching. 2.3. Material and Device Characterization. The hydrophobicity was characterized by measuring water contact angles using an optical contact angle & interface tension meter (USA KINO). The transparency of the PMSQ film was checked by UV−vis spectrum
low resolution with typical printed features at 20−50 μm.6,27 There is then a conflict between large printed ink drops and required small area TFTs. Some strategies have been proposed to improve the resolution of inkjet printing patterns, including the use of small ink drop volume of 1 pL printer nozzles or electrohydrodynamic printing.28−30 These approaches have their own limitations such as nozzle clogging and low throughput. There are also strategies employing surface energy contrast prior to printing or utilizing the coffee ring effect and so forth27,31−37 However, most of them usually require extra templates or masks or complicated fabrication processes to accurately deposit semiconductor inks on the desired region. Therefore, it is imperative to develop some facile processes to print semiconductor channels with high resolution and high registration accuracy.1 In this work, a new approach has been developed, which utilized predeposited gate electrodes as a self-aligned mask to form a wettability contrast pattern for the printed semiconductor channel. Poly(methylsilsesquioxane) (PMSQ) solution, which is stable under high temperature, optically transparent, and of low cost to produce, was used to pattern bank structures with high hydrophobic contrast to the alumina gate dielectric region. The printed IGZO semiconductor channels were precisely aligned to the gate electrodes of 10 μm width. The inkjet-printed TFTs with independent bottom gates were achieved, which exhibited on/off ratios of 108 and maximum effective mobility of 3.3 cm2 V−1 s−1. To the best of our knowledge, this is the first report about printing IGZO TFTs with independent bottom gates and such narrow channel by a standard 10 pL inkjet printer.
2. EXPERIMENTAL SECTION 2.1. Preparation of Inks. The semiconductor ink was based on the indium gallium zinc oxide (IGZO) precursor solution with a molar ratio of 6:1:2 (In/Ga/Zn). The precursor solution was prepared by dissolving In(NO3)3·xH2O (99.99%, Sigma-Aldrich), Zn(NO3)2·xH2O (98%, Acros Organics), and Ga(NO3)3·xH2O (99.9%, trace metal basis, Sigma-Aldrich) in deionized water. The as-received chemicals were used without any further purification. Before printing, the ink was 15848
DOI: 10.1021/acsami.8b02390 ACS Appl. Mater. Interfaces 2018, 10, 15847−15854
Research Article
ACS Applied Materials & Interfaces measurement. The chemical structure of the modified AlOx surface was examined by X-ray photoelectron spectroscopy (XPS, ESCALAB 250Xi spectrometer) using a monochromatic Al Kα X-ray source with an overall energy space of ΔE = 0.1 eV. All XPS peaks were calibrated by taking C 1s reference at 284.6 eV. Atomic force microscopy (AFM, Veeco Nanoscope Digital Instruments) was used to characterize the surface morphology of the modified AlOx surface and to measure the length of printed oxide for the actual channel width (W). The channel region of the printed oxide active layer was examined using the energy dispersive spectroscopy (EDS) function in scanning electron microscopy (SEM, Hitachi S-4800). The electrical properties of printed IGZO TFTs were measured using a Keithley 4200 semiconductor analyzer in a dark box under ambient conditions. Linear field effect mobility (μlin) and threshold voltage (Vth) were extracted from the TFT transfer curves using the ⎛ dI ⎞ L 1 following expression μ = W × C V × ⎜ dVd ⎟ at Vds of 1 V. The ⎝ g⎠ ox ds capacitance per unit area (Cox) of the AlOx dielectric layer is about 0.0606 μF cm−2, as measured by a Keithley 4200 Capacitance-Voltage Unit. The channel length (L) was set at 5 μm for the bottom-gate electrodes of 10 μm width.
3. RESULTS AND DISCUSSION 3.1. Confinement of Semiconductor Ink by SelfAligned Hydrophobic Banks. The major disadvantage of inkjet printing TFT is the low resolution of inkjet printing itself. Our recent work has demonstrated that the diameter of inkjet-printed metal oxide dots can be controlled in the range of 35−40 μm by modifying the surface energy of dielectric layers together with tuning the viscosity of metal oxide inks.5 However, it is not easy to further decrease the size of printed dots using this approach. There have been reports of confining ink drops to a specific region by playing the surface energy of substrates.32−34,37 The key technology for this approach is to create high contrast between hydrophobic and hydrophilic regions on a substrate prior to inkjet printing, in order to confine the ink drop only in the hydrophilic region. Therefore, the choice of hydrophobic materials is critical. Most hydrophobic polymers, including commonly used PRs, are not suitable because they cannot endure the high annealing temperature (350 °C) necessary for the oxide semiconductor layer. It was found that only self-assembled OTS and PMSQ were up to the role. Figure 2 shows the water contact angles of alumina, selfassembled OTS, and PMSQ thin film on a glass substrate. Both OTS and PMSQ thin films exhibited high hydrophobicity with water contact angles around 96° (Figure 2a,b), which are originated from the high density of alkyl groups (Figure S1).38,40 The as-prepared alumina surface is intrinsically hydrophilic with water contact angle less than 10° as shown in Figure 2c. The inkjet-printed metal oxide ink drop can spread well on it, so as to form homogeneous thin films. The wettability contrast could be created between PMSQ, or OTS surface, and the alumina surface, so that the oxide ink drop would be confined to the alumina surface which was the gate dielectric region. However, the gate dielectric layer had to undergo a patterning process which required coating PR and photolithography. It was found that the hydrophilicity of the alumina surface could change once PR was coated on it, even after the PR layer was removed by solvent wash. Figure 2d shows water contact angle (∼40°) after patterning the alumina layer and washing off the remaining PR. The same was true for simply coating and removing PR on the alumina surface (Figure 2e),
Figure 2. Water contact angles on different surfaces: (a) OTSassembled AlOx thin film, (b) PMSQ thin film, (c) freshly prepared AlOx thin film, (d) the exposed alumina surfaces undergoing etching and PR removing, (e) AlOx surface undergoing PR coating and PR removing, without etching process, and (f) exposed AlOx thin film surface after 350 °C annealing.
even after 350 °C annealing process (Figure 2f), which means that once the hydrophilic surface of alumina is coated with PR, tiny residues remaining on the surface can alter its hydrophilicity no matter how thoroughly the PR layer is removed. The consequence was that the wettability contrast between alumina and surrounding PMSQ or OTS was greatly reduced. To restore the hydrophilic property of the alumina surface, the PR-contaminated alumina surface was treated with UV− ozone exposure. The trouble was that the UV−ozone treatment could also make the OTS and PMSQ film surface less hydrophobic. Table 1 lists the changes of water contact angles at different durations of UV−ozone exposure on alumina, OTS, and PMSQ surfaces. After 5 min of UV−ozone treatment, the contact angle of the alumina surface reduced to ∼0° and its hydrophilicity was fully restored, whereas the contact angles of OTS and PMSQ were also reduced to 68° ± 2° and 80° ± 1°. After 15 min of UV−ozone treatment, the contact angle of OTS decreased to ∼0°, whereas it was still ∼64° for PMSQ. The endurable hydrophobic property of PMSQ likely results from its silica−organic hybrid structure which protects the organic groups against high temperature and UV−ozone treatment.41 Figure 3 shows the optical images of the IGZO ink drop on the gate dielectric channel region of alumina without hydrophobic confinement bank (Figure 3a), with selfassembled OTS bank plus UV−ozone treatment (Figure 3b) and with PMSQ confinement bank plus UV−ozone treatment (Figure 3c). It is obvious that the ink drop spontaneously spreads on the alumina dielectric layer with the diameter ranging from 60 to 100 μm if there was no hydrophobic confinement. With OTS confinement, the ink drop was mainly in the channel region though not very uniform. The PMSQ confinement gave the best result. The ink drop was completely 15849
DOI: 10.1021/acsami.8b02390 ACS Appl. Mater. Interfaces 2018, 10, 15847−15854
Research Article
ACS Applied Materials & Interfaces Table 1. Water Contact Angles on Different Surfaces with Different Durations of UV−Ozone Treatmenta
a
UV−ozone duration
0 min
5 min
10 min
15 min
20 min
Alumina OTS PMSQ
40° ± 1° 96° ± 4° 96° ± 2°
N. D. 68° ± 2° 80° ± 1°
N. D. 58° ± 1° 69° ± 3°
N. D. N. D. 64° ± 2°
N. D. N. D. 58° ± 1°
N. D.: blow detection limit; alumina: the alumina surfaces after undergoing etching and PR removing.
Figure 3. Structures of dielectric layers modified with OTS and PMSQ patterns and the optical images of printed metal oxide thin films on dielectric layers with different modifications: (a) without hydrophobic confinement bank, (b) with self-assembled OTS bank, and (c) with 170 nm and (d) 50 nm thick PMSQ film bank.
and uniformly confined within the channel region. When the 50 nm PMSQ film was used, there are about 100 nm steps in the printed region, but the ink drops were also confined well, as shown in Figure 3d. It suggested that the confinement was mainly due to the difference in surface energy. The impact of the step can be neglected, because the drop diameter (few tens micrometer) is far larger than the dimension of the step (100 nm). Besides its stable hydrophobic property, PMSQ has other advantages. The PMSQ solution can be easily produced at low cost through low-temperature synthesis. After thermal crosslinking, PMSQ is chemically resistant to most organic solvents (such as methylbenzene, alcohol, and chloroform), thus is stable during inkjet printing of solvent-based semiconductor inks.38 Because of its silica-organic hybrid structure, PMSQ can endure high temperature of up to 400 °C.39 In addition, it is transparent at wavelength over 300 nm (Figure S2), which makes it suitable for optical exposure of PR from backside, hence enabling the self-aligned process in this work. Therefore, PMSQ was chosen to construct the self-aligned hydrophobic banks to create wettability contrast for inkjet printing of oxide semiconductor into the TFT channel region. Figure 4a,b shows the optical image and SEM image of inkjet-printed single TFT, where the confinement of IGZO ink is shown in the inset images. The thickness and morphologies of metal oxide thin films in the device channel were also characterized by AFM. As shown in Figure 4c,d, the printed metal oxide is homogeneous with the average thickness of 25.6 nm and length of 57 μm. To confirm that the IGZO ink was indeed only deposited within the channel region, EDS was used to detect the elements at three points (A, B, and C) shown in the inset SEM image of Figure 4b. Indium and zinc elements were observed at A and B but not at C (see Table S1). The result suggested that the printed IGZO ink was precisely restricted within the 10 μm wide region of the gate electrode, though an inkjet printer with a 10 pL nozzle was used which generally produces more than 50 μm size of ink drops. 3.2. Performance of Printed IGZO TFTs with Short Channel Length and Independent Bottom Gates on Glass Substrates. The IGZO precursor ink needs hightemperature annealing to become an amorphous semiconductor. Normally the high-temperature annealing takes
Figure 4. (a) Optical image and (b) SEM image of a printed IGZO TFT, and (c) optical image and AFM image and (d) topographical profiles of an IGZO thin film in the device channel.
place after the oxide semiconductor ink is printed into the channel region. However, it was found that PR patterning and dry etching on the alumina dielectric layer could introduce contamination which was detrimental to the TFT performance. Figure 5a shows the transfer curve of a printed IGZO TFT because of the contamination. An additional thermal treatment at 350 °C for 60 min prior to UV−ozone exposure of alumina
Figure 5. Typical transfer curves of printed IGZO-TFT without heat treatment of alumina (a) and with the 350 °C annealing prior to UV− ozone exposure of alumina and inkjet printing of oxide semiconductor ink (b). 15850
DOI: 10.1021/acsami.8b02390 ACS Appl. Mater. Interfaces 2018, 10, 15847−15854
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ACS Applied Materials & Interfaces and inkjet printing of oxide semiconductor ink could significantly improve the TFT performance as shown in Figure 5b. Printed devices showed small hysteresis, high on/off ratio, and a mobility of 3.3 cm2 V−1 s−1. To evaluate the effect of additional 350 °C annealing on the alumina surface, its morphologies and constituents were studied by AFM and XPS. The root mean square roughness of the freshly prepared alumina dielectric layer was about 1.10 nm (Figure 6a). However, it increased to 3.45 nm after PR
Figure 7. Typical transfer (a) and output curves (b) of the printed IGZO TFTs with independent gate electrodes on a glass substrate; statistical distributions of effective mobility (c) and threshold voltages (d) for 30 TFTs.
TFTs because of the homogeneous channel lengths and smooth metal oxide thin films. 3.3. Bias Stability of Printed IGZO TFTs. The stability of the printed oxide TFTs was tested in air under positive gate bias stress (PBS), negative gate bias stress (NBS), and negative bias illumination stress (NBIS). The bias stress on the measured devices were 20 V gate voltage plus 1 V drain voltage for PBS, −20 V gate voltage plus 1 V for NBS and NBIS, while the source electrode was grounded. A green light (λ = 505 nm) at a power density of 0.2 mW cm−2 was applied in NBIS testing. Before a stress test, the devices were left to recover in the dark to eliminate the effect of the previous stress test. Transfer characteristics of a printed IGZO-TFT after bias stress are shown in Figure 8a−c, and the threshold voltage shifts as a function of the stress duration extracted from these transfer curves are represented in Figure 8d. The results show that there are negligible changes in mobility under the three kinds of bias stress, but the threshold voltage shifts can be obviously observed. After 2000 s of PBS, the shift of the threshold voltage slowed down and a total positive offset
Figure 6. AFM images of the 5 × 5 μm2 AlOx surface area (a) before and (b) after etching and (c) after etching and annealing at 350 °C for 60 min. (d) XPS F 1s spectra of the AlOx with different treatments.
patterning and dry etching (Figure 6b). The annealing at 350 °C for 60 min reduced the roughness to 0.7 nm (Figure 6c). The XPS spectra revealed that fluorine (F) elements were introduced to the alumina surface after dry etching with CHF3 gas, as shown by the F 1s peaks in Figure 6d before and after etching, which agreed well with the previous report.42 After annealing, no obvious F 1s peak was seen, indicating that the fluorine residuals were removed and the surface roughness of alumina were also greatly reduced (Figure 6c), which was ascribed to surface diffusion at high temperature.43,44 Fluorine doping in oxide semiconductor has been reported to improve mobility and stability of device.45,46 In addition, it was also reported that a HfO2 gate dielectric with a fluorinated surface can suppress carrier trapping.47,48 Therefore, we believe that the significantly enhanced TFT performance is due to the smoother dielectric layer, which improved the interfacial property between the metal oxide and dielectric layer. Finally, printed IGZO TFTs with independent bottom gates were fabricated in large scale. All of the electrodes were made by photolithography, and the oxide semiconductor layer was deposited by inkjet printing. With the aforementioned selfaligned process, the IGZO precursor ink was precisely confined in the channel region above the bottom-gate electrode (Figure S3a,b), followed by patterning of S/D electrodes (Figure S3c,d). Figure 7 shows the transfer and output characteristics of 30 inkjet-printed IGZO TFTs with a gate electrode width of 10 μm and a channel length of 5 μm. The TFTs exhibited an effective mobility of 2.6−3.3 cm2 V−1 s−1, on/off ratio of about 108, and threshold voltage of 2−4 V. The statistical data shown in Figure 7c,d demonstrated good uniformity of printed IGZO
Figure 8. Transfer characteristics of a printed IGZO TFT without passivation layer: (a) under PBS, (b) under NBS, (c) under NBIS, (d) threshold voltage shifts with stress time under PBS, NBS and NBIS. 15851
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of 1.2 V was observed. The positive shift of the threshold voltage has been attributed to electron trapping at the interface between dielectric layer/channel layer or to electron injection into the gate dielectric layer.49 The shift value is very small as far as printed TFTs without passivation are concerned, suggesting that the printed devices have a fairly good interface for PBS stability. The threshold voltage has a reverse offset of about −2 V after 2000 s of NBS, which is slightly higher than the shift value under PBS. Because the back channel of TFT was not passivated, it was suggested that the negative Vth shift can be attributed mainly to the effect of moisture absorption.50 Under light illumination, a larger threshold voltage offset was observed of about −6.1 V in the NBIS testing. The large threshold voltage shift has been investigated in some reports and can be attributed to a plausible mechanism of photogenerated holes trapped at the interface between the dielectric layer and channel layer.49 Most reported solution processed TFTs are based on sharing a common bottom-gate electrode, which in most cases is the highly doped conductive silicon substrate. For such a configuration, many practical circuits that require more than one TFT would not be possible. The self-aligned approach in this work has enabled the fabrication of fine channel oxide TFTs with independent bottom-gate configuration and thus opened the possibility of constructing more complicated circuitry by inkjet-printed TFTs. It is worth noting that inkjet printing was used to selectively deposit semiconductor ink only onto the channel region of individual TFTs, so as to avoid the leakage current between the gate electrode and channel, as well as channels from two TFTs (Figure S4). As illustrated in Figure S4, such leakage current would exist if the overall hydrophilic region was coated.
AUTHOR INFORMATION
Corresponding Authors
*E-mail:
[email protected] (Z.C.). *E-mail:
[email protected] (J.Z.). ORCID
Zheng Chen: 0000-0002-2538-9142 Jianwen Zhao: 0000-0002-5548-5469 Notes
The authors declare no competing financial interest.
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ACKNOWLEDGMENTS This work was supported by the National Key R&D Program of “Strategic Advanced Electronic Materials” (2016YFB0401100), the Basic Research Program of Jiangsu Province (BK20161263), the Jiangsu Province Natural Science Foundation (SBK2017041510), the Science and Technology Program of Guangdong Province (2016B090906002), Basic Research Programme of Suzhou Institute of Nanotech and Nano-bionics (Y5AAY21001), and the National Natural Science Foundation of China (61750110517).
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REFERENCES
(1) Fukuda, K.; Someya, T. Recent Progress in the Development of Printed Thin-Film Transistors and Circuits with High-Resolution Printing Technology. Adv. Mater. 2017, 29, 1602736. (2) Zou, J.; Zhang, K.; Li, J.; Zhao, Y.; Wang, Y.; Pillai, S. K. R.; Demir, H. V.; Sun, X.; Chan-Park, M. B.; Zhang, Q. Carbon Nanotube Driver Circuit for 6 x 6 Organic Light Emitting Diode Display. Sci. Rep. 2015, 5, 11755. (3) Sun, D.; Chen, C.; Zhang, J.; Wu, X.; Chen, H.; Guo, T. High Performance Inkjet-printed Metal Oxide Thin Film Transistors Via Addition of Insulating Polymer with Proper Molecular Weight. Appl. Phys. Lett. 2018, 112, 012102. (4) Li, M.; Zheng, J.; Xu, H.; Wang, Z.; Wu, Q.; Huang, B.; Zhou, H.; Liu, C. Precise Patterning of Large-Scale TFT Arrays Based on Solution-Processed Oxide Semiconductors: A Comparative Study of Additive and Subtractive Approaches. Adv. Mater. Interfaces 2018, 5, 1700981. (5) Wu, S.; Zhang, Q.; Chen, Z.; Mo, L.; Shao, S.; Cui, Z. Inkjet Printing of Oxide Thin Film Transistor Arrays with Small Spacing with Polymer-doped Metal Nitrate Aqueous Ink. J. Mater. Chem. C 2017, 5, 7495−7503. (6) Cui, Z.; Qiu, S.; Zhou, C. S.; Chen, Z.; Lin, J.; Zhao, J. W.; Ma, C. Q.; Su, W. M. Printed Electronics: Materials, Technologies and Applications; Wiley, 2016. (7) Xu, W.; Zhao, J.; Qian, L.; Han, X.; Wu, L.; Wu, W.; Song, M.; Zhou, L.; Su, W.; Wang, C.; Nie, S.; Cui, Z. Sorting of Large-Diameter Semiconducting Carbon Nanotube and Printed Flexible Driving Circuit for Organic Light Emitting Diode (OLED). Nanoscale 2014, 6, 1589−1595. (8) Scheideler, W. J.; Kumar, R.; Zeumault, A. R.; Subramanian, V. Low-Temperature-Processed Printed Metal Oxide Transistors Based on Pure Aqueous Inks. Adv. Funct. Mater. 2017, 27, 1606062. (9) Xie, M.; Wu, S.; Chen, Z.; Khan, Q.; Wu, X.; Shao, S.; Cui, Z. Performance improvement for printed indium gallium zinc oxide thinfilm transistors with a preheating process. RSC Adv. 2016, 6, 41439− 41446. (10) Sykora, B.; Wang, D.; von Seggern, H. Multiple Ink-jet Printed Zinc Tin Oxide Layers with Improved TFT Performance. Appl. Phys. Lett. 2016, 109, 033501. (11) Kim, Y.-H.; Heo, J.-S.; Kim, T.-H.; Park, S.; Yoon, M.-H.; Kim, J.; Oh, M. S.; Yi, G.-R.; Noh, Y.-Y.; Park, S. K. Flexible Metal-Oxide Devices Made by Room-Temperature Photochemical Activation of Sol-Gel Films. Nature 2012, 489, 128−132. (12) Kim, M.-G.; Kanatzidis, M. G.; Facchetti, A.; Marks, T. J. LowTemperature Fabrication of High-Performance Metal Oxide Thin-Film
4. SUMMARY A self-aligned inkjet printing process has been developed to construct fine channel metal oxide (a-IGZO) TFTs with independent bottom gate on transparent glass substrates. The process was based on the wettability contrast between the TFT channel region and the surrounding bank structure. PMSQ was used to pattern hydrophobic banks on a transparent glass substrate, instead of a commonly used self-assembled OTS layer. The PMSQ bank structure was patterned by photolithographic exposure from backside using the bottom-gate electrode of 10 μm width as mask to form hydrophilic channel areas. IGZO ink was selectively deposited by an inkjet printer into the hydrophilic channel region and confined by the hydrophobic bank structure, resulting in the precise deposition of semiconductor layers just above the gate electrodes. The TFTs showed on/off ratios of 108, maximum mobility of 3.3 cm2 V−1 s−1, negligible hysteresis, and good uniformity.
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Research Article
ASSOCIATED CONTENT
S Supporting Information *
The Supporting Information is available free of charge on the ACS Publications website at DOI: 10.1021/acsami.8b02390. Chemical structures of PMSQ and OTS, UV−vis transmittance of PMSQ on glass substrates, element contents detected in different areas signed in Figure 4b, optical images of printed IGZO TFT arrays, and an example illustration on leakage current (PDF) 15852
DOI: 10.1021/acsami.8b02390 ACS Appl. Mater. Interfaces 2018, 10, 15847−15854
Research Article
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DOI: 10.1021/acsami.8b02390 ACS Appl. Mater. Interfaces 2018, 10, 15847−15854