Instant Interfacing - ACS Publications - American Chemical Society

Mar 1, 1974 - Jonathan Titus. Anal. Chem. , 1974, 46 (3), pp 294A–302A. DOI: 10.1021/ac60339a703. Publication Date: March 1974. ACS Legacy Archive...
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Report

No. of instruments types

No. o Speed D a t a Rate Type

Instant Interfacing

Firmware

Hardware

Raymond E. Dessy and Jonathan Titus

Software

Virginia Polytechnic Institute and State University Blacksburg, Va. 24061

Although laboratory automation is becoming more and more of a necessity, the special knowledge and time required to design and fabricate specific interfaces for analytical equipment in the modern laboratory often are too formidable a task for the nonelectronically oriented chemist. The purpose of this article is to acquaint the reader with design considerations involving some of the new mediumand large-scale integrated circuits (IC's), modules, and devices described in the article which will allow him to interface his equipment easily, inexpensively, and without extensive electronic knowledge—almost instant interfacing. It is often best to analyze any interfacing problem in the following terms: imagine an octahedron made up of eight identical faces, each representing a three-dimensional variable in the interfacing problem. These decision domains are to be handled in much the way a chemist develops phase diagrams. Each boundary represents 0-100% contribution by the variable associated with it, and all variables in the domain must be correlated to one another. In each domain, local conditions will indicate that a certain area within the domain will be the most practical solution for that phase of the complex multidimensional problem. Although each domain is somewhat related to the others, if a careful order of attack is made on each domain in succession, and the process is iterated until the smallest possible area is defined as a potential solution in each domain, the result will be a

I n t e r f a c e Functions Accomplished b y

satisfactory one for implementation. If a domain remains undefined, it suggests that the problem is not completely understood, and the user, far from being discouraged, should revel in the fact that he at least knows his difficulty. To demonstrate the concept of multiphasic design and demonstrate the powers of the new electronic components, let us set up a rather common laboratory situation: A laboratory has two groups of quality control instruments, with three instruments per group (GC, GPC, LC, TGA, DTA) and one rapid scanning spectrometer. Two X-ray diffractometers will be installed in one year. and analyze each domain as follows. Data Rate/Type

The quality control units are lowspeed devices, and sampling rates of 10 points/sec will retrieve all meaningful data. The high-speed rapid scanning spectrometer will need sampling rates of 50,000 points/sec, but the data are acquired in bursts, separated by a 1-msec waiting period, each burst consisting of 512 words of data. The other instruments will require data flow of 100 points/sec and are considered medium-speed devices. (Groups of instruments of the same type are easy to handle. It is addition of many different types that can cause difficulties.) Data Acquisition Mode

No control over existing equipment

294 A · ANALYTICAL CHEMISTRY, VOL. 46, NO. 3, MARCH 1974

is necessary, and either off-line data logging or real-time open-loop* (items with asterisks are defined in the Glossary) acquisition would suffice. The new instruments will require closedloop* control. Data Flow

The long distances (1000 ft) between the clusters of control instruments and their distance from the lab containing the spectrometer system preclude parallel digital transmission* from the control equipment to a processor situated near the highspeed unit because of high cable costs. Noisy environmental conditions make analog transmission from the control facilities potentially difficult. Serial digital transmission* appears an attractive alternative. Data Processing Mode

Quick report generation is important, as well as correlation with old data base material. Local handling of the data along with other user needs as a "Batch" in a nearby computer is very poor. A computer "dedicated" to the system will solve current needs. However, a hierarchical* system is envisaged as the medium-speed devices are added to accommodate their need for calculations, storage, and retrieval of large reference data bases for report generation. The original computer will serve as a host machine,* and intelligent controllers* will assume responsibility for the slower units as their needs are more fully comprehended by studies under-

Closed-loop*

Hierachical(net)*

Digital(seriral)

0n-line*

Dedicated Digital(parallel)

Batch

Analog

Off-line (logging)

D a t a Processing M o d e

D a t a Flow

D a t a Acquisition M o d e

Talent

I/O bus* Interpretor* Compiler*

Lucre

*

Assembler* Computer Languages Involved

taken during the first year of automa­ tion. Computer Languages Involved The available software capability in both FORTRAN (compiler*) and real time BASIC (interpreter*) is good, but experience at the assembler* level is nil. A FORTRAN compiler system will be used to develop file manipulation and report output. Real time BASIC appears to be too slow for input/output; therefore, assembler coding of the I/O programs will be utilized. Interface Functions Accomplished by Hardware capability is not well developed. System operation of the control instruments involves a large number of technicians with rapid turnover, and calibration and stan­ dardization procedures change fre­ quently from fixed-set to fixed-set. Read-only-memory* instructions would "firm" up potential system volatility, since power failure or pro­ gram failure cannot destroy the control instructions. Interface Level The lack of electronic talent suggests that interfacing directly on the computer's I/O bus* is unwise. The lack of capital equipment money to be invested at one time precludes the purchase of a turnkey system, where the vendor provides all the software and hardware. It is obvious that many of these de­

Lab peripheral

"TurnkeY"

Time

I n t e r f a c e Level

I n t e r f a c e Accomplished b y

sign considerations are related to the last, unmentioned, design phase. Any interfacing task represents an invest­ ment—the expenditure of a given amount of human resources. This en­ ergy must be provided in the form of the product of Time expended, Tal­ ent available, or Lucre spent (the TTL principle). Casual inspection of the relationships suggest that if any two of the variables are zero, the function is distressingly discontin­ uous, and that implementation of in­ terfacing under such conditions is to be avoided. Even turnkey systems purchased without user under­ standing can lead to dissatisfaction when changes are required or original specifications were in error. With these concepts in mind, let us return to the ability of the "new" pe­ ripherals or modules to lighten this interfacing task. The first device is a unit which makes telecommunication interfacing extremely easy. The first step in Understanding this device is to analyze the method by which most scientists already com­ municate with the computer—the teletype (TTY). The standard TTY was designed long before digital com­ puters were conceived of; although they therefore have many peculiari­ ties that would not be present if one were designing from scratch, we must not only live with these eccentricities, but can utilize them to our benefit. Being designed to transmit infor­ mation along twisted pairs of wires, the TTY is a serially oriented ma­ chine. In other words, a code repre­ senting each alphanumeric character made up of 8 bits of information is

sent along the wires, one bit after an­ other. Each letter, number, and con­ trol character required for human communication is represented by a unique code sequence of 8 bits. This code sequence of binary* ones (marks) and zeros (spaces) is often written in shorthand fashion, utiliz­ ing octal* notation, thus: ι

start

10

blt

2

1 0 5

1

1

0

1

Ι

ι

1 ° 2 (binary) 2

8

(octal)

Table I shows the code for decimal numbers in the international code used most widely, the American Standard Code for Information Inter­ change (ASCII). When we press a key on a TTY, a code bar places 1 and 0 signal levels simultaneously (in paral­ lel) on a series of strips located ra­ dially on a circle which is swept by a commutator. The corresponding bit string is thus sent down a pair of wires serially. This step involves a parallel-to-serial conversion of the code sequence, and the unit is called a transmitter. An interface at the computer, called a receiver, accepts the serial string, converts it into a single word by serial/parallel conver­ sion, and signals the computer that the complete 8-bit character is ready to be read by the processor. To echo the character back to the TTY, the interface at the computer also con­ tains a transmitter, which sends a se* rial code along another pair of twisted wires back to the printer mechanism of the TTY, where the code word ac-

ANALYTICAL CHEMISTRY, VOL. 46, NO. 3, MARCH 1974 · 295 A

tivates electromagnets to position a printer head in the proper position. Communication between a TTY and a CPU requires two pairs of wires and a transmitter/receiver interface at each end to accomplish the series/ parallel conversions required. With only four wires connecting the two units, there is no direct synchronization or common clocking between the two units. For this reason, the meth-. od of transmission is referred to as binary asynchronous transmission. It works effectively solely because both the speed of transmission from a transmitter and the rate at which the incoming bit string is sampled at the receiver are controlled by two separate clocks set to approximately the same frequency (±1%). The start and stop bits transmitted with each word indicate to the receiver that a new set of bits is coming, or transmission of a bit string is complete. All that we have to do to have instant interfacing is to make all of our slower analytical equipment look like a TTY to the computer's TTY interface. Several years ago this would have been a task for a well set-up electronics shop, but a new integrated circuit called a Universal Asynchronous Receiver-Transmitter (see photo) (UART) emulates a complete TTY interface. It takes a parallel word of data, converts it to a serial bit string, adds start and stop bits, and sends it down a twisted pair like a transmitter. The unit will also accept a serial bit string, strip out the start and stop bits, and provide a parallel data word, thus functioning as a receiver. It contains flag or signal lines that indicate when it is ready to transmit a new word or has received a word. These flag conditions are referred to as INPUT BUFFER FULL or OUTPUT BUFFER EMPTY. These signals can be used by simple peripheral circuitry to synchronize data flow to and from the unit. Both the input and output buffers (or storage register) are double—meaning that there are two buffers in parallel, and that if two words are sent, or two are received in rapid succession, the first word is not lost by being written over by the second. Most TTY interfaces are now double buffered. It is obvious that if we have 8 or 16 bits of data that need to be sent to a computer, it is a simple matter to do so using a UART integrated circuit. In many cases, it is desirable for the CPU to activate data acquisition at a unit based on a scheduling algorithm. This is easily accomplished by having the CPU issue a unique code word to the TTY transmitter unit; this is received and decoded by the UART unit and associated decoder circuitry, and if the word sent matches the preset code word at the receiver, the

UART begins to transmit the digital information back to the CPU (Figure 1). Most chemists live in an analog domain, where voltages are continuously variable and are not available in digital form. This problem can be solved easily by employing as a front end to a UART, an inexpensive digital panel meter containing its own analog/digital converter (ADC). These units are available for around $100 and provide not only a decimal display of the data for easy viewing, but also have four digital signal lines providing binary coded decimal information (BCD) for each digit. As the code chart indicates, 4 bits of information are needed to encode the decimal number 0-9. Although the code is inefficient in terms of data transmission, since 6 of the possible code combinations are not used, it is human oriented, and easily available in prewired modules. Such units having a four-digit display (resolution of 1/10,000) could easily be attached to the UART assembly and send 16 bits of BCD encoded data to the CPU. Software is readily available to convert this BCD to straight binary for manipulation by the processor. New autoranging panel meters make it even unnecessary to use operational amplifiers to condition instrument output signals to meet the voltage input needs of the meter's ADC (see photo). The serial signals from the UART can be sent along the twisted pair either as current (20 m A) or voltage (±6V). In classic telegraphy no current flow meant a 0, and current flow, a 1. This constant current loop is immune to all sorts of changing line re-

296 A · ANALYTICAL CHEMISTRY, VOL. 46, NO. 3, MARCH 1974

Decimal

Octal

ASCII

Binary

0 1 2 3 4 5 6 7 8 9 10

0 1 2 3 4 5 6 7 10 11 12

260 261 262 263 264 265 266 267 270 271

.0 1 10 11 100 101 110 111

261 260

1000 1001 1010

BCD 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 0001 0000

sistances (within the limits of the power supply) and is also insensitive to transient voltage spikes induced on the signal lines, both important factors in today's data transmission. Most TTY's and their interfaces operate at transmission speeds of 110 bits/sec. It would be desirable to speed this up for data communication. If the mechanical limitations of the TTY are removed from the picture, 20-mA current loops may easily operate at speeds of 2400-4800 bits/ sec over distances of several thousand feet without difficulty, and UART IC's may operate at speeds up to 20,000 bits/sec. Although many vendors will not support such operation with their standard TTY interfaces on the slight chance that peculiar local conditions might interfere, many chemists have rewired their standard TTY interface board to do just this with no difficulties. The wiring changes necessary are even specified in most vendors' instruction manuals and are easy to accomplish. All that usually is involved is the re-

REAL TIME OPEN LOOP LOGGING

OFF LINE LOGGING

HIERARCHICAL DATA ACQUISITION

OFF LINE LOGGING

CA5SETT

Figure 1. Modes of instant interfacing moval of one or two components a n d rewiring two to four j u m p e r wires. These two modules, the U A R T a n d digital voltmeter, obviously solve the interfacing problem posed by the con­ trol e q u i p m e n t in our model problem. As the m e d i u m speed devices come on line, modifications of this solution m a y be necessary for reasons t h a t will be discussed later. One possibility is to modify the above circuitry so t h a t data can be continuously collected a t each i n s t r u m e n t a n d stored t e m p o ­ rarily in a small memory b a n k . When the C P U is free to accept a new rec­ ord from the instrument, it can query it a n d cause a d u m p of the memory. Since it is desirable t h a t t h e /irst luord in is the /irst out, the memory is called a FIFO memory. These are now available in IC packages (e.g., 64 X 8-bit words) with almost all inter­ facing control signals built in. Addi­ tion to the circuitry suggested is sim­ ple (Figure 1). With this concept in mind, let us return to the problem posed by the high-speed spectrometer. In such applications, high-speed d a t a are produced in bursts, and de­ signing an on-line computer to meet these needs is inefficient a n d costly. A n u m b e r of extremely high-speed and moderate-speed ADC's are cur­ rently available, which have their

own particular type of F I F O memory. T h e concept is to digitize the d a t a a t t h e rate required by the experiment [rates from 100 M H z to 0.1 Hz (sic) are available] and store t h e d a t a file in a very fast memory. When the re­ cording period (25 μββο to 20,000 sec) is finished, the memory can be d u m p e d into C P U core memory. These devices, therefore, resemble the familiar storage oscilloscope, b u t instead of a trace t h a t can be photo­ graphed, they provide a file of digital information t h a t can be read by the computer after the event is com­ pleted. For this reason, they are called transient recorders. There is no reason why the available digital d a t a could not be t r a n s m i t t e d in an asynchronous m a n n e r to t h e comput­ er by m e a n s of the U A R T techniques, as was done with the digital voltmet­ er d a t a . In this way, experiments op­ erating in a real time of 100 μ-sec could generate 256 d a t a words to be t r a n s m i t t e d to a computer a t a later time in a period of 1 sec. An interesting alternative to build­ ing auxiliary F I F O memories to con­ verters is logging the digital informa­ tion either on to paper t a p e or on to magnetic t a p e if slow to m e d i u m speeds are involved. Since m a n y off-line logging users would like a hard-copy o u t p u t for rec­

298 A · ANALYTICAL CHEMISTRY, VOL. 46, NO. 3, MARCH 1974

ord keeping, conversion of the B C D or straight binary code to ASCII is often necessary (Table I). This allows the commonly available T T Y to both punch an ASCII paper t a p e as well as print out a useful report. Several "converters" to accomplish this are commercially available. On the other h a n d , if no copy is required, or mag­ netic tape loggers are involved, thé n a t u r a l binary d a t a m a y be recorded. Increasingly, low-priced digital cassette loggers will be employed. Frequency modulation techniques* are usual in such recording devices. These units commonly have the ability to multiplex a n u m b e r of analog signals into a common ADC a n d record b o t h t h e channel n u m b e r a n d the d a t u m point on magnetic t a p e for retrieval a t a later t i m e . N o r m a l speeds in the lower price units are about 100 16-bit d a t a words/sec, t h u s accommodating one m e d i u m speed device or 10 slow devices. 120,000 d a t a words can be stored per cassette, t h u s allowing continuous d a t a from 10 GC's to be stored for 20 min. Continuous d a t a from our two groups of three instruments could be stored for over an hour. The low cost of these units suggests t h a t for even slow e q u i p m e n t existing in nodes of 3-4 a t distant locations, a logging u n i t would be stationed at each node, with an asynchronous communications link at each node capable of communicating to a host computer for d a t a reduction. Since the U A R T units look like teletypes, these connections can involve extremely long distances (miles) if modem* connections to s t a n d a r d telephone circuits are involved. In m a n y cases, vendors provide the option of straight binary, BCD, or ASCII o u t p u t format. We have, by using s t a n d a r d modules, achieved interfacing to the existing instruments in our problem with facility. Now, let us look into the expansion problem a n d the subject of speed which it introduces. Although speed of d a t a acquisition a n d manipulation is t h e usual reason for employing a computer, it is surprising t h a t few analyses bother to evaluate the system overhead t i m e s in the early states of development. It is obvious t h a t two t i m e constraints m u s t be carefully m e t if the computer is to operate effectively. First, the available real time for d a t a acquisition m u s t not be exceeded. A computer acquiring d a t a via register transfer (accumulator 1/0)* from a single i n s t r u m e n t is normally limited to a total d a t a acquisition rate of 30,000 d a t a samples/sec. T h i s takes into account not only the d a t a acquisition time, b u t the software overhead* necessarily associated with d a t a storage. (Table II shows typical

Table II. Peripheral Speeds "Peripheral"

Time/word

Direct memory access Register input Disk Industry compatible tape Nonstandard tape/floppy disks Cassette recorders Cartridge recorders 2400 bits/sec asynchronous transmission High-speed paper tape Low-speed paper tape 110 bits/sec asynchronous transmission

1-2 Msec 4-8 Msec 16-32 jusec 64-128 Ajsec 256-512 Msec

data acquisition speeds for various types of computer configuration and peripherals as a guide. A 16-bit data word is assumed). However, even this rate cannot be achieved under cir­ cumstances in which a large number of slow instruments (2400 bits/sec, for example) are communicating with the CPU. This is due to the fact that even more complicated executive software is necessary to handle the scheduling (when to sample) as well as the proper filing. As each instru­ ment interrupts normal CPU opera­ tion, expensive time (in excess of 100 μβεο) is utilized in identifying the in­ terrupting device, saving important CPU status registers, servicing the in­ terrupting device (acquiring the data), and restoring the system to its original state. These processes could easily halve or quarter data acquisi­ tion speeds if an interrupt/data word interfacing scheme was employed. This is the reason for suggesting FIFO buffer memories as our system was expanded. Second, if data processing and re­ porting are involved, sufficient time must be alloted for these operations, or the unit will become calculation bound. Since TTY I/O is very slow, output to these devices will not nor­ mally consume more than 1 msec of processor time per second of TTY output printing. Simple high-speed line printers employ buffers and use about the same amount of processor time. Of more serious consequence are the long periods required for mathematical operations, particularly using software containing floating point* instructions. These require from 35 to 1200 Msec/math operation, depending upon its nature and the quality of vendor software. An 11point least-squares fit through 16 points can easily involve 0.5 sec of CPU time. Hardware math packages are available which will reduce these times by a factor of ten at prices comparable to the CPU itself! However, this time squeeze in a dedicated system will increasingly be

1-2 msec 4-8 msec 8 msec 16-32 msec 64-128 msec 100 msec

solved by employing a hierarchical system—a system in which one host computer handles the data reduction and reporting for a number of satel­ lited computers which only handle the data acquisition problem. This is due to the advent of microprocessors or microcomputers (see photo). These are inexpensive large-scale integrated circuit devices which are essentially central processors on a chip. They are completely software programmable, with instruction sets approaching those of the more sophisticated mini­ computers (like the PDP-11, for ex­ ample). A typical system configura­ tion is shown that would cost about $1000, complete with power supplies, memory, rack, and UART transceiver unit. Bootstrap loaders and common­ ly used programs are stored in pro­ grammable read-only-memory. Their low cost and their ability to control the data acquisition process for a number of similar, slow-data-rate in­ struments indicate that they are the ideal solution to the type of problem outlined above, in which increasing utilization of the main processor re­ quired installation of satellited con­ trol and acquisition devices for slower instruments. Most of the microprocessor systems have a number of input and output ports* wired to the processor itself, thus relieving the interfacer of under­ standing I/O electronics. One merely plugs the output of a convertor into an input port. The program interrupt structure on most systems is as well developed as that of state-of-the-art minicomputers. The unit thus pro­ vides control and scratch pad (tem­ porary) memory capability at low cost. BCD/binary conversion can be done under software control, and the unit can handle all telecommunica­ tions to a host computer. Software for these systems is still somewhat of a problem, but increasingly cross as­ semblers* are being made available which will allow program preparation on the host and transmission of the binary-coded program to the micro-

300 A · ANALYTICAL CHEMISTRY, VOL. 46, NO. 3, MARCH 1974

processor via asynchronous binary communication. After the data base has been acquired by the micropro­ cessor, and manipulated, it can be sent back to the host computer in a similar manner. At present, such units cannot han­ dle floating-point arithmetic with ease. However, this task can be taken over by a minicomputer with hard­ wire capability. In a few years the use of calculator chips in micropro­ cessors may even alter this situation. At present even this route could be employed if the long division times (100 msec) of such units could be tol­ erated. In brief, it appears that vendors are finally realizing that interfacing to a variety of analytical instruments is a fast-growing field. Most main frame manufacturers do not wish to make specific interfaces for each instru­ ment, nor could the chemist afford them if available. The increasing number of do-it-yourself modules is solving the problem neatly. Glossary Assembler: a computer program which can change a program written in special code words, called mnemonics, to ma­ chine-executable binary code Binary/octal: binary is a means of repre­ senting numbers by a scheme in which each number position has the following weight 2°, 2 1 , 2 2 , 22 3 , etc.; in octal each weight is 8°, 8 \ 8 , 8 3 , etc. Closed loop: control by a CPU where real time decisions affect the sequence or na­ ture of the controlled operation; involves feedback from the experiment to the CPU Compiler: a program to translate user commands in almost algebraic/English format into a code that is machine exe­ cutable when another program called the "operating system" is also present Cross assemblers: assemblers which run on one machine, but produce code executa­ ble on another machine Direct memory access: data flow to or from a computer which bypasses the ac­ cumulator or input register. It appears to flow directly into memory. Used for fast transfer of blocks of data Firmware: programmable read-onlymemories, involving storage of programs in units that cannot be written on by the program. Some units can be field reprogrammed with special devices; oth­ ers are "fixed" Floating-point math: mathematical opera­ tions in which a number is represented by a characteristic and mantissa Frequency modulated recording: where a binary 1 is represented by one frequen­ cy, a binary 0 by another Hierarchical (net): interconnection be­ tween several CPU's, in which one serves as a central body to satellited CPU's Host machine: see hierarchical I/O bus: the 50-100 electrical lines that represent the input, output lines of a computer, as well as decoding and tim­ ing signals. Each computer model has a slightly different I/O bus structure Input/output ports: collections of 8-16 electrical points which can be electrical­ ly connected to a digital device, provid­ ing a channel for data flow to or from the CPU

Intelligent controllers: devices that can control equipment operation and make moderately complex decisions. These may involve all hardware or a combina­ tion of hardware/software Interpreter: a program that accepts user commands in almost algebraic/English format, stores it, and executes when commanded Modem: modulator-demodulator devices used to translate l's or O's to tones (frequencies) that can be sent over com­ mon carrier lines On-line: data collection and control achieved by direct connection between the device and a central processor unit (CPU) Open loop: computer activation of experi­ mental sequence; no feed-back from experiment (cf closed loop) Parallel and serial transmission: in paral­ lel transmission all of the elements of a word are transmitted simultaneously, similar to the output of an adding ma­ chine's printer. Serial transmission in­ volves output of the elements of a word, one element at a time, the way a type­ writer presents data Read-only-memory: memory which can be read from, but not written into. Some ROM's are reprogrammable (can be al­ tered with special equipment) Register or accumulator I/O: where the data flow to and from the computer takes place through one of the arithme­ tic registers of the computer, often called the accumulator Software overhead time: the execution time of software necessary to accomplish a task

"Microprocessors a r e going to c h a n g e your future. A r e you ready?" ask Jonathan Titus and Raymond Dessy

Raymond E. Dessy and Jonathan A. Titus wrote a report for Analytical Chemistry in February 1973 on "Computer Interfacing." Technological progress in micro­ computers has taken place at such a rapid pace that a new look at interfacing is imperative. Dr. Dessy, with David Larsen, has over the last three years, given an ACS sponsored course on minicomputer interfacing. Beginning in June 1974, Dr. Dessy and Jonathan Titus will be presenting a new ACS sponsored course on microcomputer interfacing. Raymond E. Dessy, professor of chemistry at Vir­ ginia Polytechnic Institute and State University, received his BS and PhD de­ grees in 1953 and 1956. After fellowships at UCLA and the University of Illinois and a faculty appointment at the University of Cincinnati, he came to VPI in 1966. Jonathan A. Titus is a research assistant at VPI and is completing his PhD requirements under R. E. Dessy. He received his BS degree in 1967 from Worchester Polytechnic Institute and his MS degree in 1969 from Rensselaer Polytechnic Institute.

Equipment Supplier's List (This list is not complete and only presents some of the many manufacturers and suppliers) Data Loggers and Systems Daia Graphics Corp. 8 4 0 2 S p e e d w a y Or. San Antonio, Tex. 78230 Datel Systems. Inc 1020 T u r n p i k e St. Canton. Mass. 02021 United Systems Corp. 918 W o o d l e y Road Dayton, Ohio 45403 Analog Devices Ρ Ο Box 2 8 0 Norwood, Mass

Hvbrid S y s t e m s Corp. 87 Second A v e . Burlington, Mass. 01803

Loader-, a n d i n t e r f a c e s • ! , ' . -. . 16-Channel A / D c a s s e t t e logger

:rfcl· .

C o m p l e t e line of l o g g e r s .;...... Serial d a t a e x c h a n g e (SERDEX) system

02062

i ÏU'tiw ]i

UAR Τ Integrated Circuits Texas Instruments. I n c . TMS 6010 and TMS 6011 Ρ Ο Box 6 0 1 2 D a l l a s , Tex. 75222 Saneral Instruments ••..;'....'.-· • • ',..'.•. 600 W . J o h n St. H i c k s v i l l e . Ν V 1 180k' Western Digilal Corp. TK 1602A 19242 Red Ή Mi A v e . N e w p o r t B e a c h , Calif 9 2 6 6 3 Signetics 2Γ:·ο·"· 8 1 1 East A r q u é s A v e . S u n n y v a l e , Calif. 9 4 0 8 6 '

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Transient Recorders

Biomation. Inc. 10411 B u b b Road C u p e r t i n o , Calif. 9 5 0 1 4 Tektronix P.O. Box 5 0 0 : ,;J T;L- '-..";-"•";"-2- - B e a v e r t o n , O r e . 9 7 0 0 5 Gould. Inc. Instruments Systems Div. 3631 Perk ns Ave. '•'""• ' Cleveland, Ohio 44114 Aminco 8030 G e o r g i a Ave Silver S p r i n g , M d . 2 0 9 1 0

Analog-to-Digital Convenors and Panel M e i e r s Analogic Audubon Rd. Wakefield, Mass. 01880 Datel (Address above) Burr Brown Research Corp. I nil A i r p o r t I n d u s t r i a l Park Tucson, Ariz. 85708

FIFO Memories Signetics 2 5 3 5 «32 X 8) (Addressabbve) ' •',' ν Fairchild Semiconductor 3 3 4 1 [64 X 4) 313 Fairchild Dr. M o u n t a i n V i e w , Calil 9 4 0 4 0 Western Digital FF; 1502E (40 x 9) (Addressia'taove) :'"S-i-·,;

.

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Analog Devices P.O. Box 2 8 0 Norwood, Mass. 02062 302 A · A N A L Y T I C A L C H E M I S T R Y , V O L . 4 6 , N O . 3, M A R C H 1 9 7 4

Many models

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Microprocessors—Microprocessor Systems Intel Corp. 4 - a n d 8-bit s y s t e m s 3065 Bowers Ave. S a n t a C l a r a , Calif. 9 5 0 5 1 National Semiconductor 16-bit processor 2900 S e m i c o n d u c t o i D i S a n t a C l a r a , Calif. 9 5 0 5 1 F a i r c h i l d ;",| •" : , ~-''.i. Calculator/processor (Address above) Control Logic, I n c Nine Tech C i r c l e Ν j t i c k M a s s 01 760

C o m p l e t e s y s t e m s for I n tel R bit p r o c e s s o r