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Investigating Limiting Factors in Stretchable AllCarbon Transistors for Reliable Stretchable Electronics Alex Chortos, Chenxin Zhu, Jin Young Oh, Xuzhou Yan, Igor Pochorovski, John W. F. To, Nan Liu, Ulrike Kraft, Boris Murmann, and Zhenan Bao ACS Nano, Just Accepted Manuscript • DOI: 10.1021/acsnano.7b02458 • Publication Date (Web): 26 Jul 2017 Downloaded from http://pubs.acs.org on July 27, 2017

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Investigating Limiting Factors in Stretchable All-Carbon Transistors for Reliable Stretchable Electronics Alex Chortos1, Chenxin Zhu2, Jin Young Oh3, Xuzhou Yan3, Igor Pochorovski3, John W.-F. To3, Nan Liu3, Ulrike Kraft2, Boris Murmann2, Zhenan Bao3* 1

Department of Materials Science & Engineering, Stanford University, Stanford, CA, USA.

2

Department of Electrical Engineering, Stanford University, Stanford, CA, USA.

3

Department of Chemical Engineering, Stanford University, Stanford, CA, USA.

KEYWORDS: stretchable transistor, stretchable electronics, carbon nanotubes, charge transport, carbon nanotube sorting

ABSTRACT:

Stretchable form factors enable electronic devices to conform to irregular 3D structures, including soft and moving entities. Intrinsically stretchable devices have potential advantages of high surface coverage of active devices, improved durability, and reduced processing costs. This work describes intrinsically stretchable transistors composed of single walled carbon nanotube (SWNT) electrodes and semiconductors and a dielectric that consists of a nonpolar elastomer. The use of a non-polar elastomer dielectric enabled hysteresis-free device characteristics. Compared to devices on SiO2 dielectrics, stretchable devices with nonpolar dielectrics showed lower mobility in ambient conditions because of the absence of doping from water. The effect of SWNT bandgap on device characteristics was investigated by using different SWNT sources as the semiconductor. Large-bandgap SWNTs exhibited trap-limited behavior caused by the low capacitance of the dielectric. In contrast, high-current devices based on SWNTs with smaller bandgaps were more limited by contact resistance. Of the tested SWNT sources, SWNTs with a maximum diameter of 1.5 nm performed the best, with a mobility of 15.4 cm2/Vs and an on/off ratio >103 for stretchable transistors. Large-bandgap devices showed increased sensitivity to 1 ACS Paragon Plus Environment

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strain because of a pronounced dependence on the dielectric thickness, while contact-limited devices showed substantially less strain dependence.

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Stretchable electronics provides the ability to conform to soft and non-planar objects and to accommodate the movement of biological tissue.1-5 This emerging form factor for electronics enables bio-integrated sensors with improved sensing reliability and comfort for wearable,6-8 implantable,9-11 and prosthetics12-15 applications as well as providing valuable form factors for bio-inspired robotics16, 17 and novel consumer electronics.18, 19 While sophisticated devices can be produced by arranging traditional rigid electronic materials in stretchable layouts,6-9, 13 developing intrinsically stretchable systems could reduce processing costs,20, 21 improve surface coverage of active devices,22 and improve durability.23, 24 The implementation of intrinsically stretchable electronic devices requires the development of intrinsically stretchable conductors,2529

semiconductors,30-33 and dielectrics20, 34-36 and the optimization of the interactions between

these layers in a device.37 Thin-film materials must overcome challenges with adhesion between heterogeneous materials38 and modulus mismatch between layers. In contrast, networks of 1D materials have low effective moduli and relatively fewer adhesion challenges.39 Among 1D materials, single walled carbon nanotube (SWNT) networks are promising because of their high mobilities, good stretchability, and exceptional durability. The stretchability of SWNT networks is enabled by the sliding of individual SWNT while retaining a percolating pathway due to the large aspect ratio of the SWNTs.27, 39, 40 Near the percolation threshold of a conductive network, the conductivity changes quickly with density.25, 41 Since stretching a percolating network typically reduces the number of percolating pathways in the stretching direction, starting with a network that is far above the percolation threshold is important for minimizing strain-induced variation in conductivity.25, 42 The large aspect ratios of SWNTs result in low percolation thresholds and consequently relatively little strain-dependence in the conductivity.23, 27, 43 Since the SWNTs slide over each other with relatively little mechanical resistance, the SWNT network


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has a very low effective modulus. However, the individual SWNT have exceptional mechanical properties, with tensile moduli ~1 TPa,44 that result in devices with exceptional durability.23, 24, 45 In this work, stretchable all-carbon transistors were fabricated using unsorted SWNTs as the conductors and polymer-sorted semiconducting SWNTs as semiconductors. Much of the previous work on stretchable transistors have used ion gel dielectrics24, 46-48 or polar dielectrics with ionic polarization.23, 43, 49 These ionic dielectrics have advantages such as thickness-independent capacitance that allow facile fabrication of devices,24, 46 but they typically suffer from large hysteresis, slow response time, and sensitivity to environmental conditions. Suppressing ion conduction in elastomers can be challenging due to the high mobility of the soft polymer chains that are utilized far above their glass transition temperature.23, 35, 43, 50 Consequently, in order to minimize ion conduction and eliminate hysteresis, elastomers with a very low concentration of dipoles must be used.20, 30, 31, 35, 51 In this work, we use nonpolar styrene-ethylene-butadiene-styrene (SEBS) hydrogenated elastomer as a dielectric and substrate. The use of nonpolar SEBS resulted in devices with no hysteresis and with threshold voltages close to 0 V. A drawback of nonpolar dielectrics is that their capacitance is very low, resulting in low gate-source electric fields that can impair the transistor performance.52 However, by optimizing the device dimensions and semiconductor processing conditions, we were able to prepare transistors that can achieve on/off ratios of ~104 with operating voltages as low as 20 V. In addition to the dielectric, the semiconductor plays a key role in determining the transistor characteristics. While mobilities for individual SWNT can be as high as 10 000 cm2/Vs,53 the mobility for networks of semiconducting SWNT (s-SWNT) is limited by the junctions between s-SWNTs in the network54, 55 and the junctions between the s-SWNTs and the metallic electrodes.56, 57 These resistance values are affected by factors such as the bandgap of 4 ACS Paragon Plus Environment

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the s-SWNTs,53, 58 the doping state of the s-SWNTs,59 and the band alignment with the metallic contacts.60 Reducing the bandgap typically increases the number of thermally generated carriers53 at the expense of the on/off ratio.58, 61, 62 In this work, we use SWNTs with different diameters to understand the limiting factors for charge transport in all-carbon stretchable transistors with low-capacitance nonpolar dielectrics. The devices with the best performance were fabricated with s-SWNTs with a maximum diameter of ~1.5 nm. They exhibited mobilities up to 15.4 cm2/Vs with on/off ratios greater than 103.

Results and Discussion Device Fabrication The devices were fabricated using sequential transfer of each component from a rigid substrate (Figure 1). First, unsorted arc-discharged SWNTs were spraycoated onto a substrate and were patterned using oxygen plasma.23 The etch mask could either be copper evaporated through a shadow mask or photoresist patterned with lithography. These SWNT electrodes were used for both the gate and source-drain electrodes. The semiconductor was composed of carbon nanotubes that were sorted using a supramolecular conjugated polymer.63 In brief, as prepared (~30% semiconducting and ~70% metallic) SWNTs were dispersed using the supramolecular polymer formed through H-bonding between didodecylfluorene units, followed by a centrifugation step that induced the metallic SWNTs to settle into a pellet, leaving only semiconducting SWNTs in the solution.58 The semiconductor was spincoated onto the source/drain electrodes and the supramolecular polymer was removed by disassembly in a dilute acid. At the density of SWNTs used for the channel region in this work, the bundle diameters


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were in the range of 2-6 nm (Figure S1). Different SWNT sources with different diameters (d) were used to prepare enriched semiconductor solutions, including HiPCO (high pressure carbon monoxide) (d = 0.8-1.2 nm), plasma discharge (PD) (d = 1.0-1.5 nm), arc-discharged (AD) (d = 1.2-1.7 nm), and Tuball (d = 1.4 – 2.2 nm) (Figure S2, Table S1). The diameter of SWNTs is inversely related to the bandgap of the SWNT;64 HiPCO SWNTs have the largest bandgap and Tuball SWNTs have the smallest. Scaling devices to smaller dimensions will be important for making high-performance devices with fast response time. In order to improve alignment and scaling of devices, a photolithography-based process was used to define the source and drain electrodes (Figure 1b). In applications such as wearable and implantable electronics, high voltages could be a potential hazard.65 Devices with a channel length of 20 µm can be operated with a source-drain voltage (VDS) of -10 V while retaining well-behaved transfer characteristics within a gate-source voltage (VGS) range of 20 V and with an on/off ratio ~104 (Figure 1c). When measured with a constant VDS of -10V, the transfer curves for devices with different channels exhibit similar characteristics (Figure 1d). Transfer curves as a function of channel length for HiPCO, AD, and Tuball SWNT are included in Figure S3.


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Figure 1: a) Device fabrication by sequential transfer for devices with SEBS dielectrics. b) Image of devices fabricated using photolithography to pattern SWNT electrodes. c) SEM image of channel region showing high-density of semiconducting HiPCO SWNTs. d) Transfer curve for devices with 20 µm channel lengths operated at low electric fields (max EGS = 7.5 V/µm), enabling relatively low voltages. e) Transfer curves for stretchable transistors fabricated with PD semiconductors. The VDS was -10 V and the W/L ratio was 20 for each channel length. The device was optimized to have a large on/off ratio at small channel lengths by using a slightly lower channel density, resulting in lower currents than in subsequent figures.


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The reproducibility of SWNT transistors has been a key challenge to overcome for the implementation of circuits.66-69 Figure 2 shows within-substrate variability for devices before and after transfer onto stretchable dielectrics. Thin film transistors (TFTs) with SWNT electrodes and PD semiconductors on rigid 300 nm SiO2 dielectrics (RTFTs) exhibited very consistent mobilities (Figure 2a,b) and the standard deviation in the threshold voltage (Vt) was 2.7 V. Mobilities were measured using the capacitance extracted from the parallel plate model, which is a valid approximation for the effective capacitance when the dielectric is much thicker than the spacing between nanotubes.70 In comparison, after transfer to the SEBS dielectric to create a stretchable thin film transistor (STFT) (Figure 2c-f), the stretchable devices exhibited a larger range of mobilities, but very consistent on/off ratios and a standard deviation in Vt of 0.46 V. The coefficients of variation (standard deviation divided by the average) for the mobilities of the rigid and stretchable devices were 0.052 and 0.139 respectively, indicating that the transfer process introduces some variability in the mobility, but the nonpolar SEBS dielectric reduces variability in Vt. The variability for devices on rigid and stretchable substrates are compared in Table 1. The statistics for the variability of stretchable devices fabricated with HiPCO and AD SWNT exhibit similar characteristics (Figure S4, Table S2). In this work, mobility values are calculated in the saturation region using the parallel plate model. The parallel plate model is a valid approximation for the capacitance when the dielectric thickness (>1 µm) is much larger than the spacing between SWNTs in the channel (≥ 10 µm-1, Figure S5).70, 71


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Figure 2: Reproducibility statistics for all-carbon SEBS transistors with PD semiconductors. a) Transfer curves and b) mobility statistics for rigid devices with 300 nm SiO2 dielectrics. c) Transfer curves, d) mobility statistics, e) on/off ratio, and f) threshold voltage for stretchable devices with 1 µm SEBS dielectric. Measurements were collected for 28 devices on one substrate to determine the intra-substrate variability between devices. All devices had W/L values of 400/50 µm.

Table 1: Summary of within-substrate variation for rigid and stretchable devices with PD semiconductors. “cv” indicates coefficient of variation, which is the standard deviation divided by the average. All devices had W/L values of 400/50 µm. Measurements on stretchable devices were collected in the as-fabricated state (at 0 strain before stretching). Parameter Mobility (cm2/Vs) Mobility cv Vt ± stdev (V)

Rigid (300 nm SiO2) 20.5 0.052 30.7 ± 2.7


Stretchable (1 µm SEBS) 6.4 0.139 0.33 ± 0.46

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Properties of SEBS Dielectrics

We found that using hydrogenated SEBS is important for the stability of the material, and the availability of several formulations with different styrene ratios provides a versatile set of materials with different elastic moduli (Figure 3a). In addition, thermoplastic elastomers typically have high toughness and tear strength.23, 72 Increasing the styrene ratio increases the elastic modulus, but also increases the mechanical hysteresis (Figure 3a, Figure S6). Some applications, such as implantable electronics, may require low elastic moduli that match the properties of tissue.6, 73, 74 while other applications, such as sensors for prosthetics, require high durability.75, 76 Similar to other reports on SEBS, the breakdown voltage of the hydrogenated SEBS used in this work is approximately 100 V/µm (Figure 3b) in the unstrained state. Stretchable capacitors were fabricated with SEBS dielectrics and SWNT as top and bottom electrodes. The capacitors were stretched to 60% strain for 1000 cycles. After cycling, the breakdown field was measured to be 63 V/µm (Figure S7). This provides guidance for the safe operating voltages of the transistors. For a 1 µm dielectric, the VGS was swept from 10 to -50 V, and the VDS was set as -40 V, resulting in a maximum gate field of 50 V/µm for both VGS and VDS. The fabrication process in this study relied on the sequential transfer of the gate electrode, dielectric, and source/drain and semiconductor layers onto an SEBS substrate.23 Therefore, the effectiveness of the transfer is a critical consideration. Since non-polar materials have low surface energy, it can be difficult to transfer SWNTs from a high-surface energy substrate such as SiO2 to a low surface energy elastomer such as PDMS.71 However, using thermoplastic elastomers can improve this transfer process by exploiting the adhesiveness caused


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by residual solvent in the material. Consequently, the process of transferring the semiconductor and source/drain electrodes onto the dielectric was carried out within 5 minutes after spincoating the dielectric. Furthermore, the modulus of the SEBS has an important influence on the transfer properties. Low modulus SEBS with a styrene ratio of 12% more effectively transferred SWNT electrode lines than higher modulus SEBS with a styrene ratio of 30% (Figure 3c). This is consistent with previous publications that explored the influence of materials properties on the transfer process.77, 78 Although there are some residual SWNT after transferring the electrodes (Figure S8), the semiconductor is fully transferred from the Si wafer to the SEBS dielectrics (Figure S9). SWNT semiconductors are typically deposited on polar dielectrics such as SiO2 and amino-functionalized silanes.79, 80 During the deposition process, the presence of polar groups on the surface promote the adhesion of the SWNTs. However, these polar groups can also act as trap states that cause hysteresis when charges become trapped during the gate sweep.59, 81-83 Furthermore, the polar surface groups can shift the threshold voltage.59, 84 This is enhanced by the fact that polar groups can attract dopants such as oxygen and water.85 Since SEBS is nonpolar, stretchable devices fabricated with SEBS dielectrics exhibit no hysteresis (Figure 3d) because of the lack of charge traps on the surface. Furthermore, since the SEBS dielectric does not attract polar dopants such as water, the devices have a threshold voltage close to 0 (Figure S4, Table S2), which is desirable for certain circuit designs. These results support previous suggestions that doping from water is facilitated by the presence of polar groups on the dielectric86 and that hysteresis is caused by charge transfer to traps on the surface of the dielectric81 rather than traps at junctions between SWNT.85 In addition to improved hysteresis, the use of nonpolar dielectrics is beneficial for reducing bias stress effects (Figure S10).87


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Figure 3. a) Young’s modulus and hysteresis as a function of styrene ratio for SEBS elastomers. b) Cumulative breakdown and extracted breakdown field for different thicknesses of SEBS dielectrics. c) Profilometer measurement of residual SWNTs left on the Si substrate after transfer of the source and drain electrodes. Reduced styrene content (and consequently reduced modulus) result in more complete transfer of the SWNT source and drain electrodes. d) Forward and reverse scans showing a lack of hysteresis for a device fabricated with SWNTs from a plasma discharge source. The VDS was -30 V.

Investigating Performance Limitations There are 3 primary sources of resistance in SWNT devices (Figure 4a): charge injection from the contacts into the semiconductor (RC),57, 88 the resistance of the s-SWNT (RSWNT),89 and


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the resistance of the junctions between SWNT in the channel (RJ).55, 90, 91 All three of these resistance values are affected by the bandgap of the SWNTs. As the bandgap of the SWNT decreases, the valence band moves to higher energies, favoring injection of holes from the source and drain electrodes and reducing RC.60 As the bandgap decreases, more charge carriers are generated at the same gate field, reducing RSWNT by increasing the charge density. Lastly, as the bandgap of the SWNT decreases, there is reduced variation between the bandgaps of individual SWNT in the network, reducing RJ.92 The net effect is that, as the bandgap of a semiconductor decreases, the mobility increases at the expense of the on/off ratio.53, 58, 60, 93 In order to investigate the tradeoff between the mobility and on/off ratio, STFTs were fabricated with different SWNT densities. Example transfer curves for each type of SWNT are shown in Figure 4b, while a compilation of results from many substrates are included in Figure 4c. Mobilities were extracted by finding a linear fit to a 20 V region of the plot of √ID vs VGS (Figure S11) with the maximum transconductance. HiPCO STFTs exhibited mobilities near 1 cm2/Vs with on/off ratios of 104 to 105. PD STFTs exhibited mobilities ranging from 2.8 to 15.4 cm2/Vs with on/off ratios from 2x105 to 2x103, while AD STFTs exhibited similar mobilities but with smaller on/off ratios. Tuball SWNT, with very small bandgaps, exhibit both very low mobility and low on/off ratios. The mobility of the stretchable devices is compared to the mobility of RTFTs with SWNT source and drain electrodes (Figure 4d). In addition to the bandgap, the different SWNT sources vary in their average length and defect density (as measured by the Raman G/D ratio).58 Consequently, in addition to the SWNT diameter, the mobility may be affected to some extent by other factors. These factors may contribute to the unexpectedly low performance in Tuball devices; the sorted nanotubes are shorter and the sorted solutions include more defects. In rigid devices with SiO2 dielectrics, the Tuball SWNTs also showed lower performance than the AD


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SWNTs.58 However, despite the variation in structural characteristics between SWNT sources, meaningful information about the effect of SWNT diameter can still be extracted.94 Dividing the mobility of the stretchable devices by the mobility of the rigid devices (Figure 4e) indicates that PD SWNT retain their performance the best when transferred onto stretchable SEBS dielectrics; the mobility of STFTs is ~0.52 times the mobility of RFTFs. There are a number of factors that contribute to the relative performance of the rigid and stretchable devices, including doping state, dielectric thickness, and contact resistance, and the investigation of these factors are described below.


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Figure 4. a) Diagram of the contributions to device resistance in all-carbon transistors. Black lines represent metallic SWNT electrodes, while red lines represent the s-SWNT channel. b) Example transfer curves for devices with channel lengths of 200 µm and channel widths of 4 mm. The VDS was -40 V. Individual transfer curves were selected by choosing the device with mobility closest to the average for each type of SWNT. c) Plot of mobility vs. on/off ratio for different types of s-SWNTs. Each point describes a substrate. The error bars represent one standard deviation. For each SWNT source, the density and channel length were varied to


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produce the data for the results. d) Plot of the mobility vs. SWNT diameter for rigid and stretchable devices. e) Relative mobilities for stretchable devices compared to rigid devices.

Stretchable devices are difficult to hermetically encapsulate.95 Consequently, all devices were measured in ambient conditions to compare device operation in an environment that reflects realistic applications. In ambient atmosphere, SWNT TFTs are strongly affected by doping from oxygen and water.84, 85 When unencapsulated RTFTs fabricated on SiO2 dielectrics were removed from vacuum and exposed to ambient conditions (Figure 5a), the mobility increased from 3.2±0.5 cm2/Vs to 8.4±0.7 cm2/Vs for HiPCO SWNTs and from 22.3±0.4 cm2/Vs to 49.7±1.2 cm2/Vs for AD SWNTs. In comparison, STFTs exhibited mobilities that were independent of whether the devices were in ambient or in vacuum (Figure 5b), indicating the absence of doping by ambient humidity. Since the mobility values for rigid devices in Figure 4d and Figure 4e were collected in ambient conditions, the lack of doping from water and polar groups on the dielectric is an important contributor to the low performance of STFTs compared to RTFTs. For TFTs based on s-SWNT, contact resistance can be a limiting factor for device performance57, 82 when the s-SWNT network has very low metallic content.56 The junction resistance for contact between two semiconducting SWNT or two metallic SWNT is relatively low. However, the junction resistance between a metallic and semiconducting SWNT can be several orders of magnitude larger due to the formation of a Schottky barrier that locally changes the Fermi level near the junction and inhibits the transmission of charges.96 The transmission line method97 (TLM) was used to investigate RC by fabricating transistors with different channel lengths. When plotting the channel resistance as function of channel length, the y-intercept is 16 ACS Paragon Plus Environment

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assumed to be RC (Figure S12). For RTFTs at an overdrive voltage (VOV = VGS - Vt) of -40 V, devices with HiPCO SWNTs exhibited a RC of 894 Ωcm and a channel resistance (RCh) of 5600 Ωcm, while AD RTFTs exhibited a RC of 672 Ωcm and a RCh of 849 Ωcm. While RC is lower for the small-bandgap AD SWNTs, the devices are more strongly contact limited because the high mobility results in a smaller contribution of the RCh to the total resistance. STFT devices exhibit RC values of 57.0 kΩcm and 4.37 kΩcm for HiPCO and AD SWNTs. There are several potential reasons why these RC values are larger than the values for RTFTs. Firstly, RC typically depends strongly on the induced charge in the channel;98 which is lower for STFTs due to the large dielectric thickness. Higher gate fields, along with larger areal capacitances, induce the accumulation of more charges in the channel that can reduce the charge injection barrier. Secondly, it has been observed that doping affects both the resistance of the SWNT and the resistance of the junctions between SWNT.99, 100 Consequently, RC should depend extensively on the doping state of both the SWNT channel and the SWNT electrodes. The relatively low doping of the STFTs is expected to contribute to larger RC values than for RTFTs. RC values for the RTFTs in this work are similar to other rigid devices,56 and RC values for the STFTs are consistent with other devices fabricated with polymer dielectrics.87


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Figure 5. a) Effect of ambient exposure on RTFTs. b) Effect of ambient exposure on STFTs with SEBS dielectrics. c) RC extracted using the TLM method with VDS = -0.1 V for TFTs on SiO2 dielectrics. Channel resistance is for a 200 µm channel. d) RC extracted using the TLM method with VDS = -1 V for stretchable TFTs on SEBS dielectrics. Channel resistance is for a 200 µm channel.

For the processing methods used in this work, the SEBS needed to be at least 1 µm thick in order to achieve high device yields. Consequently, with a dielectric constant of 2.3, SEBS dielectric layers had low areal capacitances (less than 2 nF/cm2). For organic semiconductors, low capacitance dielectrics present a challenge for device performance because high charge


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densities are required to fill traps.52 With a low areal capacitance, the same applied gate voltage results in a lower charge carrier density. Consequently, the mobility often decreases as the dielectric thickness increases.50 To gain insight into the influence of traps, we fabricated devices with dielectric thicknesses of approximately 1, 2, and 3 µm (1.87 nF/cm2, 1.01 nF/cm2 , and 0.68 nF/cm2, respectively; Figure S13) for different SWNT sources (Figure 6a). The devices were operated using the same VDS. For each SWNT source, the mobilities were normalized to the values for a dielectric thickness of 1 µm. For the large-bandgap HiPCO SWNT, the mobility for a device with a 3 µm dielectric is 0.36 times the mobility for a 1 µm dielectric. In contrast, devices made with AD SWNT exhibit mobilities that have relatively minimal dependence on the dielectric thickness, suggesting that the gate-source field is not a major limiting factor for charge transport in these devices. The standard equation for saturation drain current in TFTs (Equation 1) can be rearranged to find the expected dependence on dielectric thickness (Equation 2).

− = μ −

(1)

− = μ

(2)

In equations 1 and 2, µ is the mobility, Cdiel is the dielectric areal capacitance, εo is the permittivity of free space, εr is the relative permittivity, and EOV is the overdrive field, which is the overdrive voltage divided by the dielectric thickness (EOV = (VGS-Vt)/d). The transfer curves plotted as a function of VGS and EOV are shown in Figure S14. According to equation 2, if the mobility and EOV are constant, the ID should be proportional to the dielectric thickness. Figure 6b plots the ID at a constant EOV of -12 V/µm. This indicates that, as expected, the ID for the devices fabricated with AD SWNT is approximately proportional to the dielectric thickness. In contrast, 19 ACS Paragon Plus Environment

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the devices fabricated with HiPCO SWNT have EOV-normalized ID values that vary little with thickness, suggesting that the device performance is limited by the magnitude of the gate-source field. This suggests that the HiPCO SWNT network contains deeper charge traps that impede charge transport.

Figure 6. a) Normalized saturation mobility as a function of dielectric thickness for different SWNT sources. b) ID plotted as a function of dielectric thickness at constant values of the gatesource overdrive field. Devices with HiPCO semiconductors had a channel length of 200 µm and channel width of 4000 µm, while devices with PD and AD semiconductors had channel lengths of 200 µm and channel widths of 400 µm in order to provide similar ID for the different semiconductor types.


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The mobility of the devices calculated using the idealized equation for ID (equation 1) are plotted in Figure 7a at different temperatures. For AD and Tuball STFTs, the mobility (µ) as a function of VGS showed increasingly non-ideal characteristics as the temperature is reduced from room temperature.101 However, the HiPCO and PD STFTs exhibit µ vs VGS curves that are highly non-ideal at all temperatures. The shape of the ID vs VGS curve can be quantified by fitting the data to the more general equation (3).

| | = − !

(3)

Where A is a factor that contains Cdiel, µ, and W/L, and the exponent γ is related to the extent of non-ideality in the charge transport caused by the presence of traps.101 Fitted transfer curves are shown in Figure S15 and Figure S16. γ for Tuball and AD STFTs is close to the ideal value of 2 at room temperature, and increases as the temperature is reduced, indicating that the charge transport in the devices becomes increasingly trap-limited as the temperature decreases from room temperature. In comparison, HiPCO SFTFs exhibit a γ value of 3.03 at 300 K that increases to 3.95 at 150 K. The observation of increasingly trap-limited behavior with increasing bandgap is consistent with expectations that SWNT sources with larger bandgaps exhibit larger tunneling barriers between SWNTs.92 This is reflected in the dependence of mobility on temperature (Figure S17); µ decreases with decreasing temperature more quickly for large bandgap semiconductors HiPCO and PD than for the small-bandgap AD and Tuball. The relative change in µ over the temperature range from 100 K to 300 K is similar to previously observed temperature dependences for dielectrics with low polarity.87 These data help to explain the dependence of device performance on dielectric thickness; HiPCO SWNTs are highly trap


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limited at room temperature, leading to a large dependence of the mobility on the charge density in the channel. These charge traps could originate from the junctions between SWNT92 or from defects in the SWNTs themselves.58, 102 Compared to PD and AD SWNT, HiPCO and Tuball both have shorter lengths (causing more junctions per percolating pathway) and more defects (as measured by the ratio of the G and D peaks in the Raman spectrum).58 However, Tuball devices exhibit a nearly ideal γ exponent, while HiPCO exhibits a highly nonideal γ exponent, indicating that the traps in the percolating network are related to the diameter of the SWNTs. In contrast to HiPCO STFTs, AD STFTs exhibit nearly ideal characteristics at room temperature, indicating that the device performance should be less dependent on the charge density in the channel and consequently less dependent on the dielectric capacitance. The IOFF increases with temperature (Figure 7c) for the small-bandgap AD and Tuball SWNT, but IOFF values for HiPCO and PD were limited by leakage and did not show systematic variation with temperature. This indicates that the on/off ratio for the AD and Tuball devices are limited by the large density of thermally generated charges at room temperature, which explains the low on/off ratio for the AD devices compared to the PD devices with similar mobilities. The data presented in Figures 5-7 provide insight into the observations about the relative performance of different SWNTs in Figure 4. The lack of doping in STFTs affects all SWNT diameters and is a large contributor to the lower mobilities compared to RTFTs. In addition, HiPCO STFTs are strongly affected by the large dielectric thickness due to highly trap-limited behavior, resulting in lower relative mobility (µstretchable/µrigid) than for PD SWNTs. For largediameter SWNTs, IOFF is limited by the small bandgap and low dielectric capacitance, as confirmed by the temperature-dependent measurements. The on/off ratios for large-diameter SWNTs are strongly affected by the gate field.103 In this work, large diameter SWNTs exhibit


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relative mobilities that are lower than for PD SWNTs. For AD SWNTs, this could be explained by the effects of contact resistance in high current devices. However, Tuball SWNTs have both lower currents and lower on/off ratios. This suggests that there may be an additional, unidentified factor that limits the mobility of very large diameter SWNTs in devices with low capacitance dielectrics.

Figure 7. a) Saturation mobility as a function of VGS for devices measured at different temperatures. The mobilities are normalized to the largest value to more effectively compare the shape of the curves. b) Exponent γ as a function of 1000/T. d) IOFF at different temperatures. HiPCO and Tuball devices had W/L of 4000/200 µm, while PD and AD devices had W/L of 400/200 µm in order to provide similar current values. The dielectric areal capacitances were 1.01 nF/cm2 for all devices.


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The transfer and output curves (Figure S18 and S19). were collected as devices were stretched to 60% strain (Figure 8a and 8b) in steps of 20%. All strains were applied parallel to the direction of charge transport through the channel of the transistor. For the measurements related to dielectric thickness variation and contact resistance characterization, the ID and device resistance were measured at a particular VOV or EOV. However, for stretching measurements, the ION is interpreted as the ID at a fixed VGS because this value is more relevant to practical applications. The ION degraded significantly during the first cycle (Figure 8c), which can be considered as a preconditioning step.23, 27 For HiPCO STFTs, the current increased at 20% and 40% strain before decreasing at 60% strain, indicating that there are competing factors that influence the strain-dependent characteristics. As the device was stretched, the dielectric became thinner, increasing the gate capacitance,20 which explains the initial increase in the current at small strains. In addition to the change in dielectric capacitance, the SWNT network becomes more resistive as the network is stretched.23, 27 The increase in current with strain was more pronounced for the HiPCO STFTs because they exhibit stronger dependence of mobility on the dielectric thickness. In contrast, AD STFTs, which were less strongly affected by dielectric thickness, exhibited monotonic degradation in ION with strain. The second cycle of strain showed increasing ION with strain (Figure 8d). However, the HiPCO STFTs showed a larger increase in ION than expected based on capacitance change alone; the normalized ION increased by 72% from 0.47 to 0.81, while the capacitance increased by 60%. This is consistent with the strong dependence of the HiPCO STFT performance on the dielectric thickness. In contrast, AD STFTs exhibited a change in ION of only 20%. These results illustrate the challenge with using electrostatic dielectrics in intrinsically stretchable transistors; the gate capacitance changes with strain. However, by using contact-limited devices, the strain-dependent changes in ION can be


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minimized, similar to the source-gated transistor concept described by Sporea et al.104 All STFTs exhibited a change in Vt with strain of less than 3 V (Figure 8e). The shift in Vt is caused by the change in EDS and channel length as the device is stretched.23 The cycling behavior of the AD STFTs show continuous degradation in ION up to 30 cycles (Figure 8f), but relatively stable Vt values (Figure 8g). Over 30 cycles, the normalized ION decreased from 0.38 to 0.28 at 0% strain. Adhesion has been found to play an important role in nanowire-based stretchable systems,20, 21, 105 and the adhesion between SEBS and SWNT is expected to be poor. Previous reports of SEBS/CNT composites have exhibited poor cycling stability because of the lack of adhesion between the CNTs and the polymer matrix.106 Consequently, improving the adhesion could be a key factor in improving the cycling performance of the devices.


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Figure 8. a) Image of an unstrained device. b) Image of a device stretched to 60% strain. c) Normalized ION with strain for the first (preconditioning) cycle. d) Normalized ION with strain for the second stretching cycle. e) Shift in threshold voltage with strain. (a,b) Are images of devices with 20 µm channel lengths and 400 µm channel widths. (c-e) is data from devices 200 µm channels. HiPCO devices had 4000 µm channel widths and PD and AD devices had 400 µm channel widths in order to produce similar currents. f,g) Normalized ION and Vt vs cycle number for devices fabricated with AD semiconductors. The W/L was 400/200 µm.

CONCLUSIONS 26 ACS Paragon Plus Environment

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All-carbon intrinsically stretchable transistors were fabricated using a sequential transfer process. An SEBS dielectric was used to minimize hysteresis and bias stress effects. As semiconductor materials, SWNTs with different bandgaps were employed. Devices had mobilities up to ~15.4 cm2/Vs with on/off ratio >103 for devices fabricated with plasma discharge SWNTs. Photolithography patterning of the source and drain electrodes enabled devices that could be operated within a 20 V gate voltage range while still achieving an on/off ratio >104, suggesting the potential for devices that could be compatible with wearable applications. Devices with large-bandgap HiPCO SWNTs as the semiconductor were limited by charge traps, which inhibit charge transport more strongly when using low-capacitance dielectrics. In contrast, high-current devices fabricated with small-bandgap AD SWNT were limited more strongly by contact resistance. Large and medium bandgap HiPCO and PD SWNTs exhibited off currents that were limited by gate leakage, while small-bandgap AD and Tuball SWNTs exhibited off currents that were limited by thermal generation of charge carriers. Consequently, although PD and AD SWNT exhibited similar mobility values, the on/off ratios were higher for PD SWNTs. PD SWNT, with a maximum diameter of ~1.5 nm, had the optimal tradeoff between mobility and on/off ratio. Devices fabricated with AD SWNT exhibited mobilities of 22.0 cm2/Vs on SiO2 dielectrics in vacuum and mobilities up to 16.2 cm2/Vs in stretchable devices, indicating that the stretchable devices approach the expected performance limitations for the sorted SWNTs used in this work. Devices with large-bandgap HiPCO SWNT exhibited more pronounced reversible strain-dependence in the electrical characteristics, while contact-limited devices had less strain dependence. Methods to improve device performance will include developing air-stable doping methods and improving the length and quality of SWNTs.


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The cycling performance of stretchable devices could be improved by increasing the adhesion between the SWNTs and the substrate.

EXPERIMENTAL SECTION

Materials: The supramolecular sorting polymer was synthesized according to a previously published procedure.63 SWNTs were procured from different sources: HiPCO SWNTs were from Unidym; plasma discharge (PD) SWNTs were product number RN 020 from Nano-integris, arc discharge (AD) SWNTs were P2-SWNT from Carbon Solutions, and Tuball SWNTs were provided by the Tuball company. Hydrogenated SEBS was supplied by Asahi Kasei elastomers (grades H1221, H1052, H1062, and H1041). Device fabrication: SWNT were sorted as described previously.58, 63 In brief, 5 mg of SWNT and 10 mg of sorting polymer were combined with 20 mL of toluene. The mixture was sonicated for 30 min at 30% power using a Cole Parmer 750 W tip sonicator in a water bath at approximately room temperature. The same sorting procedure was used for all of the four different SWNT sources. The resulting dispersion was centrifuged at 17 000 RPM for 60 minutes at 18 °C and the supernatant was retained to use as the semiconductor. SEBS substrates were prepared by dropcasting a 165 mg/mL solution in toluene onto a glass slide and evaporating the solvent in a saturated toluene atmosphere. To prepare the electrodes, unsorted (as produced) AD SWNTs were dispersed in n-methyl pyrrolidone (NMP) at a concentration of 150 µg/mL and spraycoated onto silicon wafers as previously described.23, 27 Electrodes were patterned using either copper evaporation and patterning as previously described23 or using a photolithography approach. Data for SWNT comparison (Figure 2 to 8)


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were collected using electrodes defined by evaporating Cu through a shadow mask. Data for low-voltage devices (Figure 1) were collected using devices that were prepared using photolithography to define the electrodes. The lithography approach was initiated by annealing the SWNT electrodes on Si wafers at 180 °C to dehydrate and improve adhesion. Shipley S1813 photoresist was spincoated at 1500 RPM and baked at 100 °C for 3 minutes. After exposure and development, the substrates were exposed to oxygen plasma with a chamber pressure of 200 mTorr and power of 150 W for 8 minutes to remove PR residue and remove the SWNTs from the exposed regions. After patterning, the substrates were annealed at 120 °C for 5 minutes and the photoresist was removed by sequentially soaking in clean acetone baths 3 times for 3 minutes each. The substrates were rinsed with 2-propanol and dried. Subsequently, a solution of 20 mg/mL of SEBS in toluene was spincoated at 1000 RPM for 1 minute onto the gate electrodes as an adhesion layer. The gate electrodes were then transfer printed onto the SEBS substrate. A separate Si wafer with the patterned source and drain electrodes was soaked in semiconducting SWNT solution, blown dry with nitrogen, and annealed at 110 °C for 1 minute to improve adhesion. The soaking time was optimized for each sorted solution of SWNTs, and varied between 6 minutes for concentrated HiPCO solutions to 40 minutes for more dilute AD solutions. Subsequently, a solution of 1% trifluoroacetic acid in toluene was spincoated onto the source/drain/semiconductor substrate to remove the sorting polymer followed by spincoating toluene at 2000 RPM for 30 seconds to rinse the residual trifluoroacetic acid. To form the dielectric, an SEBS solution in toluene (concentration range from 60 mg/mL to 100 mg/mL) (Figure S9) was spincoated onto a non-stick surface-modified wafer107 and transferred onto the gate electrode. Lastly, the source/drain/semiconductor on Si were transferred onto the SEBS dielectric within 5 minutes of spincoating the dielectric. The transfer printing was done with a


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pressure of ~150 kPa that was applied manually. The transparent substrate/gate/dielectric stack was manually aligned with the source and drain electrodes on a Si chip. The substrate was manually pressed against the chip while the pressure was monitored using a scale. Characterization: AFM measurements were collected using a Veeco AFM in tapping mode. Raman measurements were collected using a 632 nm laser using a Horiba XploRa+ confocal Raman microscope. Dielectric properties were measured by evaporating gold pads onto a dielectric. The capacitance was measured using an Agilent E4980A and the breakdown voltage was measured using a Keithley 4200. Dielectric thickness was measured using a Dektak surface profiler. Transistors were characterized using a Keithley 4200 probe station in ambient atmosphere and in vacuum. Strain-dependent measurements were collected using a manual stretching apparatus. SEM images were collected using a Magellan 400 XHR with an acceleration voltage of 1 kV.


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ASSOCIATED CONTENT The Supporting Information is available free of charge on the ACS Publications website at DOI: SEM images, transfer curves and output curves, and fitted data. The authors declare no competing financial interests.

AUTHOR INFORMATION Corresponding Author Prof. Zhenan Bao Shriram Center, Department of Chemical Engineering 443 Via Ortega, Room 307 Stanford, CA, 94305, USA [email protected]

ACKNOWLEDGEMENTS A.C., C.Z., J.O., and U.K. acknowledge funding from Samsung Electronics.


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