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Apr 24, 2017 - Low-Voltage 2D Material Field-Effect Transistors Enabled by Ion Gel ... Computer Science, Northwestern University, Evanston, Illinois 6...
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Low-Voltage 2D Material Field-Effect Transistors Enabled by Ion Gel Capacitive Coupling Yongsuk Choi,†,‡ Junmo Kang,†,∥ Deep Jariwala,∥ Spencer A. Wells,∥ Moon Sung Kang,∇ Tobin J. Marks,∥,⊥ Mark C. Hersam,*,∥,⊥,# and Jeong Ho Cho*,‡,§ ‡

SKKU Advanced Institute of Nanotechnology (SAINT), and §School of Chemical Engineering, Sungkyunkwan University, Suwon 440-746, Korea ∥ Department of Materials Science and Engineering, ⊥Department of Chemistry, and #Department of Electrical Engineering and Computer Science, Northwestern University, Evanston, Illinois 60208, United States ∇ Department of Chemical Engineering, Soongsil University, Seoul 156-743, Korea S Supporting Information *

ABSTRACT: Capacitive coupling between an overlying ion gel electrolyte and an underlying oxide thin film is utilized to substantially suppress the operating voltage of field-effect transistors (FETs) based on two-dimensional (2D) transition metal dichalcogenides and black phosphorus. The coupling of the layers is achieved following device fabrication by laminating an ion gel layer over an oxide-gated 2D FET through solution-casting methods. While the original pristine 2D FET requires tens of volts for gating through the oxide layer, the laminated ion gel layer reduces the operating voltage to below 4 V even when the same underlying substrate is used as the back gate electrode. Moreover, this capacitive coupling approach allows low-voltage operation without compromising the off-current level, which often occurs when ion gel electrolytes are directly employed as the gate dielectric material. This approach can likely be generalized to a wide variety of thin-film FETs as a postfabrication method for reducing operating voltages and power consumption.



INTRODUCTION The isolation of graphene from graphite has inspired extensive studies of natural and synthetic layered crystals in the atomically thin limit, which are commonly referred to as twodimensional (2D) materials.1−9 The overwhelming majority of 2D materials research aims to produce solid-state switching devices.10,11 For example, 2D semiconducting transition metal dichalcogenides (TMDCs) with carrier mobilities in the range of 10 to 100 cm2/(V s) present opportunities for digital logic applications.12−20 Likewise, black phosphorus (BP), which is the most chemically stable allotrope of phosphorus, shows promise for high-frequency electronics and optoelectronics due to its direct bandgap and even larger carrier mobility.21−29 To further enhance the electronic properties of 2D materials, various methods have been developed, including control over the number of layers,30−32 chemical doping,19,33−35 surface/ interface modification,15,22,36,37 and contact engineering.14,16,38 These approaches can increase the field-effect mobility of 2D materials in transistors with implications for high-speed computing.25,39,40 Another key issue is the minimization of power consumption in 2D material transistors, which can be addressed by using high-capacitance dielectrics, which reduce transistor operating voltages. In addition to high capacitance, © 2017 American Chemical Society

dielectric materials must concurrently possess low leakage currents to minimize power dissipation, especially in the offstate of transistor operation. Toward this end, the research community has pursued the development of high-k gate dielectrics,18,20,41 ultrathin dielectrics,15,37,42 and ion gel electrolytes that form electrical double layers (EDLs).16,43−52 In this study, we demonstrate that coupling between ion gel electrolytes and low-k oxide dielectrics can result in highly effective gating of field-effect transistors (FETs) based on 2D materials. This capacitive coupling is attained by laminating ion gel electrolytes onto fully fabricated 2D FETs that are gated through an underlying silicon dioxide layer. The laminated ion gel electrolyte layer significantly lowers the operating voltages and increases the on-current densities for a variety of 2D FETs while preserving low leakage current levels. This work provides a general strategy for reducing operating voltages and power consumption in nanomaterial-based thin-film FETs. Received: February 10, 2017 Revised: April 23, 2017 Published: April 24, 2017 4008

DOI: 10.1021/acs.chemmater.7b00573 Chem. Mater. 2017, 29, 4008−4013

Article

Chemistry of Materials



RESULTS AND DISCUSSION Ion gel electrolytes are well-known to exhibit large specific capacitances (>1 μF/cm2) due to the formation of ultrathin EDLs and, thus, have been heavily utilized for lowering the operation voltages of electronic devices.48 However, they are often plagued with high leakage currents, which are particularly problematic when voltages are applied beyond the electrochemical window of the ion gel dielectric.48 Meanwhile, typical oxide dielectrics have low specific capacitance (106, electron mobility ∼58 cm2/(V s), and subthreshold swing