NANO LETTERS
Nanoscale Gap Fabrication by Carbon Nanotube-Extracted Lithography (CEL)
2003 Vol. 3, No. 8 1029-1031
Jaehyun Chung, Kyong-Hoon Lee, and Junghoon Lee* Mechanical Engineering Department, Northwestern UniVersity, 2145 Sheridan Road, M112, EVanston, Illinois 60208-3111 Received April 22, 2003; Revised Manuscript Received June 5, 2003
ABSTRACT Carbon nanotube (CNT) -extracted lithography (CEL) was developed to create high-quality nanoscale gaps defined by the size of CNTs. An individual multiwalled CNT (MWCNT) was deposited across electrodes by the composite electric field guided assembly method (CEGA) developed previously. After blanket deposition of a metal layer, the MWCNT was removed to obtain a nanoscale gap. The CEL can provide a technique for the mass fabrication of well-defined and precisely positioned nanosized gaps in a reproducible manner.
Well-defined nanoscale gaps are essential to many nanotechnology applications including nanocomponent-based transistors (FET)1-3 and single-electron transistors (SET).4-6 For these applications, a gap width of less than 100 nm is needed for the phenomena unique to the nanoscale domain (e.g., electron tunneling). Electron beam lithography is often used to serve this purpose,6,7 and additional efforts are being made to develop alternatives.8,9 Recently, for instance, sub50-nm gaps were fabricated with dip-pen nanolithography.8 However, these processes are not suitable for batch production because of their inefficiency in creating gap patterns. Nanoimprint lithography (NIL)9 and X-ray nanolithography10 could provide various sub-50-nm patterns in a massproduction manner. Although these technologies demonstrated patterns of lines and dots, neither technology showed high-precision gap patterns.11,12 This paper presents a new techniquescarbon nanotube (CNT) -extracted lithography (CEL)sfor fabricating nanoscale gaps using a single multiwalled carbon nanotube (MWCNT) deposited by the composite electric field guided assembly (CEGA) method developed previously.13 The CEGA technique was combined with a method to create nanoditches using a CNT as a mask.14 It was demonstrated that a well-defined ∼20-nm gap could be reproducibly fabricated by extracting and reversing the pattern of a single MWCNT deposited across a pair of electrodes. The width of the gap ranges from 22 to 25 nm depending on the diameter variation of MWCNTs. This technique can be easily combined with other micromachining processes for batch production. CEGA is the technique that can guide, orient, and assemble a single MWCNT across a pair of electrodes by superim* Corresponding author. E-mail:
[email protected]. Tel: 847491-2743. Fax: 847-491-3915. 10.1021/nl0342500 CCC: $25.00 Published on Web 07/09/2003
© 2003 American Chemical Society
Figure 1. Single CNT deposited on Al electrodes on the basis of composite electric field guided assembly (CEGA).13
posed ac and dc electric fields. The dielectrophoretic force induced by the gradient of a high-frequency oscillating field attracts MWCNTs across a pair of metal electrodes. The electrophoretic force by a dc electric field provides an electric field-fluid interaction that prevents the deposition of more than one CNT across a designated pair of electrodes. Figure 1 shows a single MWCNT, ∼23 nm in diameter, deposited across a pair of electrodes 5 µm apart. Nanoscale gaps were fabricated by reversing the pattern defined by the deposited single MWCNT. Figure 2 shows the fabrication process for a nanoscale gap based on the CEGA technique. A Si wafer was thermally oxidized to grow a 5000-Å SiO2 layer followed by 500-Å-thick Al layer deposition. (Figure 2A). The Al layer was patterned to create a 5-µm-wide gap. To create the undercut under the Al electrodes, reactive ion etching (RIE) with CF4 gas was used for 30 s at 80 W (Figure 2B). Then, the CEGA method was
Figure 2. Nanoscale gap fabrication. (A) Thermal oxidation and Al deposition; (B) Al patterning, RIE, and undercut formation; (C) CNT deposition; (C′) 3-D view; (D) Cr deposition, Al etching, and sonication; (D′) top view.
used to deposit a MWCNT grown by the arc-discharge method across the Al electrodes.10 Figure 2C and its 3-D view (C′) schematically show a single CNT assembled with a tuned deposition condition. For instance, to achieve the single MWCNT deposition in Figure 1, a superimposed electric field consisting of an ac electric field (0.4738 Vrms/
µm at 5 MHz) and a dc field (0.2674 V/µm) was used. Then, the Cr layer (150 Å) was deposited atop by evaporation, and an Al etchant (Transene Co. Inc, Danvers, MA) was used at 50 °C to remove the exposed Al electrodes. Finally, the MWCNT was detached by a sonication in DI water for a few seconds (Figure 2D and its top view (D′)). Nanoscale gaps created by the “extracted” CNT were between 22 and 25 nm depending on the diameter of the MWCNTs. The deposition conditions and parameters were fine-tuned to obtain high-quality gaps reproducibly. Under the previous deposition conditions for CEGA, the yield of successful single CNT deposition was over 90%.13 However, in the current case, we observed a 25% yield in 12 depositions. Two MWCNTs were deposited in 50% of the gaps, and none were deposited in 25%. Unlike the previous cases without any undercut etching involved, it was observed that the Al layer deposited on SiO2 was curled up when the SiO2 substrate was etched with RIE for 30 s (Figure 3A). We speculate that the low yield was due to the distortion of the electric field caused by the curling of the electrodes during the RIE process. Also, when the Cr layer (150 Å thick) was deposited atop and gaps were created, a few broken CNTs were not removed, and Cr debris was found on them. Figure 3B shows the Cr layer deposited on the specimen in Figure 3A. Figure 3C shows an image of a 23-nm-wide gap created after the removal of CNTs. Some of the Cr layer was left along the straight gap after Al etching and sonication. It is believed that the Cr layer was too thick and covered some portion of the CNT that was not easily removed.
Figure 3. (A) Two MWCNTs deposited on Al electrodes, (B) the reversed pattern, and (C) the fabricated nanoscale gap with Cr debris. 1030
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Figure 4. Nanoscale gap (23 nm wide). (A) Cr layer (8 nm thick) and (B) its magnified view.
The deposition and etching conditions were modified according to the above observations. First, the RIE time for SiO2 was reduced to 20 s for less curling up of the electrodes, and the yield was improved to ∼90%. The Cr layer thickness was also decreased to 80 Å, resulting in the complete removal of the CNTs during sonication. Figure 4A shows the created nanoscale gap, with its magnified view shown in Figure 4B. It is clearly seen that the gap has a very well defined, straight pattern. The clean separation of the gap was also verified by the resistance measurement (infinity) between the two electrodes. Nanoscale gaps that were 5 µm long and ∼23 nm wide were reproducibly created in this way. The width of the fabricated gaps varied between 22 and 25 nm. Considering the fact that the diameter varies by 1 to 2 nm for the MWCNTs in the same process chamber used in the arc-discharge method, we believe that the gap size can be controlled within a similar variation. By controlling the growth parameters, the diameter of MWCNTs can be selectively chosen, ranging from 10 to 100 nm with little variation. Accordingly, the gap size will be selected in the desired size range. The lateral length of the gap can be further reduced (e.g., to a nanoscale range) by decreasing the initial gap size between the pair of Al electrodes used for CNT deposition. It has been shown that SWCNTs were deposited across a nanoscale gap,13,15 and we believe that the same mechanism will work when depositing the MWCNTs across a nanoscale gap. The thickness of the Cr layer being less than 10 nm can be a problem for electrical applications because of nonuniform deposition. To investigate this problem, the sheet resistance of the Cr layer was measured by four-point probes. The measured sheet resistance was 320 Ω/0 when the deposited Cr layer was 8 nm thick. This value corresponds to 3.2 kΩ for an electrode that is 10 µm wide and 100 µm long. The theoretical sheet resistance of this Cr layer is 16Ω/0, and the discrepancy was caused by the Cr layer that formed in islands rather than in a uniform layer (Figure 4B). This thin Cr layer, however, can still be useful for many applications because the electrical resistance is usually very large in nanocomponents to be deposited in the gap. For Nano Lett., Vol. 3, No. 8, 2003
example, the resistance of organic material was greater than a few hundred kΩ,3 and that of CNT bundles deposited on the Cr layer was a few MΩ.13 The CEL process was used to create nanoscale gaps with conventional microlithography processes combined with CEGA. It is therefore straightforward and simple to integrate the nanoscale features directly with other MEMS and nanotechnology approaches. Compared with conventional nanoscale fabrication methods such as electron beam lithography, the suggested approach could be performed mostly through microlithography, thus providing more processing freedom and feasibility for batch production. Various configurations for device applications and fundamental experiments based on the proposed method are underway. Acknowledgment. We appreciate Professor Rodney S. Ruoff at Northwestern University for kindly providing the MWCNT source. References (1) Martel, R.; Schmidt, T.; Shea, H. R.; Hertel, T.; Avouris, P. Appl. Phys. Lett. 1998, 73, 2447. (2) McEuen, P. L.; Fuhrer, M. S.; Park, H. IEEE Trans. Nanotech. 2002, 1, 78. (3) Zaumseil, J.; Someya, T.; Bao, Z.; Loo, Y.; Cirelli, R.; Rogers, J. A. Appl. Phys. Lett. 2003, 82, 793. (4) Feldheim, D. L.; Keating, C. D. Chem. Soc. ReV. 1998, 27, 1. (5) Stone, N. J.; Ahmed, H. Appl. Phys. Lett. 2000, 77, 744. (6) Pashkin, Y. A.; Nakamura, Y.; Tsai, J. S. Appl. Phys. Lett. 2000, 76, 2256. (7) Bezryadin, A.; Dekker, C. Appl. Phys. Lett. 1997, 71, 1273. (8) Zhang, H.; Chung, S.; Mirkin, C. A. Nano Lett. 2003, 3, 43. (9) Austin, M.; Chou, S. Y. J. Vac. Sci. Technol., B 2002, 20, 665. (10) Simon, G.; Haghiri-Gosnet, A. M.; Bourneix, J.; Decanini, D.; Chen, Y.; Rousseaux, F.; Launois, H. J. Vac. Sci. Technol., B 1997, 15, 2489. (11) Chou, S. Y.; Krauss, P. R.; Zhang, W.; Guo, L.; Zhuang, L. J. Vac. Sci. Technol., B 1997, 15, 2897. (12) Chen, Y.; Kupka, R. K.; Rousseaux, F.; Carcenac, F.; Decanini, D.; Ravet, M. F.; Launois, H. J. Vac. Sci. Technol., B 1994, 12, 3959. (13) Chung, J.; Lee, J. Sens. Actuators, A 2003, 104, 229. (14) Xu, T.; Metzger, R. M. Nano Lett. 2003, 2, 1061. (15) Krupke, R.; Hennrich, F.; Weber, H. B.; Beckmann, D.; Hampe, O.; Malik, S.; Kappes, M. M.; Lohneysen, H. V. Appl. Phys. A 2003, 76, 397. (16) Trau, M.; Saville, D. A.; Aksay, I. A. Science 1996, 272, 706.
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