Paper-Based Inkjet-Printed Flexible Electronic Circuits | ACS Applied

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Paper-Based Inkjet-Printed Flexible Electronic Circuits Yan Wang,† Hong Guo,† Jin-ju Chen,*,† Enrico Sowade,‡ Yu Wang,† Kun Liang,*,§ Kyle Marcus,§ Reinhard R. Baumann,‡ and Zhe-sheng Feng*,† †

State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu, 610054, P. R. China ‡ Digital Printing and Imaging Technology, Technische Universität Chemnitz, Chemnitz, 09126, Germany § Nanoscience Technology Center, University of Central Florida, Orlando, Florida 32826, United States S Supporting Information *

ABSTRACT: Printed flexible electronics have been widely studied for their potential use in various applications. In this paper, a simple, low-cost method of fabricating flexible electronic circuits with high conductivity of 4.0 × 107 S·m−1 (about 70% of the conductivity of bulk copper) is demonstrated. Teslin paper substrate is treated with stannous chloride (SnCl2) colloidal solution to reduce the high ink absorption rate, and then the catalyst ink is inkjet-printed on its surface, followed by electroless deposition of copper at low temperature. In spite of the decrease in conductance to some extent, electronic circuits fabricated by this method can maintain function even under various folding angles or after repeated folding. This developed technology has great potential in a variety of applications, such as three-dimensional devices and disposable RFID tags. KEYWORDS: paper-based, inkjet printing, electroless deposition, copper, flexible electronics

1. INTRODUCTION Recent attention has focused on printed flexible electronics and devices due to their simple and low cost of manufacturing. Moreover, good performance can be obtained with flexible printed electronics. Technologies based on polymers,1−3 nanoparticles,4−8 thin-film semiconductors, 9,10 and graphene11−14 have all contributed to the fabrication of flexible electronics. This has generated various new applications, such as photovoltaic cells,15,16 flexible displays,17 organic lightemitting diodes (OLED),18 organic transistors,19 energy storage devices,20,21 sensors,22−25 and radio frequency identification tags.26−28 For developing a promising flexible substrate, paper is especially ideal. Paper is not only widely available, inexpensive, and well-established in printing and packing industry but also biodegradable, free of contamination, and lightweight and can be folded into three-dimensional configurations.29,30 Meanwhile, enormous efforts have been made to find highly conductive electrodes fabricated by inkjet printing.31−38 Inkjet printing technology, which is employed extensively as a flexible low cost tool to explore various applications of printed electronics, has been widely studied. Most of the research efforts are focused on the direct printing of metal nanoparticles mixed with organic compounds. Then, the printed patterns will be dried and sintered to remove the nonconductive organic compounds and initiate a merging of nanoparticales by neck formation to make the deposited films conductive. The conductivity of these initial composite inks is heavily dependent © XXXX American Chemical Society

on the ratio of metal nanoparticles and the bonding mechanism after solidification. However, there is an inherent problem with this procedure: The ratio of metal nanoparticles in solution for inkjet printing is generally quite low and the sintering processes performed at lower temperatures usually result in a metal film of low volumetric mass density due to a high amount of pores, which consequently leads to a high resistance of the printed patterns. Clogging is always a common issue for micrometer size nozzles due to the accumulation of nanoparticles at the nozzle opening. In addition, most nanoparticle inks need to be sintered with material-selective methods, such as thermal processing,31 microwave,32 plasma,33 laser,34 or intense pulsed light sintering.35 These sintering methods can limit the use of paper substrates. Zhang et al.36 and Cook et al.37 have realized these problems and replaced nanoparticle inks with catalyst inks combined with metal electroless deposition (ELD) to remove obstacles like nozzle clogging and sintering. However, these researchers did not modify the paper surface efficiently to prevent the dilute ink from penetrating into paper substrates, potentially altering the conductivity of the metal layer. In this communication, a simple and convenient method based on inkjet printing of silver-based catalyst ink, which is cheaper than Pd-based ink,38 followed by ELD of copper is demonstrated to obtain very high conductivities. We modified Received: June 5, 2016 Accepted: September 1, 2016

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DOI: 10.1021/acsami.6b06704 ACS Appl. Mater. Interfaces XXXX, XXX, XXX−XXX

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ACS Applied Materials & Interfaces the paper substrate with a surface treatment to form a gel film on the paper to prevent ink penetration for the high porosity of paper so that more ink could stay on the surface of paper. Figure 1 shows the general scheme of the entire process with

deionized water in the ratio 1:24 by volume. Stirring is maintained for 10 min until a colorless and clear colloidal solution is obtained. 2.3. Preparation of Silver-Based Catalyst Ink. An alcohol− water solution with a viscosity of 10 centipoise (cp) is achieved by mixing deionized water, ethyl alcohol, ethylene glycol, n-propanol, and glycerol in the ratio 14:8:7:8:16 by volume at room temperature. 0.2 mol/L silver nitrate is then added, followed by mixing for 3 min until a colorless and clear aqueous solution catalyst ink is obtained. The optimization study of silver-salt concentration in ink solution is shown in Figure S1 in Supporting Information. 2.4. Inkjet Printing of Catalyst Ink. The catalyst ink is printed using a commercially available flatbed color printer (A3-KGT-3290) equipped with a print head that has 8 rows of orifices, with each row featuring 180 orifices measuring approximately 14.2 μm in diameter. The catalyst ink is loaded into a cartridge of the printer and printed on the paper substrate of just a single layer. After that the sample is dried in air for 5 min. The nominal volume of each drop deposited from the cartridge is 1.5 pL (more manufacture details of the printer are shown in Table S1 in Supporting Information). 2.5. ELD of Copper. The ELD process is conducted to apply copper onto the printed patterns. Paper with printed patterns is immersed into a plating bath with freshly prepared electroless copper solution at 42 °C. The solution comprises 10 g·L−1 CuSO4·5H2O, 24 g·L−1 C4H4KNaO6·4H2O, 5 g·L−1 C10H16N2Na2O8, and 10 g·L−1 NaOH, which are added to deionized water in sequence. Additionally, 12 mL·L−1 of HCHO is added last to the solution as a reducing agent. The deposition time is controlled to 10 min, 20 min, 30 min, 40 min, 50 min, and 60 min for printed patterns with the same settings to allow for variable amounts of copper deposition. Deposited copper patterns are then immersed into deionized water for 2 min and dried in airflow at room temperature for 10 min. 2.6. Characterization. The comparison of ink penetration depth is observed using a VMD-P300B metallurgical microscope. For studying the surface of the electroless deposited copper patterns on papers with surface treatment and without any pretreatment, a JEOL JSM-6490LV field emission scanning electron microscope (SEM) and energy dispersive X-ray spectroscopy (EDS) are used to obtain the image of the patterns and make elemental composition analysis, respectively. The SEM is also used to observe cross sections of the copper film and creases on the copper strips. The conductivity of the copper layer is measured by Four Dimensions automatic four-point probe-280SI.

Figure 1. General scheme for fabricating flexible electronic circuits on paper substrates via inkjet printing combined with ELD.

three steps: surface treatment, inkjet printing of catalyst ink, and ELD of copper. The entire experiment workflow is carried out in standard laboratory conditions at low temperature. There is no need for any extreme conditions and sophisticated machinery for sintering. Moreover, the conductivity of the copper patterns we made could reach 4.0 × 107 S·m−1 (corresponds to approximately 70% of the conductivity of bulk copper).

2. EXPERIMENTAL SECTION 2.1. Materials. The substrate used for printing is Teslin paper (PPG Industry, USA), treated with stannous chloride (SnCl2) colloidal solution. Stannous chloride (SnCl2) colloidal solution is prepared with stannous chloride (SnCl2) and concentrated hydrochloric acid (HCl). Silver nitrate (AgNO3), ethyl alcohol (C2H6O), ethylene glycol ((CH2OH)2), n-propanol (C3H7OH), and glycerol (C3H8O3) are used for ink preparation. Chemicals used for the ELD process are copper(II) sulfate pentahydrate (CuSO4·5H2O), potassium sodium tartrate (C 4 H 4 KNaO 6 ·4H 2 O), sodium hydroxide (NaOH), ethylenediaminetetraacetic acid disodium salt (C10H16N2Na2O8), and formaldehyde (HCHO). Teslin paper gets variable thickness specifications from 152 to 356 μm, and the 356 μm is used in our experiments. Deionized water is used in all of the experiments, and all reagents are of analytical grade. 2.2. Preparation of Stannous Chloride (SnCl2) Colloidal Solution. A homogeneous stannous chloride (SnCl2) colloidal solution is prepared as follows. SnCl2 in the amount of 1 mg is added to 4 mL of concentrated hydrochloric acid (HCl), and the mixture is stirred for 5 min. Then the turbid liquid is mixed with

3. RESULTS AND DISCUSSION 3.1. Patterning Copper on Paper Substrate. For the ELD process, paper substrates need to be immersed in water solution. However, most papers are perishable once exposed to water. To overcome the issue, Teslin paper is selected for its resistance to deformation after immergence in water. High paper porosity results in a high ink absorption rate leaving a small amount of dilute active catalyst ink on the paper substrate surface. This potentially causes printed patterns in an ELD bath to deposit copper slowly and discontinuously. To solve this problem, a surface treatment of the Teslin paper with SnCl2 colloidal solution was performed prior to the inkjet printing process. Sn is a halogen element, and its metallicity is the

Figure 2. (a) Optical image of ink penetration on surface-treated paper. (b) Optical image of ink penetration on paper without any pretreatment. B


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Figure 3. (a) SEM image of the electroless deposited copper on surface-treated paper. Insert: Optical image of copper square (size, 10 mm × 10 mm) on surface-treated paper. (b) EDS of the electroless deposited copper on surface-treated paper. (c) SEM image of the electroless deposited copper on unprocessed paper. Insert: Optical image of copper square on unprocessed paper. (d) EDS of the electroless deposited copper on unprocessed paper.

analysis shows the film comprising 100% copper (Figure 3b). For deposition on not treated paper, the copper plating stops at a certain level that results in a discontinuous layer (Figure 3c). Moreover, the corresponding EDS analysis catches the peak of Si (contained in Teslin paper substrate) and Ag (contained in catalyst ink) (Figure 3d). The half-stopping deposition is caused by the decrease of catalyst ink on the paper substrate surface for high ink absorption rate. Too little silver ions remain on the paper surface for continuous copper deposition on the printed patterns. The results of Figure 2 and Figure 3 indicate that an easy pretreatment with SnCl2 colloidal solution can effectively prevent the deep penetration of ink and improve the deposition result. 3.2. Conductivity of Copper Layer and Deformation of Paper Substrate versus Electroless Deposition Time. Square resistance of copper test strips (length × width = 40 mm × 1 mm) on paper substrates is measured at different electroless deposition times using a four-point probe (Figure 4). It is found that square resistance values of these test strips decrease with increasing deposition time. Before 30 min, square resistance of test strips decreases rapidly over time. While the deposition time increases further, the effect on the square resistance of the test strips is reduced. On the other hand, the paper substrates bearing the test strips show different degrees of deformation with an increase in deposition time. The deformation begins to be obvious when deposition time exceeds 40 min as the optical images show. This result can be explained by the fact that the copper layer thickness grows with increassed deposition time, and the membrane stress grows with an increase of layer thickness. If the membrane stress becomes strong enough, it will cause deformation of the paper substrate. Considering the relationship of square resistance, substrate deformation, and deposition time, the most suitable deposition time should be about 30 min. The SEM image of the

strongest among the halogen elements. There is no possibility that Sn2+ is reduced to elemental Sn during the paper processing, and there is no need to worry about any effects the pretreatment can give to the conductivity of the paper. The optimization study of the SnCl2 colloidal solution is shown in Supporting Information (Figure S2). Figure 2 shows the comparison optical images of ink penetration in paper with surface treatment and without any pretreatment. As we can see, ink on the paper with surface treatment penetrates only about 100 μm into the paper material (Figure 2a). For paper without pretreatment, much higher penetration depth of ink into the paper substrate is observed (Figure 2b). This observation could be caused by the hydrolysis reaction of SnCl2 in acid solution. As Figure S3 shows, the untreated paper has a scalelike surface with many gaps (Figure S3a). On the contrary, a gel film forms on the surface-treated paper and covers most of the gaps (Figure S3b). Sn(OH)Cl, Sn(OH) 2 , and Sn 2 (OH)3 Cl generated by the hydrolysis of SnCl2 (shown in eq S1 in Supporting Information) are slightly soluble in water, which could adsorb on the surface of paper and form a gel film. This is unfavorable for the catalyst ink to penetrate into the paper. In addition, the contact angle of the ink solution on the paper is shown in Figure S4, and it shows that the contact angle on surface-treated paper is significantly larger than that on untreated paper. It can be inferred that the ink permeation was retarded on surface-treated paper, and more catalyst ink was aggregated on the paper surface. Figure 3 shows the deposition results of patterns printed on surface-treated paper (Figure 3a,b) and not treated paper (Figure 3c,d). Patterns used for testing are 10 mm × 10 mm squares that are exposed to the plating bath for 30 min. As the SEM and optical images show, the deposited copper on paper with surface treatment forms one dense, smooth, continuous, and bright metal layer (Figure 3a). The corresponding EDS C


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conductivity value can be obtained using this technology. In addition, the feature size of the patterns fabricated by this technology can reach up to about 95 μm (shown in Figure S5 in Supporting Information). That reveals a well aligned high resolution copper wire, and a higher precision can be achieved by using a very small-size nozzle and adjusting the surface tension of the ink. The ability to fabricate such highly conductive patterns without high-heat treatment is of great importance for the printed electronics community aiming to manufacture flexible electronic applications. There is no further need for cost-intensive alternative sintering methods in the manufacturing process chain which is considered an important step toward process cost and process complexity reduction. 3.3. Mechanical/Electrical Fatigue Test of Copper Strips. To investigate the mechanical/electrical fatigue of the printed patterns, we characterized the linear array conductance of four copper test strips spaced 3 mm apart prepared by ELD as a function of the angles at which the papers are folded. The schematic image in Figure 5a describes the copper test strips are folded to −180°, −90° (negative angles indicate folding of the copper strips inside) and 90°, 180° (positive angels indicate folding of the copper strips outside). Corresponding SEM

Figure 4. Square resistance values of copper test strips versus electroless copper deposition time. Insert: SEM cross section of copper film (deposited 30 min) and optical images of copper test strips (size, 40 mm × 1 mm) of different electroless deposition time (10 min, 20 min, 30 min, 40 min, 50 min, 60 min from left to right). Error bars indicate the standard deviation.

deposited copper layer after ELD for 30 min shows 1.1 μm thick layer of copper. This results in a conductivity of 4.0 × 107 S·m−1, indicating approximately 70% of the bulk copper

Figure 5. Folding test of paper-based electronic circuits. (a) Schematic of copper test strips patterned on paper and folded to various angles (copper test strips: length × width × height = 40 mm × 1 mm × 0.0011 mm). (b) SEM images of copper test strips on paper after 5 times folding corresponding to −180°, −90°, 0°, 90°, and 180°. (c) Relative conductance (the ratio of measured conductivity (Gmeas) to the initial conductivity (G0)) of copper test strips on paper versus the folding angle (electroless copper deposition time is 30 min; number of foldings is 5). (d) Variation of the relative conductance of the copper test strips with different electroless deposition time while folding at −180°. (e) Variation of the relative conductance of the copper test strips with different electroless deposition time while folding at 180°. Error bars in all figures indicate the standard deviation. D


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Figure 6. (a) Pattern cutting paper lantern circuits. (b) Clipping of unfolded paper lantern circuits with LEDs. (c) Folded paper lantern circuit with working LED chips. (d) Flat paper-based LED SMD (surface mount device). (e) Working paper-based LED SMD in the shape of red ribbon symbol. (f) Optical image of disposable paper-based RFID tag. (g) Burning of paper-based RFID tag. (h) Remaining ashes after the RFID tag is burned.

images show the fractures of copper strips after five cycles of folding (Figure 5b). It can be seen that these fractures are caused by a deformation mismatch between the paper substrate and obtained copper layer. Moreover, it is a worthy concern that the most prominent creases in the copper layer are aligned with the traces of greatest internal paper damage. These traces are found in the regions of paper that are subjected to the maximum tensile strain.29 The ratio of measured conductance (Gmeas) to initial conductance (G0) is obtained after five cycles of folding under various folding angles (Figure 5c). It shows a decrease in conductance of test strips in proportion to folding angels: the conductance decreases by 10% and 4% under −180° and −90° folding angles and by 57% and 25% under 180° and 90° folding angles, respectively. The decrease in conductance of test strips with a negative folding angle is considerably smaller than those with a positive folding angle. From comparison of Figure 5d and Figure 5e, a similar tendency can also be found that conductance of test strips folded to 180° decreases more rapidly than that of test strips folded to −180°. This could be explained by the difference of mismatch between the copper layer and its substrate under negative folding angles and those under positive folding angles. Under a negative folding angle, the copper strips are folded inside the paper substrate and the curvature radius of the copper strips is smaller than that of the

paper substrate. This causes the copper strips to compress at the point of the fold. The compression produces several tiny creases and fractures in the copper strips that are spread out over a larger area. These cracks do not span the entire copper strip width; thus electricity can get through around their edges. On the other hand, in the case of the copper strips folded to positive angles, the curvature radius of the copper strips is larger than that of the paper substrate. This results in stretching of the copper strips at the point of the fold. The stretching of the copper strips creates one or two big cracks in the copper strips, and patterns of these cracks increase in size with each fold. The large cracks in the copper strips interrupt the electronic path to some extent, which decreases conductance of the copper strips.12 In order to examine the influence of the thickness of copper layer on conductance after folding, the relative conductivity of copper strips under different electroless deposition time is also measured as shown in Figure 5d (folded to −180°) and Figure 5e (folded to 180°). Due to obvious deformation of samples that undergo deposition for 40 min or longer, only specimens with 10 min, 20 min, and 30 min deposition times are tested. Both Figure 5b and Figure 5e show that relative conductivity of copper strips with longer deposition time is, on average, higher than those with a shorter deposition time after several iterations. It is believed that this observation is caused by the E


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to be a feasible approach that could be implemented for broad potential applications that welcome low-cost, flexibility, and disposability.

difference in the extent of damage. On the contrary, under short deposition time, the thin copper layers are easily broken off completely, which destroys the electronic path in the copper strips.39 As a result, the conductance of the copper strips decreases rapidly. Copper strips with longer deposition times are not as easy to break due to the thicker copper layer. Therefore, the conductance decreases more gently. On the basis of all the results above, in spite of fewer fractures, the bigger fractures in the strips led to a larger decrease in electrical activity, which implies that the fracture size (length, width, and thickness) significantly influences the decrease in conductance of copper strips. We have also carried out a bending test of paper-based electronic circuits (as shown in Figure S6 in Supporting Information). As we can see, the linear track patterns can still maintain function after 3000 cycles of bending. On the basis of the aforementioned discussion, it can be concluded that the flexibility and resistivity of the paper-based electronic circuits could satisfy the basic requirements of flexible electronics. 3.4. Applications. A series of experiments was carried out in order to demonstrate potential applications of the developed technique. For the properties of paper substrates, paper-based circuits can be easily trimmed by a pair of scissors and folded into complex three-dimensional shapes (Figure 6a−e). To evaluate the effectiveness of folded circuits, prototypes of a paper lantern (Figure 6a−c) and a LED SMD (surface mount device) formed to the shape of the famous red ribbon symbol which is used to show solidarity for people living with HIV/ AIDS (Figure 6d,e) are designed. The LED chips operate well in the paper lantern circuit (Figure 6c), which demonstrates that circuits on paper can stay functional while folded inside. The LED SMD also works fine in the shape of the red ribbon symbol (Figure 6e), which reveals that circuits on paper can still function properly under positive folding angels. All the LED chips are bonded using a conductive adhesive. The two prototypes illustrate that the foldable circuits can provide a stable conductor for potential applications on some other threedimensional devices. In addition, disposable RFID tags can also be fabricated using this technology (Figure 6f). When the tag is abandoned, it becomes electronic waste. To dispose of this material, a simple burning process is required (Figure 6g), and only some nontoxic inorganic salt ashes are left after burning (Figure 6h).

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ASSOCIATED CONTENT

S Supporting Information *

The Supporting Information is available free of charge on the ACS Publications website at DOI: 10.1021/acsami.6b06704. Table of manufacture details of the printer (A3-KGT3290); equation of SnCl2 hydrolysis; optimization study of silver nitrate concentration in ink solution; optimization study of stannous chloride concentration; SEM images of paper substrate before and after surface treatment; contact angle of ink solution on paper substrate before and after surface treatment; optical image of the minimum line width; bending test of paperbased electronic circuits (PDF)

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AUTHOR INFORMATION

Corresponding Authors

*J.-j.C.: e-mail, [email protected]. *K.L.: e-mail, [email protected]. *Z.-s.F.: e-mail, [email protected]. Notes

The authors declare no competing financial interest.

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ACKNOWLEDGMENTS This work was supported by the National Natural Science Foundation of China (Grants 61471106 and 61271040) and the Teachers’ Scientific Research Foundation for UESTC (Grant ZYGX2015KYQD059).

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REFERENCES

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4. CONCLUSION In summary, we have successfully developed a convenient and low-cost method of inkjet printing combined with ELD of copper to fabricate flexible electronic circuits on paper substrates. A homogeneous stannous chloride (SnCl2) colloidal solution is prepared to pretreat the paper substrate to solve the problem of high ink absorption due to the highly porous characteristics of the paper. Without hash environments and sophisticated equipment, this method enables us to create dense, smooth, continuous copper layers with enhanced conductivity of approximately 70% of bulk copper within 30 min. By taking the advantages of the paper substrate, the electronic circuits can stay functional while under various folding angles and repeatedly folding in spite of the decrease of conductance to some extent. Additionally, as demonstrated above, this method can be used for fabricating threedimensional devices. It can also be an appropriate approach for manufacturing disposable devices for electronic circuits patterned on burnable papers. It therefore could be envisioned F


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Paper-Based Inkjet-Printed Flexible Electronic Circuits | ACS Applied

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