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Supporting Information for Publication
Architecture of CuS/PbS Heterojunctions Semiconductor Nanowires Arrays for Electrical Switch and Diode Xuemin Qian 1, Huibiao Liu 1, Nan Chen 1, Haiqing
Zhou 2, Lianfeng Sun 2,
Yongjun Li 1，Yuliang Li 1*
Content Supporting figures 1. Figure S1. SEM image of CuS/PbS nanowires and the element surface scanning patterns. 2. Figure S2. Three of single CuS/PbS nanowire based devices. 3. Figure S3. The I-V properties of CuS and PbS nanowire arrays.
Supporting figures
Figure S1 (a)The SEM image of CuS/PbS nanowire arrays ; The element surface scanning patterns (b) Cu element, (c)Pb element.
Figure S2. Three of single CuS/PbS PN heterojunction nanowire based devices.
Figure S3. (a) and (b) The current-voltage plots of CuS nanowires under low and high bias voltage. (c) and (d) The current-voltage plots of PbS nanowires under low and high bias voltage.
