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Letter
Plastic Microgroove Solar Cells Using CuInSe2 Nanocrystals Douglas R. Pernik, Marlene Gutierrez, Cherrelle Thomas, Vikas Reddy Voggu, Yixuan Yu, Joel Van Embden, Alexander J Topping, Jacek Jasieniak, David A. Vanden Bout, Raymond Lewandowski, and Brian A. Korgel ACS Energy Lett., Just Accepted Manuscript • DOI: 10.1021/acsenergylett.6b00470 • Publication Date (Web): 17 Oct 2016 Downloaded from http://pubs.acs.org on October 18, 2016
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ACS Energy Letters
Plastic Microgroove Solar Cells Using CuInSe2 Nanocrystals
Douglas R. Pernik1,2, Marlene Gutierrez2,3, Cherrelle Thomas1,2, Vikas Reddy Voggu1,2, Yixuan Yu1,2, Joel van Embden4,5, Alexander J. Topping6, Jacek Jasieniak4, David A. Vanden Bout2,3, Raymond Lewandowski6, Brian A. Korgel1,2*
1. Department of Chemical Engineering, The University of Texas at Austin, Austin TX 78712 USA 2. Texas Materials Institute, The University of Texas at Austin, Austin TX 78712 USA 3. Department of Chemistry, The University of Texas at Austin, Austin TX 78712 USA 4. Manufacturing Flagship, CSIRO, Bayview Avenue, Clayton, Victoria, 3168, Australia 5. School of Science, RMIT University, Melbourne, Victoria, 3001, Australia. 6. Big Solar Limited, Washington Business Centre, Sunderland, United Kingdom *Corresponding author:
[email protected].
Abstract Plastic photovoltaic devices (PVs) were fabricated by spray-depositing copper indium diselenide (CuInSe2) nanocrystals into micrometer-scale groove features patterned into polyethylene terephthalate (PET) substrates. Each groove has sidewall coatings of Al/CdS and Au and performs as an individual solar cell. These PV groove features can be linked electrically in series to achieve high voltages. For example, cascades of up to fifteen grooves have been made with open circuit voltages of up to 5.8 V. Based on the groove geometry, the power conversion
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efficiencies (PCE) of the devices reached as high as 2.2%.
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Using the active area and
photovoltaic response of devices determined from light beam induced current (LBIC) and photoreflectivity measurements gave PCE values as high as 4.4%.
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The commercial development of photovoltaic devices (PVs) has largely focused on rigid designs built on glass. The durability of these structures makes them well-suited for deployment on empty land and rooftops; however, they have significant fixed costs associated with their manufacture, transport, and installation, which impacts the electricity price paid by the end user. Flexible solar cells on polymer or thin metal foil substrates offer advantages in weight, speed of manufacture, and deployability. Additionally, the low weight of such panels provides portability, as needed for many desired applications of PVs. To date, the design of plastic solar cells has largely mimicked conventional solar cell designs on glass.1,2 These consist of a semiconductor light-absorbing material sandwiched between two electrically conductive electrode layers.3 Device layers are deposited sequentially onto a supporting substrate and the deposition of conditions of each subsequent layer must be compatible with the underlying layers in the stack. This leads to significant processing constraints on materials selection. Here, we present a PV construction that can alleviate some of these constraints. The PV devices described here are fabricated within microgroove features patterned in an acrylate film on a polyethylene terephthalate (PET) substrate. One sidewall of each groove is coated with a bilayer of Al and CdS and the other sidewall is coated with a film of Au. These groove features are then filled with CuInSe2 nanocrystals by spray-coating. The CuInSe2|CdS heterojunction and the asymmetric work functions of the Al and Au contacts induce charge separation under illumination. This device geometry alleviates the need to sequentially deposit the bottom contact, semiconductor layers and then the top contact. This device configuration also alleviates the need for light to penetrate a transparent conducting top contact to reach the semiconductor absorber layer. Metal grid lines—which can block some incident light—do not need to be patterned on
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the top of the solar cells to collect the current. This design shares some aspects of the all-backcontact (ABC) solar cell design developed in the 1970’s4,5 in which all of the electrical contacts are positioned on one side of the cell away from the path of incident light. The ABC design has been used commercially to make high efficiency monocrystalline silicon (Si) solar cells,6,7 and recently to make solar cells with ultrathin (10 m) layers of Si,8 solar cells with organic nanowires stretched across interdigitated back contacts,9 Si-based photovoltaics designed to power subcutaneous implantable devices,10 and perovskite solar cells using quasi-interdigitated electrodes.11 By removing the transparent conductive oxide (TCO) layer, the grooved PV design eliminates several processing headaches, as well as significant cost.
The TCO layer can
contribute as much as 20% of the materials and manufacturing cost of copper indium gallium selenide (CIGS) solar cells for example. Using groove wall contacts also opens up a host of possible electrical contact materials. Contact materials in the groove PV design can be chosen based on their conductivity and work function without consideration of the optical transparency of the material. Furthermore, the substrate provides an easy-to-use template in which the absorber layer deposition represents that final processing step and the roughness of the absorber layer is not critically important to solar cell function. In a standard sandwich architecture, it is critical to have a smooth absorber layer,12 as absorber layer non-uniformities in a standard architecture solar cell generate shunt paths related to non-uniform electric fields and pinholes. These problems do not exist in the groove PV cell because the distance between the electrical contacts is fixed by the groove width. The active semiconductor layer in the plastic microgroove PVs is composed of CuInSe2 nanocrystals.
These nanocrystals are ink-processed and spray-deposited under ambient
conditions into the grooves. Semiconductor nanocrystal inks provide a convenient materials
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system to combine with the groove architecture to process the solar cells. There is no need for high temperature processing. The past decade has seen significant development of solutionprocessable inorganic semiconductor absorber layers for solar cells.13-19 PVs have been made with solution-dispersible nanocrystals by spray-coating20 or spin-coating.14–17,21 CuInSe2 nanocrystals can be deposited under ambient conditions, which allows a variety of low-cost flexible materials to be used as the device substrate.22,23 Ligand exchange of nanocrystals in the solution phase and/or solid state after nanocrystal deposition can further increase nanocrystal PV device efficiency.24-26 Flexible solar cells or solar cells using roll-to-roll-amenable processes have also been developed using organic molecules27 and perovskites28-31 as the light absorbing material. By patterning substrates with multiple aligned grooves, devices can be electrically connected in series to boost the output voltage of the devices. Figure 1 shows a conventional materials stack for a copper indium gallium selenide (CIGS) PV device compared to the microgroove PV device. The current-voltage characteristics of microgroove devices with three, ten, and fifteen groove features connected in series are presented and these devices are studied using light beam induced current (LBIC) measurements.
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Figure 1. (A) A conventional materials stack in a CIGS solar cell and (B) a plastic microgroove solar cell architecture. In (A), the metal grid lines and the transparent conductive oxide (TCO) layer both reflect incident light, whereas in (B), light can penetrate into the absorber layer without obstruction.
Figure 2A shows an SEM image of a polyacrylate-coated PET substrate patterned with an array of 15 microgrooves. Figure 2B shows a higher magnification image of a groove and Figures 2C-2F show compositional maps obtained by energy dispersive spectroscopy (EDS) of Al, Au, Cd and S in that groove. The elemental mapping confirms that these contact materials—
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i.e., the Al|CdS bilayer and the Au layer—are located on the edges of the grooves and do not extend across the groove. There is also Al and Au on the substrate coating the flat sections, which allows neighboring grooves to be electrically connected. These metal layers are also used to create electrical leads to the device.
Figure 2. (a) SEM image of a PET substrate patterned with fifteen microgrooves. (b) An SEM image of a groove with EDS maps of (c) aluminum, (d) gold, (e) cadmium, and (f) sulfur.
CuInSe2 nanocrystals were spray-deposited onto the microgroove-patterned substrates, and treated with ammonium sulfide as a solid-state ligand treatment (see supporting information
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for experimental details).
Figure 3A shows an SEM image of a device made with three
microgrooves connected in series. Each groove is filled with 200 nm of CuInSe2 nanocrystals. Figures 3B and 3C show the device characteristics of the device when illuminated from the front or the back of the device. (Front-side illumination is when the light first interacts with the nanocrystal layer and back-side illumination is when the light first penetrates the PET substrate.) The device response was significantly better when illuminated from the front of the device, with higher short circuit current, open circuit voltage and fill factor. There was significantly worse performance when the device was illuminated from the back side, as indicated by the poor fill factor (0.26) and low open circuit voltage. Under front illumination, the PCE of this device was estimated to be 2.2% using an active area of the groove width measured by SEM times the length of the grooves (Isc = 3.9 µA, Jsc = 16.8 mA/cm2, Voc = 0.45 V, area = 0.00023 cm2). However, light-beam induced current (see next section) illustrates how roughly half of each groove does not contribute many charge carriers to the device photocurrent. This means that the active area device PCE is as high as 4.4%, considering a case where only half of each groove is participating in photocurrent generation. Device statistics for thirteen 3-groove devices are provided in the supporting information. Back-side illumination generates fewer charge carriers in the groove, as light is reflected away from each groove by the metal-coated V-shaped groove walls. Optical measurements showed that coated flat substrate sections allowed only 20% transmission of visible light through the back side of the substrate through the thin Al/Au/CdS substrate coatings (see supporting information). Lower device Isc and Voc are consistent with fewer photogenerated carriers in the grooves.
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Figure 3. (A) SEM image of a PV device made with three microgrooves connected in series. Each microgroove is filled with 200 nm of CuInSe2 nanocrystals.
The current-voltage
characteristics of the device in (A) are shown with illumination (100 mW/cm2, AM 1.5) from the (B) front (PCE = 2.2%, Isc = 3.9 µA, Jsc = 16.8 mA/cm2, Voc = 0.45 V, area = 0.00023 cm2) and (C) back (PCE = 0.19%, Isc = 0.71µA, Jsc = 3.09 mA/cm2, Voc = 0.24 V, area = 0.00023 cm2) of the device. Dark IV curves are shown in blue, and light curves are shown in red.
Figures 4B and 4C show LBIC maps of the 3-groove device from Figure 3. In an LBIC measurement, the device photocurrent is measured as a spatially-focused laser is scanned across the sample.32-35 We have previously used this technique to characterize local photocurrent fluctuations in CuIn1-xGaxSe2 nanocrystal-based PVs13,36,37 and to view the space charge region in organic photovoltaics.38 The data in Figures 4B and 4C were obtained without white light bias and with an additional white light bias (100 mW/cm2) from the backside of the device,
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respectively. Figure 4A shows a map of the optical reflectance from the substrate, which was used to determine the position of the groove features. Figure 4D shows an overlay plot of the reflectance data and the LBIC maps. These data are averaged line scans measured along the length of the grooves. The 3-groove device featured in Figure 4 has Au coatings on the left-side groove walls and CdS on the right-side groove walls.
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Figure 4. (A) Reflectance and (B,C) photocurrent maps for the 3-groove device from Figure 3. The photocurrent map in (C) was obtained with white light bias. CdS/Al-coated groove walls are on the right sides of the grooves, labeled and indicated with a red dotted line in A; Au-coated groove walls are on the left sides of the grooves, indicated by black dotted lines. (D) Average
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reflectance and photocurrent linescans from panels A-C: the data represented by the red curve was obtained without white light bias (average linescan of the red boxed area of B); the data represented by the blue curve was obtained under white light bias (average linescan of the blue boxed area of C); the dotted black line traces the reflectance data (entire area of A). Dotted orange lines indicate the groove centers that line up with reflectance scan minima. Beam spot size is approximately 600 nm. In the reflectance map in Figure 4A, the groove features show up as three dark lines. The active device regions in Figures 4B and 4C correspond to these groove regions, as shown in the overlay in Figure 4D. From the overlaid linescans in Figure 4D it appears that photocurrent is not generated (or generated very weakly) in the left half of each groove section. Using the reflectance scan minima as proxies for the groove centers, it is apparent from Figure 4D that photocurrent response sharply decreases at the groove centers. It should be noted that the beam spot size is approximately 600 nm, which provides the limit for the spatial accuracy of the technique in determining how strongly the nanocrystals at a specific device position contribute to the photocurrent. Photocurrent generation appears to extend onto the flat (non-groove) substrate sections; however, this photocurrent tail is significantly reduced in intensity when the substrate is light biased. The measurement with added white light bias more accurately reflects device behavior under typical simulated solar illumination conditions. For example, it is well known that PV device measurement artifacts can occur in incident photon-to-current efficiency (IPCE) measurements without an added white light bias due to traps in materials and at interfaces.39 Additionally, semiconductor diffusion lengths can change by orders of magnitude as a function of illumination.34 In fact, the LBIC peak widths are expected to narrow further for a device that
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experiences full 100 mW/cm2 simulated solar illumination. Due to experimental constraints we were required to use a bias lamp behind the substrate, where only ~20% of visible light is transmitted through the thin Al, Au, and CdS coatings. Figure 4 illustrates that photocarrier collection is asymmetric within microgrooves. A model was constructed to help understand the physical charge carrier mechanisms within the grooves. This model took two considerations into account. First is the directionality of light. Light intensity is modeled to be stronger at the top of the groove and weaker towards the groove bottom due to light absorption by CuInSe2 nanocrystals as the light travels from top to bottom of the groove. And second is the free electron collection probability. Free electrons are collected with an exponentially decreasing probability if they are generated further away from the n-type CdS contact. The model assumes that holes, as majority carriers in CuInSe2, can transverse infinitely long distances to reach the Au contact at the opposite end of the groove. A minority carrier (electron) diffusion length of 200 nm was also assumed in CuInSe2. Therefore, this simple model assumes that photocurrent generation at each position within a groove is the multiplied probabilities of light absorption and free electron collection. The results of this model are shown in Figure 5. Photocurrent generation is asymmetric within the modeled groove due to the heightened probability of electrons to be collected if they are generated near the CdS interface. Although this model is expected to have significant error, it does qualitatively demonstrate why photocurrent generation is asymmetrical within the groove.
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Figure 5. Modeled photocurrent of a CuInSe2 nanocrystal-filled microgroove photovoltaic. (A) Schematic representation the modeled PV groove. (B) Resulting photocurrent at each x position within the modeled groove, with the groove centered at x=0.
The grooves in the device characterized in Figures 3 and 4 occupy approximately 15% of the available surface area. An optimized device would have much more tightly packed grooves, such as the device shown in Figure 6, which has 15 more closely-packed microgrooves that are connected in series. The Voc of this device is 5.8 V. Each groove is contributing on average a voltage of 0.39 V to the open circuit voltage. Device short circuit current was low (6.5 nA) due to the low statistical likelihood of all fifteen grooves behaving as optimal PV cells. Current is limited by the worst-performing groove. It should also be noted that the dark IV curve in Figure
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6B does not go exactly through the origin. This is believed to be the result of minor interfacial capacitive elements in the device.
Figure 6. A PV device with fifteen microgrooves connected in series: (A) a top-down SEM image and (B) the current-voltage response under 100 mW/cm2 (AM 1.5) illumination. Dark IV curves are shown in blue, and light curves are shown in red. PCE = 0.013%, Isc = 6.5 nA, Jsc = 0.007 mA/cm2, Voc = 5.8 V, area = 0.0009 cm2.
Devices were also fabricated and tested without Al contact layers. Based on previous results using these nanocrystals in flat standard architecture cells, we expected to achieve a Vocper-groove around 0.5 V. We hypothesize two reasons that the open circuit voltages of these devices were lower than expected. First, imprecise CdS deposition could leave Al exposed to
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CuInSe2 nanocrystals at the base of the CdS|Al groove wall. We believe that the exposed Al can cause free carriers to experience only weak Schottky rectification (CuInSe2–Al interface) instead of strong p-n rectification (CuInSe2-CdS interface). Furthermore, spray-deposition was seen to deliver non-uniform CuInSe2 coatings along the lengths of the grooves, which can be seen in Figure 3A. We believe a CuInSe2 nanocrystal overlayer can electrically connect the top CdS coating on both sides of a groove which reduces the device shunt resistance. Devices fabricated without the Al layer were also found to work, although they suffered from high series resistance. Figure 7 shows a device with 10 microgrooves connected in series without an Al layer. This device was intentionally coated with a thick nanocrystal overlayer. The device exhibits unusually high Voc for a device constructed with such a thick nanocrystal overlayer. Furthermore the device showed even higher Voc and Isc when illuminated from the backside, as the Al-free construction allows light into the active regions of the device.
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Figure 7. (A) SEM image of a PV device with 10 microgrooves connected in series with nanocrystal overcoating to bridge the grooves. There is no Al coating in this device. (B) The device characteristics of that device with illumination from the front side (___) and the back side (_ _ _). Front side illumination: PCE = 0.02%, Isc = 0.041 µA, Jsc = 0.052 mA/cm2, Voc = 1.7 V, area = 0.0008 cm2; Backside illumination: PCE = 0.04%, Isc = 0.052 µA, Jsc = 0.066 mA/cm2, Voc = 2.4 V, area = 0.0008 cm2. Dark IV curves are shown in blue, and light curves are shown in red.
In conclusion, plastic solar cells were made by spray-coating CuInSe2 nanocrystals into patterned microgrooves with sidewall Al|CdS and Au contact layers in acrylic-coated PET substrates. The devices were made by scalable roll-to-roll compatible manufacturing processes, such as microembossing, selective physical vapor deposition, and spray-deposition.
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nanocrystal light-absorber material is deposited at room temperature under ambient conditions, and all device testing was performed in air. This approach to PV device fabrication is highly versatile and could be applied to any other solution-processable PV material, such as PbS nanocrystals or perovskite materials.
Supporting Information. Experimental methods, device performance statistics for 3-groove devices, and substrate transmission data.
Acknowledgements. We acknowledge financial support for this work from the Robert A. Welch Foundation (F-1464 and F-1529) and the NSF Industry/University Cooperative Research Center on Next Generation Photovoltaics (IIP-1134849). DRP and CT acknowledge the National Science Foundation through the Graduate Research Fellowship Program (DGE-1110007) for individual financial support.
Notes. DRP, AJT, RL, and CT fabricated the devices; MG, DRP, and YY performed LBIC measurement/analysis; VR and DRP developed the nanocrystal synthesis; JvE and JJ developed the ligand exchange protocol; DRP, RL, and CT performed IV characterization; DRP performed SEM/EDS; and DAV and BAK served as advisors for the work. AJT and RL declare competing financial interests through their affiliation with Big Solar Ltd.
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