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Polymer Analog Memristive Synapse with Atomic-Scale Conductive Filament for Flexible Neuromorphic Computing System Byung Chul Jang, Sungkyu Kim, Sang Yoon Yang, Jihun Park, Jun-Hwe Cha, Jungyeop Oh, Junhwan Choi, Sung Gap Im, Vinayak P. Dravid, and Sung-Yool Choi Nano Lett., Just Accepted Manuscript • DOI: 10.1021/acs.nanolett.8b04023 • Publication Date (Web): 04 Jan 2019 Downloaded from http://pubs.acs.org on January 5, 2019

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Polymer Analog Memristive Synapse with AtomicScale

Conductive

Filament

for

Flexible

Neuromorphic Computing System Byung Chul Jang,#1 Sungkyu Kim,#2 Sang Yoon Yang,#1 Jihun Park,1 Jun-Hwe Cha,1 Jungyeop Oh,1 Junhwan Choi,3 Sung Gap Im,3 Vinayak P. Dravid,2 and Sung-Yool Choi1* 1

School of Electrical Engineering, Graphene/2D Materials Research Center, KAIST, Daejeon

34141, Korea 2

Department of Materials Science and Engineering and NUANCE Center, Northwestern

University, Evanston, IL 60208, USA 3

Department of Chemical and Biomolecular Engineering, Graphene/2D Materials research Center,

KAIST, Daejeon 34141, Korea

#

These authors contributed equally to this work.

* Address correspondence to [email protected]

ACS Paragon Plus Environment

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Abstract With the advent of artificial intelligence (AI), memristors have received significant interest as a synaptic building block for neuromorphic systems, where each synaptic memristor should operate in an analog fashion, exhibiting multilevel accessible conductance states. Here, we demonstrate that the transition of the operation mode in poly(1,3,5-trivinyl-1,3,5-trimethyl cyclotrisiloxane) (pV3D3)-based flexible memristor from conventional binary to synaptic analog switching can be achieved simply by reducing the size of the formed filament. With the quantized conductance states observed in the flexible pV3D3 memristor, analog potentiation and depression characteristics of the memristive synapse are obtained through the growth of atomically thin Cu filament and lateral dissolution of the filament via dominant electric field effect, respectively. The face classification capability of our memristor is evaluated via simulation using an artificial neural network consisting of pV3D3 memristor synapses. These results will encourage the development of soft neuromorphic intelligent systems.

Keywords: flexible memristor, artificial neural network (ANN), neuromorphic system, quantized conductance, electrochemical metallization (ECM)


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Recent advances in artificial neural networks (ANNs) have enabled the performing of highly intelligent tasks such as real-time big data analysis1, speech/face recognition2,3, self-driving automobile navigation4, and even exceeded the skills of human beings for the ancient board game Go5,6. These tasks usually deal with large amount of unstructured data using the software-based ANN, which has been implemented by graphic processing units (GPUs)-based huge server system for training and inference of the AI algorithm. This AI system leads to several issues such as limited computing power and high power consumption7, making it very challenging to apply it to battery-powered mobile electronics with limited battery capacity. The high power consumption of current computing hardware in the software-based implementation of ANN is mainly due to the von Neumann architecture, which is energy-inefficient for data-intensive tasks7. To overcome these issues, hardware-based ANNs known as brain-inspired neuromorphic systems8 have been in the spotlight because the neuromorphic system can potentially emulate massively parallel networks of biological brain with minimal energy consumption. In the neuromorphic system, data storage and information processing can be realized simultaneously at each synapse by modulating its connection strength (i.e., the synaptic weight), indicating that a key element of a neuromorphic system is the synapse device. Therefore, the development of highly scalable and low-power electronic synapse that can mimic the synaptic functions of a biological synapse is important for the development of a versatile, large-scale neuromorphic system. Various efforts have been devoted to developing the electronic synapse by exploiting very-large-scale integrated (VLSI) analog complementary metal-oxide-semiconductor (CMOS) circuit, mixed analog/digital circuit, and CMOS-based application specific integrated circuit (ASIC)9-11. These approaches require multiple transistors to realize one electronic synapse, thus resulting in large chip area and high power consumption. Therefore, the attractive features of emerging


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nanoelectronic devices have started to gain attention for resolving the challenges of CMOS-based approaches. Two-terminal memristors have been the most promising candidate for highly scalable and lowpower electronic synapse devices because each nanoscale cell functions as one electronic synapse. The emulation of biological synaptic functions using memristors has been demonstrated including long and short-term potentiation/depression, paired-pulse facilitation (PPF), and spike-timing dependent plasticity (STDP)8,12,13. Pattern recognition has also been implemented using memristor-based ANNs3,14-16. A unique feature of the memristor is its non-volatile resistance (or conductance) switching behavior, which depends on the history of the current or voltage applied across it17,18. Hence, numerous memristor-based synapse devices have been developed in which the conductance state equivalent to the synaptic weight can increase or decrease in an analog fashion by applying a specific pulse train, exhibiting potentiation and depression (P-D) characteristics19-21. It is challenging to achieve the analog conductance update in the conventional binary memristors with abrupt switching which are operated by either atomic-scale modulation of cations (such as Cu22-24 or Ag25-27) or anions (oxygen ions)28,29. Therefore, it is essential for memristors to exhibit gradual resistive changes during its switching process to obtain the analog type conductance response from memristor. Hwang et al. reported that in electrochemical metallization (ECM) type memristors, the transition of reset behavior from abrupt to gradual mode occurred in Pt/TiO2/Cu memristor with decreasing size of the conducting filament22. Furthermore, as the lateral dimension of the conducting filament reaches the atomic scale, the filamentary memristive device even exhibits discretely quantized conductance states23, making this a potential candidate for high-density, atomic-scale electronic synapse devices.


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We have reported a polymer-based, highly uniform ECM memristor array using nanoscale thin poly(1,3,5-trivinyl-1,3,5-trimethyl cyclotrisiloxane) (pV3D3) film deposited via solvent-free initiated chemical vapour deposition (iCVD)30. pV3D3 memristors with copper top electrode (Cu TE) and aluminium bottom electrode (Al BE) were operated in the binary switching mode by the formation and rupture of the Cu filament even under mechanical deformation due to the inherent flexibility of the pV3D3 thin film. Based on these characteristics of pV3D3 memristors, both flexible non-volatile memory24 and flexible logic-in-memory circuits31 have been developed for energy efficient flexible electronics applications. In this study, we demonstrate that a pV3D3 memristor can be also operated as an electronic synapse device featuring analog conductance updates simply by tuning the lateral size of the conducting filament. Reduction of the lateral size of the filament, i.e., the formation of thin Cu filament, resulted in the transition of reset behavior of a pV3D3 memristor from abrupt to gradual mode. A linear P-D characteristic was obtained in this device, suggesting that the conductance state can be updated effectively in an analog fashion when consecutive pulses are applied. In addition, we discovered that the pV3D3 memristor with a thin filament showed quantized conductance with integer and half-integer multiples, which can be attributed to an atomically thin part within the formed Cu filament. The increment in the quantized conductance states implies the gradual growth of the filament, contributing to the analog potentiation of the pV3D3 memristor. The analog depression phenomenon can be elucidated via the lateral dissolution of the conicalshaped thin filament, which is attributed to the dominant electric-field-induced ECM effect. Device-to-system level simulation of face recognition also showed that the ANN based on our memristor with thin filament well classified the face images even when they were damaged.


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Flexible pV3D3 memristor for electronic synapse Pre-synaptic neuron

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-1.2 -0.8 -0.4 Voltage (V)

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20 40 60 80 100 Number of pulses (#)

Figure 1. Structure and electrical characteristics of flexible pV3D3 memristor as electronic synapse. (a) Schematic illustration of a flexible pV3D3 memristor-based electronic synapse array. Each flexible synaptic memristor consists of Cu top electrode, pV3D3 thin film, and Al bottom electrode on a flexible PES substrate. Top and bottom electrodes correspond to the presynaptic and postsynaptic neurons, respectively. (b) Cross-sectional TEM image of the flexible pV3D3 memristor. (c) Reset behavior of the flexible pV3D3 memristor after the formation of filament with Icc of 10−5 A. (d) Reset behavior of the flexible pV3D3 memristor with a thin filament formed by the proposed gradual Icc increase method. (e) Potentiationdepression characteristics of the flexible pV3D3 memristor with a thin filament as a function of the number of applied pulses. Insets shows the applied pulse trains for potentiation (2 – 4 V, 60 ns) and depression (−1.2 – −1.4 V, 100 ns).

Figure 1a shows the schematic illustration of a flexible pV3D3 memristor array with Cu TE and Al BE fabricated on a polyethersulfone (PES) substrate. A cell area of 5 μm × 5 μm (Figure S1a in Supporting Information) was defined using photolithography by virtue of the outstanding chemical stability of the highly cross-linked pV3D3 structure30. Note that memristors based on


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solution-processed polymer have been usually fabricated using shadow masks due to the vulnerability of the polymers to organic solvents. This technique results in a larger cell area (several thousand of μm2). Gas-phase polymerization of the iCVD process also enables the formation of thin (~20 nm), uniform, and pinhole-free pV3D3 films between Cu TE and Al BE (Figure 1b), which is directly related to reliable switching characteristics, excellent stability against electrical and mechanical stresses, and good electrical uniformity of pV3D3 memristors in terms of device-to-device distribution on the flexible substrate24. The flexible pV3D3 memristor operates through the formation and rupture of Cu conducting filaments inside pV3D3, resulting in a low resistance state (LRS) and a high resistance state (HRS), respectively24. These binary and unipolar switching behaviors are shown in Figure S1b of Supporting Information. After activation with an electroforming process using compliance current (Icc), typical set process occurred at around 3.5 V during positive bias sweep with Icc of 10−5 A, resulting from the formation of Cu filaments by electrochemical metallization under the positive bias applied to Cu TE. When the voltage is re-swept without applying Icc, the conductive Cu filament formed between the two electrodes can be ruptured due to high Joule heat induced by high current flowing through the filaments, resulting in the reset process. Hence, the reset process occurs at both negative (N-reset) and positive (P-reset) voltage regions (Figure 1c and S1b). Note that when Al BE was replaced to an inert platinum (Pt) electrode, Cu/pV3D3/Pt device also showed binary, unipolar switching behaviors, ruling out the possibility of resistive switching by native Al2O3 (Figure S1c in Supporting Information). An interesting thing we observed in this switching behavior is the mismatch of the current values between the set Icc and reset current. While the Icc was set at 10−5 A, the resulting reset current, which is the maximum current flowing during the reset process, was found to be increased


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by three orders of magnitude. Higher reset current than the Icc indicates that the application of Icc in a semiconductor parameter analyser (SPA) cannot effectively prevent the Cu filament in our memristive system from thickening. This is due to both the faster filament formation time of the pV3D3 memristor (30 ns for the set process, Figure S2a in Supporting Information) than the response time of the SPA (100 μs ~ several ms)32 and high overshoot current generated from discharge of the parasitic capacitance connected in parallel to the memristor device33 (note of Figure S3 in Supporting Information). Therefore, it is difficult to control the size of the filaments in a pV3D3 memristor by conventional application of Icc, resulting in its operation in the binary switching mode with thicker filaments than expected from the applied Icc level. While the binary switching characteristics of the pV3D3 memristor is suitable for its application in non-volatile memory or non-volatile logic-in-memory circuits, it is necessary for the memristor to be operated in the analog mode for its application to a synaptic device in a neuromorphic system. To make the analog conductance updates possible in the pV3D3 memristor, we focused on the method for changing the reset behavior of our memristor from abrupt to gradual mode. This is because abrupt reset behavior by Joule heating effect34 makes it challenging to implement the multilevel (> 32 levels) depression process of a synaptic device under the application of consecutive input pulses. According to a recent report by Hwang et al.22, reduced current level can exclude the generation of large Joule heat during the reset process. Therefore, we adopted the reduction of filament size, namely, the formation of thin filament, as a strategy for the transition of reset behavior of our memristor. To form thin Cu filaments, we increased the Icc level gradually from 10−8 to 10−6 A (Figure S3 in Supporting Information). This method can reduce the difference between Icc level and the current level flowing through memristor and thus, effectively suppress the overshoot current by minimizing the amount of charge discharged from the parasitic


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capacitance (note of Figure S3 in Supporting Information). Note that high overshoot current is responsible for the formation of unintentional thick filaments in pV3D3 memristors. By applying the method of gradual Icc increase, the reset behavior of the pV3D3 memristors in the negative bias region was changed to the gradual switching mode with reduced reset current (Figure 1d). This indicates the formation of thin filaments with which the pV3D3 memristors can be operated in an analog fashion. Hence, we infer that the control of filament size is a critical factor for achieving gradual reset process, which will be discussed in Figure 3 in more detail. Note that the positive bias sweep after the formation of the thin filament results in further growth of the filament rather than immediate thermal rupture due to the supply of Cu ions from Cu TE, followed by Joule heatinduced reset behavior (Figure S4 in Supporting Information). This implies that the thin filament itself does not undergo abrupt rupture during both positive and negative bias sweeps. To implement online learning in a flexible pV3D3 memristor-based ANN, the synaptic weights represented by the memristor conductance should be incrementally updated. Figure 1e shows the potentiation and depression (P-D) curves obtained by the conductance updates of the pV3D3 memristor under the application of consecutive pulses. Filament type memristor-based synapse devices generally show nonlinear P-D characteristics, which cause lower recognition rate than the software-based neural network7. To avoid this, we introduced the increasing voltage pulse scheme7,35 through strict timing control of the applied voltage based on the transient characteristics of the pV3D3 memristor (Figure S2a and S2b in Supporting Information). Conductance updates with linear behavior were achieved by utilizing pulse trains with increasing amplitude in the range of 2 ~ 4 V (or −1.2 ~ −1.4 V) with a width of 60 ns (or 100 ns) for the potentiation (or depression) process. This pulse scheme is similar to an incremental step pulse programming (ISPP) scheme in commercialized flash memory for improving process variation tolerance36. Thus, well-designed


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peripheral circuits for driving the ISPP scheme can be also applied to the pV3D3 memristor-based ANN. It is worth noting that the PPF behavior of the biological synapse can be mimicked and STDP can be implemented with a pV3D3 memristor, as shown in Figure S5 of Supporting Information. We also note that mechanical flexibility of the pV3D3 memristor (Figure S2e and S2f in Supporting Information) enables the eventual folding of the crossbar array of synaptic memristors. Thus, a three-dimensional (3D) neuromorphic system can be fabricated simply by mechanical buckling or regular folding of planar, flexible memristor arrays, which can enhance the synapse density dramatically in combination with the vertical stacking strategy of crossbar arrays37. Micro/nanoscale origami approaches can be applied to realize this 3D architecture38. The mechanical flexibility of the pV3D3 memristor also reveals the feasibility of its application in wearable and implantable electronics as neuromorphic devices.

Quantized conductance states of pV3D3 memristor We investigated the behavior of the memristor with thin Cu filament by using a current sweeping mode in the range of 0 – 200 μA (Figure 2a and 2b). During the current sweeping, voltage across the memristor was monitored (Figure S6 in Supporting Information). While the voltage sweep mode can induce high overshoot current and the resulting unintentional thickening of the filament as described above, the current sweeping mode can effectively suppress the effect of current overshoot, enabling a self-compliant set process (note of Figure S6 in Supporting Information). Under the current sweeping condition, we observed that the quantized conductance (G0) states with half-integer and integer multiples appear stepwise, as shown in Figure 2a and 2b, respectively. It has been reported that quantized conductance occurs when the lateral dimension of the channel is comparable to the Fermi wavelength of the material and the transverse length is less than the


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mean-free path of the electron23. Quantized conductance is defined as G0 = 2e2/h, where e is the charge of the electron, h is Plank’s constant, and the factor of 2 is associated with spin degeneracy23. Therefore, the observed multiples of G0 indicate the existence of an atomically thin part in the formed Cu thin filament.

a

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Figure 2. Quantized conductance states and analog potentiation behavior of pV3D3 memristor. (a) Halfinteger and (b) integer multiples of quantized conductance observed in the flexible pV3D3 memristor in the current sweeping mode. (c) Energy spectrum of the Cu atomic contact consists of spin-split subbands (՛ for spin-up and ՝ for spin-down). The spin-split subband contributes to 0.5 G0. (d) Energy spectrum of the filament with thickness comparable to the Fermi wavelength of Cu. The spin-degenerate subband


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contributes to G0. (e) Retention characteristics of the filaments with varying quantized conductance states. (f) Retention time as a function of the quantized conductance state. Retention time of each filament was extracted from (e). The inset shows the retention time plotted on semi-log scale. The red line indicates an exponential fit.

The integer multiples of G0 were reported in non-magnetic nanowire materials such as Au and Ge39,40 due to spin degeneracy of the non-magnetic materials, which provide two quantum channels (one channel for spin-up and the other channel for spin-down) for the conductance. On the contrary, given that the half-integer states of G0 were usually observed in ferromagnetic iron (Fe) and nickel (Ni) nano-contacts with spin-polarized electrons under a magnetic field40,41, the half-integer multiples of G0 observed in Cu filament-based pV3D3 memristors suggest that spin degeneracy in the nanoscale Cu filament was lifted. Because an isolated Cu atom exhibits paramagnetic properties with a net spin, the lifted spin degeneracy indicates that nearly isolated Cu atoms with spin-polarized atomic state exist at the thinnest part of the nanoscale Cu filament, which leads to the half-integer multiples of G042. This can be further explained in terms of the spin subband. It has been reported that the spin-degenerate subband contributes to the integer of G0 whereas spin-split subband by a spin-polarized electron results in the half-integer of G043. With the Cu filament having an atomically thin part, the right-going electrons from the left reservoir contact (EFL) through the lowest subband 1՛ results in 0.5 G0 (Figure 2c) because a Cu atom with a spin-polarized atomic state induces spin-split subbands. On the other hand, with the filament having its thickness comparable to the Fermi wavelength of Cu, the spin states are degenerate and therefore right-going electrons through the spin-degenerate subband 1՛՝ contribute to G0 (Figure 2d). Integer multiples of G0 can also occur when multiple Cu thin filaments with 0.5 G0 are formed in parallel. Therefore, we can infer that the increment in quantized conductance states can be one of the contributing factors for the observed analog potentiation behavior of the pV3D3 memristor.


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A possible explanation is as follows: considering the formation of atomically thin Cu filament, voltage inputs for the potentiation enable the gradual growth of the lateral filament size. Because the thickened filament can compensate for the theoretical increase in the subband spacing23, the number of available subbands for electron transport increases under the same reading voltage as a function of the filament size, resulting in the increase in conductance in a quantized fashion. In addition, the parallel formation of multiple filaments can contribute to the increase in conductance in the potentiation process such that the quantized conductance of individual Cu filaments are added44 In order to characterize the stability of the quantized conductance states, the retention time of the formed filaments with different conductance values were investigated. Retention time was measured with a time step of 1 s after a specific quantized conductance state was achieved by applying the current sweep mode. Figure 2e and 2f show that the retention time becomes longer for higher conductance state and increases as a function of the conductance state. This result implies that the atomically thin part of the Cu filament becomes stable as the conductance state increases45. Hence, the pV3D3 memristor device set by DC voltage sweep mode with Icc of 10−5 A shows stable retention time over 105 s due to its G0 of > 100 (Figure S2d in Supporting Information). Feasible control of the retention time in pV3D3 memristor can mimic the short-term plasticity (STP) and long-term plasticity (LTP) of a biological synapse. In particular, STP is essential for the reservoir computing-based ANN which enables effective processing for timevarying inputs and intelligent tasks such as pattern recognition, signal processing, and disease detection46-49. Note that retention time in quantized-conductance-based pV3D3 memristor can be enhanced by integrating a memristor with a control transistor (1M-1T structure)50 that refreshes the specific Icc to maintain the specific conductance state of the thin filament.


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Reset switching behaviors depending on filament size

Figure 3. Ex situ TEM observation of Cu filament and analog depression behavior of pV3D3 memristor. (a) Cross-sectional TEM image of the flexible pV3D3 memristor after the conventional set process with Icc of 10−5 A. (b) HRTEM image obtained from the yellow rectangular region of (a). Tip of the conical filament is in touch with the Al bottom electrode. Dashed white line is drawn as an eye guide. The inset shows the fast Fourier transform patterns converted from the Cu filament region. (c) HAADF-STEM image obtained from the filament region. (d) Corresponding EDX elemental mapping result for Cu. (e) Temperature and electric field distributions of the pV3D3 memristor with thick Cu filament and (f) the corresponding schematic diagram for thermal rupture of the filament. (g) Temperature and electric field distributions for the pV3D3 memristor with thin Cu filament and (h) the corresponding schematic diagram for lateral dissolution of the filament.

To gain insight into the analog depression of a pV3D3 memristor, we scrutinized the origin of the gradual reset based on both high-resolution transmission electron microscopy (HRTEM) and


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electro-thermal simulation. Figure 3a and 3b display the cross-sectional HRTEM images of a pV3D3 memristor after the conventional set process with Icc of 10−5 A, showing the formation of a conical Cu filament with a base width of 26 nm. This filament was generated and grown near the protrusion of Al BE due to the local enhancement of the electric field. High-angle annular dark field scanning TEM (HAADF-STEM) image and the corresponding energy dispersive X-ray spectroscopy (EDX) elemental mapping also demonstrate that the filament contains Cu, as shown in Figure 3c and 3d, respectively. Note that the formation of the conical Cu filament in Figure 3a results from the unintentional thickening effect discussed in Figure 1. With this conical and thick Cu filament, high temperature was distributed along the filament from the bottom tip to the middle body region whereas the distribution of the electric field was rather uniform through the filament body (Figure 3e). Such high local temperature can induce thermal rupture of the thick Cu filament (Figure 3f), elucidating the voltage polarity-independent abrupt reset behavior of the pV3D3 memristor (Figure S1b in Supporting Information). As for the atomically thin filament that induced gradual reset behavior, it was challenging to observe its geometry using ex-situ TEM because the time required to prepare a TEM specimen with the focused ion beam (FIB) technique is much longer than the retention time of the thin filaments with low quantized conductance states (Figure 2e). Note that short retention time can be attributed to the spontaneous rupture of the thin filament which occurs to minimize large interfacial energy of thin filament caused by Gibbs-Thomson effect51-53. Therefore, considering both the shape of the thick filament observed in the TEM image (Figure 3a) and the quantized conductance behavior (Figure 2), we suppose the formation of a conical but much thinner filament for the electro-thermal simulation of a memristive system operated in a gradual reset process51,52,54. Figure 3g shows that strong electric field was concentrated at both the tip region of the thin filament and


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its surrounding medium. Local temperature at the tip of the thin filament was lower than that of the thick counterpart due to the low current flowing through the thin filament and the rapid dissipation of the resulting Joule heat through the Al BE. Under the negative voltage applied to the Cu TE, the concentrated electric field at the curvature of the conical filament tip induces the electrochemical oxidation of Cu in the filament tip region followed by field-induced Cu ion drift. This leads to the lateral dissolution of the filament55 (Figure 3h) through which the gradual decrease in current during the reset process and analog depression can be achieved in the pV3D3 memristor operated with the thin filament.

Face classification simulation using SNN based on pV3D3 memristor To demonstrate the feasibility of the pV3D3 memristor-based flexible synapse device for pattern recognition, we simulated an ANN with two-layer perceptron to distinguish the face of one person from that of others (Figure 4a). The ANN was designed with crossbar architecture with 32ൈ32 input neurons, 10 middle neurons, and 3 output neurons (Figures S7a in Supporting Information). The two-crossbar layout that consists of unsupervised and supervised crossbar was adopted to perform the task of face classification using the supervised learning scheme56. The unsupervised crossbar layer having input and middle neurons first clusters the unlabelled data using the STDPbased unsupervised learning scheme56. After the clustering, the classification is implemented by a supervised crossbar layer having middle and output neurons where each output of the unsupervised crossbar layer is connected to the input of the supervised crossbar layer (see Figures S7, S8, and S9 for details of the ANN in Supporting Information). Note that the crossbar architecture is the


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Figure 1. Face classification simulation with pV3D3-based ANN. (a) Two-perceptron ANN for face classification of 32 × 32 grayscale image. The input neuron is connected to a pixel of the input image. (b) Nine training images of three people, which were extracted from the Yale Face Database. (c) Initial and final conductance distributions for the synapse array of the output neuron classified as the class 1 person after the training process. Inset shows the visual diagram of the final conductance. (d) Recognition rate as a function of the number of training epochs. (e) Test image set with noise proportion of 28%. (f) Recognition rate as a function of the noise proportion of the test image set.

best hardware layout for implementing ANN owing to its multiple key kernels. First, the crossbar architecture can simply implement vector-matrix multiplications (e.g., dot-product), which is essential for performing machine learning57. This is the reason GPUs play a key role in software-


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based ANN to implement deep learning. Second, parallel rank-1 weight updates facilitating a winner-takes-all mechanism58 can be realized with the crossbar architecture. Lastly, the crossbar layout is the optimal architecture, which enables high packing density and defect tolerance59, and therefore allows to emulate the fault tolerance of the biological brain in a compact space for the realization of brain-inspired neuromorphic systems. Nine training images with 32ൈ32 pixels were extracted from the Yale Face Database (Figure 4b)60. One of the nine training images for the three people was fed to the input neurons of the ANN composed of the pV3D3 memristor, in which each input neuron was connected to one pixel of the training image. The input neuron circuits emit presynaptic spikes with the timing proportional to the pixel intensity of the training image (Figure S8a in Supporting Information). Hence, a total of 1024 input neurons emit presynaptic spikes. Input presynaptic spikes generate postsynaptic currents based on the synaptic weight (conductance) of each synaptic memristor. The postsynaptic currents are integrated at the postsynaptic neuron, which consists of a leaky integrate-and-fire (I&F) output neuron circuit (Figure S7b in Supporting Information). At this time, vector-matrix multiplication between the input voltage vector and the conductance matrix of the memristor array directly results in the postsynaptic current vector by simply applying the spike voltages to the memristor array, which is one of the advantages of the crossbar array. Then, the postsynaptic neuron that generates the highest postsynaptic current among all postsynaptic neurons fires postsynaptic spikes to update the synaptic weights of the synaptic memristors connected with the fired postsynaptic neuron. The postsynaptic spike is composed of a pulse voltage with consecutive negative and positive polarities (Figure S8b in Supporting Information). When the presynaptic spike fires earlier than the postsynaptic spike (tPre − tPost = οt < 0), the conductance of the pV3D3 memristors is decreased by the applied negative long-term depression voltage (VLTD). On the other


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hand, if the presynaptic spike fires later than the postsynaptic spike (tPre − tPost = οt > 0), positive long-term potentiation voltage (VLTP) is applied, which increases the conductance of the pV3D3 memristors61. For the simulation of the synaptic weight update, we used a simplified STDP learning rule scheme62 by designing an appropriate timing correlation between the presynaptic and postsynaptic spikes. When compared with the purely bio-inspired and more complex STDP scheme, the simplified STDP learning rule makes the peripheral driving circuitry considerably simpler at the circuit-level design because a delay matching between the presynaptic and postsynaptic spikes is not required. To implement the update of the synaptic weights based on the experimental results of the P-D characteristics in our pV3D3 memristor, we modelled the conductance modulation of the synaptic memristor as a function of the pulse number (Figure S9 in Supporting Information). After the completion of the above learning process, the ANN was evaluated with the test set containing 24 images of three people, which were not available during the training process (Figure S10 in Supporting Information). Figure 4c shows the final conductance distribution and the visual map diagram of the synapse array corresponding to the output neuron that classified the test image as the face of the class 1 person. The faces of the other two persons were also successfully classified into other output neurons (Figure S11 in Supporting Information). In the ANN based on the flexible pV3D3 memristor, three out of the 24 images were misclassified after 24 epochs of training, indicating an average recognition rate of 88% (Figure 4d). During one epoch, nine images of three people were applied to the input of the ANN. Recognition rate of 88 % is a bit lower but comparable to the results reported by Yao et al., in which they demonstrated a one-layer perceptron with 1T-1R memristor array for the face recognition (recognition rate of 91 %) using the delta rule as the


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weight update rule3. Note that the recognition rate for Modified National Institute of Standards and Technology (MNIST) handwritten digit dataset was ~86% with our pV3D3 memristor (Figure S12 in Supporting Information), which is higher than that of carbon nanotube synaptic device-based spiking neural network (SNN)61. This high recognition rate results from the linear P-D characteristics of the pV3D3 memristor synaptic device and the addition of the middle supervised crossbar layer. We adopted a biologically realistic SNN in this simulation, which is a third generation neural network that is more energy efficient in an asynchronous and hardware-friendly manner than the deep neural network (DNN) using backpropagation algorithm in a synchronous fashion with digital clock frequency63. Our recognition rate for the digit classification is lower than that with the state-of-the-art memristor using DNN (over 95%)20,64. This would be due to the limited conductance levels, asymmetric P-D characteristics of our memristive system, and immature SNN algorithm when compared with well-established DNN algorithm, which can also result in a bit lower recognition rate for the face classification mentioned above. We believe that additional improvements could be achieved by engineering a device structure for confining the Cu filaments within a defined channel20 in order to improve the asymmetric P-D characteristics and enlarge the conductance levels, and by developing more sophisticated SNN such as deep SNN63 with the aid of neuroscience. Furthermore, to confirm the fault tolerance of the ANN, we intentionally introduced noise to the test images. The noisy test images were generated by randomly selecting some pixels and assigning them to random values (Figure 4e). As shown in Figure 4f, the recognition rate of the ANN decreased as the proportion of noise included in the test images increased. However, considering that the ANN showed recognition rate of over 70% for the 450 test images with a noise


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proportion of 55% (Figure 4f), it can be inferred that the ANN based on the flexible pV3D3 memristor showed excellent noise immunity, which enabled it to classify the damaged images accurately. Therefore, the results clearly show that the neuromorphic system composed of the flexible pV3D3 memristor has considerable potential for developing soft intelligent electronics for identity verification and billing systems using facial recognition.


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Conclusions We have demonstrated that the operating mode of the pV3D3 memristor depends on the lateral size of the conducting filament, showing the transition from conventional binary to synaptic analog switching when the filament size was reduced. By considering the results of the observed quantized conductance multiples and (ex-situ) TEM, we unveiled that the origin of the transition is attributed to the existence of an atomically thin part in the formed thin Cu filament. The increment in the observed integer and half-integer multiples of quantized conductance suggests the analog potentiation of the pV3D3 memristor with an atomically thin Cu filament. It was also demonstrated that the analog depression phenomenon results from the lateral dissolution of the conical-shaped thin Cu filament by dominant electric-field-induced ECM effect rather than the Joule heating effect. Inspired by the biological synapse, P-D characteristics, PPF, and STDP were successfully implemented with the pV3D3 memristive electronic synapse operated based on the atomically thin filament. We expect that the working principles for the development of synaptic memristors are not limited to the polymer memristor system but also can be extended to its inorganic counterparts. In addition, to the best of our knowledge, we have shown for the first time that by using deviceto-system level simulation for face recognition, the ANN based on the polymeric pV3D3 memristor compatible with flexible electronic applications can effectively classify a person’s facial images even when the images are damaged. We believe that our research presents an important milestone in the development of a flexible intelligent electronic system that could be one of the ideal platforms to provide the public with easy access to AI-based services.


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Methods Device Fabrication. The flexible pV3D3 memristor was fabricated with crossbar architecture on a flexible polyethersulfone (PES) substrate. The 60-nm-thick Al bottom electrodes were patterned on the PES substrate using photolithography technique, subsequent thermal evaporation, and liftoff processes. Then, a 20-nm-thick pV3D3 film was deposited on the Al bottom electrodes via the iCVD process. Finally, device fabrication was completed by positioning the 60-nm-thick Cu electrodes perpendicular to the Al bottom electrodes by the same procedures described above, forming an 8ൈ8 crossbar array having 64 memristors. The line widths of both Cu and Al electrodes were approximately 5 μm, indicating a unit cell area of approximately 5 μmൈ5 μm. Electrical Measurements. To investigate the electrical characteristics of the fabricated devices, a bias was applied to the top electrode while the bottom electrode was grounded. The electrical characteristic measurements were performed using Keithley 4200 SPA (DC sweep mode), Keithley 4225-PMU (pulse generator), and 4225-RPM (remote amplifier/switch) in air. TEM Analysis. The cross-sectional TEM sample of memristor crossbar array devices were prepared using a focused ion beam (FIB, Helios 600). HRTEM images and EDS maps of Cu filament were conducted in a JEOL ARM 300F transmission electron microscope at an accelerating voltage of 300 kV. Electro-thermal Simulation. COMSOL Multiphysics software was used to investigate the temperature and electric field distributions in the flexible pV3D3 memristor according to the geometry of the filament. The physical model for the temperature and the electric field distributions were computed by an electro-thermal method using the following equation for the electric field E in the memristor.


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‫ ܧ‬ൌ െߘܸǡ where V is the electric potential. The mathematical equation for the heat transfer is ߩ‫ܥ‬

߲ܶ െ ߘ ή ሺ݇ߘܶሻ ൌ ܳǡ ߲‫ݐ‬

where ߩ is the density, ܶ is the temeparture, ‫ ܥ‬is the heat capacity, ݇ is the absolute thermal conductivity, ‫ ݐ‬is the time, and ܳ is the heat flux. The heat generated by the Joule heating ܳ is ܳൌ

ͳ ଶ ȁ‫ܬ‬ȁ ൌ ߪȁܸȁଶ ǡ ߪ

where ߪ is the conductivity and ‫ ܬ‬is the current density. The temperature distributions were numerically computed from the current density.

Acknowledgement This research was supported by the Global Frontier Center for Advanced Soft Electronics (CASE2011-0031640 and CASE-2011-0031638), the Brain Korea 21 Plus Project of School of Electrical Engineering of KAIST in 2018, and the Creative Research Program of the ETRI (18ZB11400). This work also made use of the EPIC facility of Northwestern University’s NUANCE Center, which has received support from the Soft and Hybrid Nanotechnology Experimental (SHyNE) Resource (NSF ECCS-1542205); the MRSEC program (NSF DMR-1121262) at the Materials Research Center; the International Institute for Nanotechnology (IIN); the Keck Foundation; and the state of Illinois, through the IIN.

Author Contributions B.C.J., S.K. and S.Y.Y. contributed equally to this work. B.C.J., S.K., S.Y.Y. and S.Y.C. designed and supervised the experiments on the concept. B.C.J. and S.Y.Y. fabricated the devices. J.C. and S.G.I. deposit pV3D3 thin film. B.C.J. performed electrical characterization, and S.K. and V.P.D. performed the TEM characterization. J.P. performed the face classification simulation. J.H.C. and


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J.O. helped with the simulation and discussed the work. S.Y.C. supervised the overall experiments. All these authors wrote the manuscript and commented on the manuscript at all stages.

Competing Interests The authors declare no competing financial interests.

Supporting Information The Supporting Information is available free of charge on the ACS Publications website at DOI: 10.1021/acs.nano-lett.xxxxxxx. Electrical and mechanical characteristics of the binary pV3D3 memristor, discussion about the method of gradual increase of compliance current for the formation of thin filament, synaptic behaviors of pV3D3 memristor, discussion about voltage and current sweep modes, details about the device-to-simulation for the face classification, conductance distributions of the synapse array for the class 2 and 3 persons, and the pattern recognition results for MNIST handwritten digits (PDF)

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Table of Contents Figure


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Polymer Analog Memristive Synapse with Atomic ... - ACS Publications

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