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Jul 2, 2015 - ABSTRACT: We report on the gigahertz radio frequency. (RF) performance of chemical vapor deposited (CVD) monolayer MoS2 field-effect ...
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Radio Frequency Transistors and Circuits Based on CVD MoS2 Atresh Sanne,*,† Rudresh Ghosh,† Amritesh Rai,† Maruthi Nagavalli Yogeesh,† Seung Heon Shin,† Ankit Sharma,† Karalee Jarvis,‡ Leo Mathew,§ Rajesh Rao,§ Deji Akinwande,*,† and Sanjay Banerjee*,† †

Microelectronics Research Center and ‡Texas Materials Institute, University of Texas at Austin, Austin, Texas 78712, United States Applied Novel Devices Inc., Austin, Texas 78717, United States

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S Supporting Information *

ABSTRACT: We report on the gigahertz radio frequency (RF) performance of chemical vapor deposited (CVD) monolayer MoS2 field-effect transistors (FETs). Initial DC characterizations of fabricated MoS2 FETs yielded current densities exceeding 200 μA/μm and maximum transconductance of 38 μS/μm. A contact resistance corrected low-field mobility of 55 cm2/(V s) was achieved. Radio frequency FETs were fabricated in the ground−signal−ground (GSG) layout, and standard de-embedding techniques were applied. Operating at the peak transconductance, we obtain short-circuit current-gain intrinsic cutoff frequency, f T, of 6.7 GHz and maximum intrinsic oscillation frequency, f max, of 5.3 GHz for a device with a gate length of 250 nm. The MoS2 device afforded an extrinsic voltage gain Av of 6 dB at 100 MHz with voltage amplification until 3 GHz. With the as-measured frequency performance of CVD MoS2, we provide the first demonstration of a common-source (CS) amplifier with voltage gain of 14 dB and an active frequency mixer with conversion gain of −15 dB. Our results of gigahertz frequency performance as well as analog circuit operation show that large area CVD MoS2 may be suitable for industrial-scale electronic applications. KEYWORDS: MoS2, CVD, field-effect transistor, radio frequency, high-k, circuits

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Ion/Ioff > 108 with mobilities exceeding 80 cm2/(V s).20 Additionally, exfoliated monolayer MoS2 FETs have exhibited current saturation with on-state current densities of 300 μA/ μm, as well as transconductance exceeding 40 μS/μm.20 While the mobility of MoS2 is lower than graphene, the intrinsic bandgap in MoS2 has resulted in voltage gain, Av = gm/gds, greater than 30.21 Moreover, theoretical calculations predict electron saturation velocities greater than 3 × 106 cm/s,22 which is sufficient to afford GHz transit frequencies at submicron channel lengths.9 These properties make MoS2 a desirable candidate for RF applications. Initial work on exfoliated monolayer MoS2 RF FETs yielded an f T of 2 GHz and f max of 2.2 GHz at a gate length of 240 nm,20 while multilayer flakes have achieved an f T of 42 GHz and f max of 50 GHz at a gate length of 68 nm.21 A previous study on chemical vapor deposited (CVD) MoS2 presented high frequency measurements and achieved an f T of 900 MHz and f max of 1 GHz at a gate length of 300 nm.23 Simulations predict that much higher cutoff frequencies are possible as MoS2 transistor channel lengths are scaled down to gate lengths of ∼15 nm.24 A wide array of both analog and digital electronic circuits based on MoS2 have been demonstrated.21,25

ince the successful mechanical exfoliation and characterization of graphene,1 there has been a renewed interest in two-dimensional layered materials (2DLMs). In the case of graphene, the high intrinsic mobility, large current densities, and ambipolar electron−hole symmetry have pointed toward its potential for radio frequency (RF) applications.2−7 Initial investigations have shown graphene-based radio frequency field-effect transistors (RF FETs) reaching transit frequencies, f T, in excess of 400 GHz.2 However, the Dirac cone band structure of graphene results in a zero bandgap, which limits current saturation in graphene devices, leading to reduced voltage and power gains.3 As a result, the maximum frequency of oscillation, f max, is much less than the f T in graphene devices, reducing the performance of power amplifiers in which the highest operating frequency is f max. Alongside graphene there has been a renewed interest in other 2DLMs. Of the 2DLMs, the family of transition metal dichalcogenides (TMDs) with the general chemical formula MX2 (M = metal, X = chalcogen) have been of special interest. Molybdenum disulfide (MoS2) is one such TMD with thickness-dependent physical properties that have opened up applications in the fields of optoelectronics, 8 flexible electronics,9,10 spintronics,11 and coupled electro-mechanics.12 MoS2 is a 2D semiconductor with a bulk indirect bandgap of ∼1.3 eV, and a direct bandgap of ∼1.8 eV for a single layer.13−15 Using high-k dielectrics and substrate/superstrate engineering,16−19 exfoliated monolayer MoS2 FETs have shown © XXXX American Chemical Society

Received: March 18, 2015 Revised: June 16, 2015

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DOI: 10.1021/acs.nanolett.5b01080 Nano Lett. XXXX, XXX, XXX−XXX

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Figure 1. CVD MoS2 material characterization. (a) Raman spectra of CVD MoS2. The E12g peak is at 383.5 cm−1 and the A1g at 403.1 cm−1, corresponding to a delta of 19.6 cm−1. (b) Photoluminescence spectra of CVD MoS2. There is a peak at 663 nm (1.87 eV) and a smaller peak at 623 nm (1.99 eV) corresponding to the A and B excitons. (c) FFT corrected high resolution TEM image of monolayer CVD MoS2 with lattice spacing of 0.27 nm. The inset shows the diffraction pattern from the same area. (d) Large area MoS2 growth in the mm2 scale.

MoS2. The strong peak around 663 nm (1.87 eV) and a much smaller peak around 623 nm (1.99 eV) correspond to the A and B excitons and are similar to those observed for exfoliated monolayer MoS2.35 TEM was used in order to evaluate the crystallinity of the CVD MoS2. Figure 1c shows the FFT filtered high resolution TEM image of monolayer MoS2, while the inset shows the selected area electron diffraction (SAED) of the same region. The hexagonal lattice structure and the lattice spacing of 0.27 nm is as expected from crystalline MoS2. By controlling the local concentration of the starting material we can grow pseudocontinuous uniform monolayer films at the mm2 scale (Figure 1d). Growth details are provided in the Supporting Information (SI). Top-gated CVD MoS2 FETs in the ground−signal−ground (GSG) layout for high-frequency characterization were fabricated as follows. Monolayer MoS2 domains grown on highly resistive Si/SiO2 substrates were identified using a combination of optical contrast, Raman spectroscopy, and atomic force microscopy (AFM). Device active regions were defined using electron beam lithography (EBL). Excess MoS2 was etched using Cl2 plasma. Next, source/drain metal electrodes were defined with EBL. A stack of Ag/Au (20 nm/30 nm) was deposited as low-work function (4.26 eV) source/drain metal electrodes. It has been shown that asdeposited Ag films on MoS2 result in a smooth and dense interface, thereby facilitating electron injection in the MoS2 channel.36 Atomic layer deposition (ALD) was used to deposit a 30 nm thick layer of HfOx with dielectric constant k ≈ 18 as the top gate dielectric. The top gate electrode was then defined using a final EBL step. The top gate metal fingers were formed with 50 nm of Ni. Figure 2a shows an optical image of the final device structure in the GSG configuration. Figure 2b shows a cross-sectional schematic of the GSG MoS2 FET. The gate

Similar to the initial work done on graphene, most device characterizations using MoS2 have utilized exfoliated samples.26,27 However, in order for MoS2 based devices to move from laboratory studies to industrial scale applications, large area growth of high quality material is needed. Different methods including liquid exfoliation28 and direct sulfurization of molybdenum thin films29 have been successfully used to synthesize large MoS2 monolayers. However, the overall simplicity and the high quality of films obtained using the sulfurization of MoO3 have made it the most widely used method of synthesizing monolayer MoS2.30−32 In this letter, we demonstrate high performance RF FETs based on CVD monolayer MoS2 using the sulfurization of MoO3. With operating frequency in the GHz range, we are able to realize amplifiers and frequency mixers with fabricated CVD MoS2 FETs. Chemical vapor deposited MoS2 was grown directly onto a precleaned 285 nm thick SiO2 surface on a highly resistive Si wafer (>5000 Ω·cm). As shown in Figure 1, thickness and material quality of the films were characterized using a combination of Raman spectroscopy, photoluminescence spectroscopy (PL), and transmission electron microscopy (TEM). From the Raman spectrum in Figure 1a, we note that the E12g peak is at 383.5 cm−1 and the A1g peak at 403.1 cm−1. This corresponds to a delta (Δ) of 19.6 cm−1, which is characteristic of CVD grown monolayer MoS2.33 The full width at half-maximum (fwhm) of the E12g and A1g peaks is an indicator of the material quality of the film.34 From the Raman spectrum, we measure a fwhm of 4.6 cm−1 for the E12g peak and 5.9 cm−1 for the A1g peak, which is similar to that reported for other CVD grown MoS2 samples.29 The strong signal obtained from the PL spectroscopy in Figure 1b further confirms the existence of a direct band gap that is expected in monolayer B

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and extrinsically to doping resulting from the interfacial O vacancies at the MoS2−HfOx interface.37 As a result of the oxygen vacancies, the uncompensated Hf atoms at the MoS2 surface lead to the creation of donor states near the conduction band of monolayer MoS2, resulting in n-type charge transfer doping.38−40 The Hf/O ratio in our ALD HfOx film was estimated to be ∼1:1.56 from X-ray photoelectron spectroscopy (XPS), thereby confirming the oxygen deficiency. Furthermore, the doping of the MoS2 channel upon ALD HfOx encapsulation was confirmed by the red shift and peak broadening of the out-of-plane A1g Raman mode of MoS2.41 It can be surmised that this interfacial oxygen vacancy-mediated doping of MoS2 by the as-deposited ALD HfOx layer is primarily responsible for the enhanced performance of our CVD MoS2 FETs. This n-doping would help reduce the contact resistance due to thinning of the Schottky barrier width along the Ag−MoS2 contact regions. Moreover, the increased electron sheet density in the MoS2 channel would result in improved screening of the substrate charged impurities and softening of the A1g phonon modes of MoS2, even before the application of external electrostatic biases. From the Ids−Vds output curves it is evident that the device is still dominated by a Schottky contact between the metal and the MoS2. Figure S6d is an energy band diagram of the MoS2 device showing the barrier at the Ag−MoS2 interface. The Schottky barrier height for a MoS2 device was determined from the Ids−Vgs transfer curves taken at various temperatures from 83 K to room temperature (Figure S6a). Using an Arrhenius plot (Figure S6b) and the thermionic emission current equation, the barrier height was extracted for each applied gate voltage. The point at which the barrier height deviates from a linear relationship with the gate voltage is the flatband voltage, VFB, and the true Schottky barrier height.26 From Figure S6c, the Schottky barrier height was measured to be ∼0.07 eV. The inset of Figure 3a shows the gm−Vgs transconductance curves for our CVD MoS2 FET. The device achieves a maximum gm of 38 μS/μm at Vgs = −4.5 V and Vds = 3.5 V. Using the Ids−Vgs transfer curves at a low-field Vds of 0.01 V and the TMD FET device model presented in ref 42, we extract estimates for mobility and contact resistance to be μFE = 55 cm2/(V s) and Rc = 2.5 kΩ·μm (Figure S3a). To investigate further, a four point (4 pt.) CVD MoS2 FET (L = 4 μm, W = 5 μm) was fabricated in parallel. From this 4 pt. device a μ of 63 cm2/(V s) and an Rc of 2 kΩ·μm were extracted (Figure S3b).

Figure 2. RF MoS2 FET layout and structure. (a) Optical image of a CVD MoS2 FET in the ground−signal−ground structure (GSG) required for high frequency measurements. The inset shows a zoomed in layout of a device with Lg = 250 nm and W = 20 μm. (b) Crosssectional view of the MoS2 transistor highlighting the underlap regions used to eliminate parasitic capacitances. The SiO2 layer is 285 nm thick, and the HfOx layer is 30 nm thick.

length (Lg) of all our devices was 250 nm and was verified using AFM after device fabrication. Underlap regions of 100 nm were left on either side of the gate to prevent parasitic source/drain capacitances. However, these access regions add to the overall contact resistance of the device. Measurements presented in this letter were taken in ambient conditions. Figure 3a,b shows the Ids−Vgs transfer characteristics and Ids− Vds output characteristics of a monolayer MoS2 FET with a width, W, of 20 μm. The device achieves current densities of 200 μA/μm at Vgs = 5 V and Vds = 3.5 V. The threshold voltage (Vth) is around −9 V, indicating unintentional n-type doping of the MoS2 during growth and fabrication. This is common for both CVD and exfoliated MoS2 devices, which in recent studies has been attributed intrinsically to sulfur vacancies in the MoS2

Figure 3. CVD MoS2 DC characterization. The back gate was grounded in all measurements. (a) Ids−Vgs transfer curves of a CVD MoS2 RF FET. The current density exceeds 200 μA/μm at Vgs = 5 V and Vds = 3.5 V. The inset is the gm−Vgs transconductance curves. The peak gm is 38 μS/μm biased at Vgs = −4.5 V and Vds = 3.5 V. (b) Ids−Vds output curves of a CVD MoS2 RF FET. The Vds is swept from 0 to 4 V with different Vtg. The Vtg is swept from −5 to 5 V in steps of 1 V. These curves are used to find the minimum drain conductance gds from which the voltage gain Av = gm/gds is determined. C

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Figure 4. CVD MoS2 frequency performance of a device with Lg = 250 nm operating at the peak gm point. (a) Short circuit current gain |h21| vs frequency showing an extrinsic f T of 2.8 GHz and an intrinsic f T of 6.7 GHz. The device shows good linearity with the expected −20 dB/dec slope. (b) Maximum frequency of oscillation f max vs frequency showing an extrinsic f max of 3.6 GHz and an intrinsic f max of 5.3 GHz. (c) Voltage gain Av expressed in Z-parameters as Av = Z21/Z11 vs frequency. The Av is 6 dB at the minimum frequency 100 MHz, and voltage gain is realized until 3 GHz. (d) Extrinsic f T and f max as a function of gate length. The dashed line is a fit of the f T−length data to a 1/L line.

saturation (vsat).22 In this limit, f T scales inversely with channel length, and hence, the frequency−length ( f T·Lg) product is a useful metric for device performance benchmarking. Our device RF measurements correspond to an f T·Lg metric of ∼1.68 GHz·μm, which is within the expected range for MoS2.9 Furthermore, from the maximum f T achieved, the carrier saturation velocity vsat can be estimated using the high-field expression vsat = (Lg/τ) = 2πf TLg, where τ is the carrier transit time.9 Using the device gate length of 250 nm, we extract vsat ≈ 1.1 × 106 cm/s. This result is within a factor of four of theoretical estimates of monolayer MoS2 saturation velocities based on DFT and Monte Carlo simulations.22,43 The saturation velocity can also be extracted from the f T−length relationship when fit to a 1/L line. The dashed line in Figure 4d is the fit from which vsat ≈ 1.0 × 106 cm/s is extracted, which agrees well with the single point extraction. Figure S7 is the effective velocity as a function of horizontal electric field (Vds) for the RF MoS2 device. It can be seen that the velocity does not change much in the high field regime of Vds > 3.5 V. At these high electric fields the carrier velocity in the MoS2 increases beyond the optical phonon energy. This increases the probability of carriers to emit an optical phonon, resulting in increased optical phonon scattering. The optical phonon scattering causes the carrier velocity to saturate with increased electric fields. Another figure of merit for high-frequency transistors is the maximum frequency of oscillation, f max. This is the frequency limit at which there is power gain given matched input and output impedances and can be expressed with eq 2 of the SI. The f max of a FET depends on the drain conductance gds, which in turn depends on the saturation characteristics at the device operating point. The maximum available gain (MAG) was obtained from the measured S-parameters and is shown in Figure 4b. Operating at the same DC bias point, we measure an

These values are better than those extracted from the RF device due to full channel modulation and accurate decoupling of the channel from contact resistance. The radio frequency performance of CVD MoS2 can be evaluated from the transit frequency f T. The frequency at which the current gain (|h21|) is unity (0 dB) is the f T of the device and can be expressed by eq 1 in SI. In order to measure the transit frequency, an Agilent Microwave Network Analyzer (VNA-E8361C) was used for RF characterization in the range of 100 MHz to 10 GHz. To determine the intrinsic frequency performance of CVD MoS2 FETs, standard OPEN and SHORT structures (Figure S4a,b) were used to de-embed parasitic capacitances and resistances. These structures were fabricated in close vicinity to the device-under-test (DUT) on the same substrate with identical layouts. The as-measured Sparameters were extracted from a monolayer CVD MoS2 device with Lg = 250 nm and W = 20 μm. The short circuit current gain |h21| vs frequency is shown in Figure 4a. Operating at Vgs = −4.5 V and Vds = 3.5 V corresponding to the maximum gm point, the device extrinsic f T is measured to be 2.8 GHz. After applying de-embedding parameters, the intrinsic f T reaches 6.7 GHz. The device shows good linearity in the log-scale with the expected −20 dB/dec slope. MoS2 RF FETs with varying gate lengths were fabricated in parallel to examine the scaling of cutoff frequency with length. Figure 4d shows the extrinsic f T for device gate lengths from 200 nm to 1 μm. The f T−length relationship follows a 1/L dependence as seen in exfoliated MoS2.21 This is expected for devices in the high-field limit where carrier transport is determined by velocity saturation. Following eq 1, a higher f T can be achieved by improving the gm (by shortening the Lg), optimizing the layout to reduce parasitic capacitances, and reducing the contact resistance. The lateral electric field used for f T measurement is in the high-field limit where carrier transport is determined by velocity D

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Figure 5. Implementation of a common-source amplifier using CVD MoS2. (a) Schematic for a CS amplifier showing the input applied to the gate and the output at the drain using bias tees to set the DC operating point. (b) Applying an input sine signal at 1.4 MHz with a peak-to-peak voltage Vpp = 100 mV, we measure an output signal of Vpp = 500 mV. This corresponds to a voltage gain Av = 5 (14 dB).

Figure 6. Implementation of an active frequency mixer using CVD MoS2. (a) Schematic for a mixer showing an input RF signal power combined with an input local oscillator (LO) signal. The drain output is low-pass filtered and fed to an oscilloscope. (b) Output FFT of a CVD MoS2 mixer showing the input RF and LO signals and the expected intermediate frequency (IF = RF − LO) along with all the expected harmonics (2RF + LO, 2LO − RF...). The green arrow represents the IF conversion gain, which after removing the signal gain is about −15 dB. (c) IF output power as a function of LO power. The MoS2 mixer shows good linearity.

extrinsic f max of 3.6 GHz. Using the same de-embedding procedure, the intrinsic maximum oscillation frequency is extracted to be f max = 5.3 GHz. The f max−length relationship is shown in Figure 4d. The scaling of f max does not follow the same 1/L trend as f T. This is because individual device parameters such as gate resistance and output conductance affect the f max for any particular gate length. Following eq 2, the f max can be further improved by operating the device in deeper saturation to reduce gds, by using a thicker gate metal to reduce gate resistance, and by reducing the access resistance at the contacts. In amplifier design, it is important to know the intrinsic voltage gain Av. The intrinsic voltage gain can be extracted from DC measurements as Av = gm/gds. The voltage gain can also be measured as a function of frequency by converting the Sparameters to impedance Z-parameters. Figure 4c shows the measured extrinsic and intrinsic voltage gain Av = Z21/Z11. At 100 MHz, the extrinsic voltage gain is equal to 6 dB, and voltage gain is realized until a frequency of 3 GHz.

High mobility, current saturation, GHz frequency performance (f T and f max), and high voltage gain motivated us to implement analog circuits using our monolayer CVD MoS2 FETs. We designed and fabricated a common source (CS) amplifier and an active mixer using CVD monolayer MoS2 for the first time. The schematic of the CS amplifier is shown in Figure 5a. An RF input (Vin) is applied to the gate terminal of the FET, and the drain output (Vout) is connected to an oscilloscope (1 MΩ load). Bias tees were used for routing the DC bias and AC signals. The MoS2 FET is biased at the same maximum transconductance point (Vgs = −4.5, Vds = 3.5). Applying an input sine wave at 1.4 MHz, we measure a voltage gain (Av = Vout/Vin) of 14 dB (Figure 5b). With proper RF impedance tuners and noise matching circuits, we expect operation of low noise amplifiers (LNAs) in the GHz range. The gain and frequency of the CS amplifier can be increased by optimizing the layout to reduce parasitic contact resistance and by employing a cascode circuit topology to mitigate parasitic capacitance effects.44 E

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We also demonstrated for the first time an active RF mixer using MoS2, which is depicted in Figure 6a. Figure S5a shows the mixer measurement setup. The MoS2 FET is biased in deep saturation where the drain current has a strong nonlinear relationship with gate voltage. Equations 5 through 7 of SI provide a brief analysis of the mixer operation. We used a power combiner to combine a 1.4 MHz RF signal with a 1.1 MHz local oscillator (LO) signal. This combined signal is fed to the gate terminal of the MoS2 FET. The drain output of the FET is connected to an oscilloscope where we expect to see first-order intermodulation products RF-LO and RF+LO, and all higher order mixer terms and harmonics. In a typical mixer system, an appropriate filter is used at the output to filter out unwanted frequency components and allow only the desired signal, usually the intermediate frequency (IF = RF-LO). Figure 6b shows the frequency spectrum of the MoS2 mixer output. It can be seen that the mixer is able to both upconvert and downconvert the inputs. Subtracting the gain provided by MoS2 FET, we measure a conversion gain of about −15 dB. With improved layout and impedance tuners, higher conversion gain should be accessible. Figure 6c shows the mixer IF output power as a function of LO power. The MoS2 mixer shows good linearity, with a conversion gain between −12 dB and −16 dB. These results are promising for CVD MoS2 low power superheterodyne mixers, modulators and demodulators, and radio receivers. Furthermore, this mixer is a single transistor mixer, and further research is warranted to achieve differential amplifiers than can enable advanced mixer circuits such as the Gilbert cell topology that is widely used in contemporary CMOS circuits. In conclusion, we fabricated CVD MoS2 FETs designed for high frequency operation. We achieved a peak transconductance of 38 μS/μm, leading to a contact resistance corrected mobility of 55 cm2/(V s). We performed RF measurements on the CVD MoS2 devices using standard de-embedding structures to determine the intrinsic performance. Our devices with Lg = 250 nm show the largest reported CVD MoS2 intrinsic transit frequencies of 6.7 GHz and intrinsic maximum oscillation frequencies of 5.3 GHz. A saturation velocity of 1.1 × 106 cm/s was extracted from the transit frequency. In addition, we provide the first demonstration of a common-source (CS) amplifier and an active frequency mixer based on CVD MoS2. This work represents a step forward in realizing CVD MoS2 for large-scale high speed electronics circuit applications.

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ACKNOWLEDGMENTS The authors would like to thank the Army Research Office for partial support of this work under STTR award number W911NF-14-P-0030. This work was also supported by the NSF NERC NASCENT and the NSF NNIN program. D.A. acknowledges the support of the Office of Naval Research (ONR). The authors would also like to thank Kevin Melin for useful discussions and simulations.

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ASSOCIATED CONTENT

S Supporting Information *

Description of material preparation, large area growth, device characterization tools and techniques, mobility and contact resistance calculation, four point device characterization, deembedding methods, mixer analysis, and equations. The Supporting Information is available free of charge on the ACS Publications website at DOI: 10.1021/acs.nanolett.5b01080.

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AUTHOR INFORMATION

Corresponding Authors

*E-mail: [email protected]. *E-mail: [email protected]. *E-mail: [email protected]. Notes

The authors declare no competing financial interest. F

DOI: 10.1021/acs.nanolett.5b01080 Nano Lett. XXXX, XXX, XXX−XXX

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DOI: 10.1021/acs.nanolett.5b01080 Nano Lett. XXXX, XXX, XXX−XXX