pubs.acs.org/NanoLett
Resistive Switches and Memories from Silicon Oxide Jun Yao,† Zhengzong Sun,‡ Lin Zhong,*,§,| Douglas Natelson,*,§,⊥ and James M. Tour*,‡,| †
Applied Physics Program through the Department of Bioengineering, ‡ Department of Chemistry, § Department of Electrical and Computer Engineering, | Department of Computer Science, and ⊥ Department of Physics and Astronomy, Rice University, 6100 Main Street, Houston, Texas 77005 ABSTRACT Because of its excellent dielectric properties, silicon oxide (SiOx) has long been used and considered as a passive, insulating component in the construction of electronic devices. In contrast, here we demonstrate resistive switches and memories that use SiOx as the sole active material and can be implemented in entirely metal-free embodiments. Through cross-sectional transmission electron microscopy, we determine that the switching takes place through the voltage-driven formation and modification of silicon (Si) nanocrystals (NCs) embedded in the SiOx matrix, with SiOx itself also serving as the source of the formation of this Si pathway. The small sizes of the Si NCs (d ∼ 5 nm) suggest that scaling to ultrasmall domains could be feasible. Meanwhile, the switch also shows robust nonvolatile properties, high ON/OFF ratios (>105), fast switching (sub-100-ns), and good endurance (104 write-erase cycles). These properties in a SiOx-based material composition showcase its potentials in constructing memory or logic devices that are fully CMOS compatible. KEYWORDS Silicon oxide, filament, nonvolatile, memory, resistive, switching
A
s conventional electronics scaling approaches its limit due to the increasing difficulties in manipulating charge at shrinking sizes,1,2 memory and logic devices based on new materials and concepts3-5 have been pursued in the ever-increasing demand for capacity. The particular interest in two-terminal electrical switches as building elements for memory and logic applications lies in their simple structures that can provide “equivalent scaling” such as multilayer stacking6,7 to achieve high density. While a picture of conductance change induced by an electrical or electrochemical process is generally acknowledged in various resistive switches,8,9 the lack of the actual visualization of the switching path,7 particularly its material composition, adds to the debates over the mechanisms.10 The difficulty is partially attributed to the localized nature of the switching. While nanoscale local switching is promising for device scaling,11 the small switching volume makes it challenging to find the precise active sites. In applications, since addressing each switch unit requires an access device such as a transistor or a diode,12 there is much interest in the integration of resistive switches with complementary metal oxide semiconductor (CMOS) technology.8,13 Here we demonstrate that resistive switches can be built solely from SiOx, and in particular visualize the formation of a Si nanocrystalline pathway in the SiOx matrix at the switching site, providing insight into the mechanism. The insulating properties of SiOx have been widely used in constructing memory devices, for example, as an energy
barrier for charge control in flash memories. While substantial conduction and negative differential resistance were observed in Si-rich SiO systems back in the 1960s,14,15 the exclusive use of metal electrodes and lack of means of characterizations at the nanoscale often led to a mechanistic picture of conduction through metal filaments from the electrodes.14 Even until now, this view is largely unchanged in various electrical switches; the switching was exclusively attributed to filaments from the electrodes with SiOx merely considered as a passive and supporting medium,16-21 although electrode-independent switching was recently revealed.22 The switches demonstrated here show how SiOx alone has the capability to function actively as a resistive switching material with a mechanism that is radiation resilient and not based on charge. By forcing a localized switching site using a carbon nanotube (CNT) for the mechanistic study, we observe that the switching correlates with the formation of a pathway of Si NCs embedded in the SiOx matrix, with SiOx itself also serving as the source of the formation of this Si pathway. The small sizes of the Si NCs (d ∼ 5 nm) suggest that scaling to ultrasmall domains could be feasible. Meanwhile, the switch also shows robust nonvolatile properties, high ON/OFF ratios (>105), fast switching (sub-100 ns) and good endurance (104 write-erase cycles). These properties in a SiOx-based material composition showcase its potentials in constructing memory or logic devices that are fully CMOS compatible. The switch is initially demonstrated in a vertical configuration, with a thin layer of SiOx (40 nm, x ) 1.9-2) sandwiched between two p-doped poly-Si layers (70 nm thick, F ) 0.005 Ω cm) that serve as the top and bottom electrodes, respectively (Figure 1a,b). Nonmetallic electrodes
* To whom correspondence should be addressed,
[email protected], natelson@ rice.edu, and
[email protected]. Received for review: 06/28/2010 Published on Web: 08/31/2010 © 2010 American Chemical Society
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FIGURE 1. Device structures and electrical characterizations. (a) Schematics of the poly-Si/SiOx/poly-Si devices (50 µm diameter) and the electrical characterization setup. (b) An optical top-view image of the device arrays (top panel) and a scanning electron microscope (SEM) image of the cross section (bottom panel). (c) Characteristic IVs in a formed device: (blue curve) starting from an OFF state, the conductance of the device suddenly increases at +3.5 V and drops at +8 V. During a subsequent reverse voltage sweep (gray curve), the conductance goes back to a higher value at +8 V, producing a current hysteresis. Corresponding “read”, “set”, and “reset” regions are defined based on these conductance changes. The vertical dashed line indicates the ON/OFF ratio at 1 V. Inset: device resistance changes after +6 and +13 V programming voltage pulses. (d) (Top panel) A series of voltage pulses of +13, +1 (5 times), and +6 V serve as reset, read (5 times), and set operations, respectively. (Bottom panel) currents corresponding to each voltage pulse in the top panel.
were chosen to avoid metal filament formation. The diameters of the devices are 50 µm for an easy probe-tip landing. Electrical characterizations were performed at room temperature in vacuum (10-5 Torr), unless otherwise specified. The typical current-voltage relationship (IV) shows resistive switching behavior featuring conductance jump and drop at ∼3.5 and ∼8 V, respectively (blue curve in Figure 1c). The voltages at these two events define the set and reset regions8 as indicated in Figure 1c. For example, a voltage pulse (+6 V) in the “set” region switches the device into a lowresistance (ON) state whereas a voltage pulse (+13 V) in the “reset” region switches the device into a high-resistance (OFF) state (inset in Figure 1c). The pulse width can be as short as 50 ns for a reset process and 100 ns for a set process (see Figure S1 in Supporting Information). The programmed states are nonvolatile and can be read nondestructively in the “read” region. Figure 1d shows a series of switching cycles with an ON/OFF ratio >105, which is also inferred in the hysteretic IVs in Figure 1c. To understand the mechanism, locating the switching site is necessary. In many resistive switching materials, a forming process is needed to transit the pristine device into a switching state.23-25 The process usually involves limited current or voltage stress, in which a soft breakdown is induced.8 Tracing the forming site is useful as it is directly related to the switching site.24,25 Here the forming is achieved © 2010 American Chemical Society
by a voltage sweep to a high value, within which large current fluctuations take place. Continuous voltage sweeps by gradually reducing the voltages while maintaining the current fluctuations lead to the switching (see Figure S2 in the Supporting Information). A 10 min thermal annealing at 600 °C in vacuum reduces the forming voltages as a result of increased initial conduction (see Figure S3 in the Supporting Information). The annealing-assisted forming process helps to track the location of initial conduction. A control experiment was done in two groups of devices. One group has the same structure as depicted in Figure 1a. The other has all the same parameters except that no vertical edge was made in the SiOx layer (see Figure S4 in the Supporting Information). After annealing under the same conditions, the first group showed the conductance increase that led to the forming process, whereas no conductance increase was observed in the second group (see Figure S4 in the Supporting Information). This control test shows that the forming process is related to the SiOx vertical edge. It also discounts the role of dopant thermal diffusion from the poly-Si electrodes into the bulk SiOx layer. In fact, the annealing-assisted forming can happen at a temperature as low as 400 °C, a temperature too low for dopant diffusion.26 Meanwhile, the high yield (>95% out of 200 devices studied) discounts the possibility of contamination-related switching at the vertical edge intro4106
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(Figure 2d). The edge-induced forming localizes the switching (Figure 2e) around the pore region. By variation of the pore diameters, current scaling properties were also investigated. Notably, the ON current level stayed the same while reducing the diameter from 50 µm to 200 nm (Figure 2f). This indicates that the switching happens locally instead of uniformly along the entire circumference. This is also desirable for the construction of fully CMOS-compatible reprogrammable vias27 to ensure acceptable current passage as the via sizes scale. Although the nonscaling of current with device geometry reveals the filamentary nature of conduction,28 the question remains as to the constitution of the filament. In many cases, electrodes also play essential roles in memory switching by serving as the source of ion injection or providing Schottky interfaces.7,8 Hence, modifying the electrodes can affect the switching or even eliminate it.7 We replaced the poly-Si electrodes by other materials to form different sandwiched structures such as W/SiOx/Si, TiW/SiOx/TiW, and W/TiN/SiOx/ TiN/W. However, all show very similar switching29 (see Figure S6 in the Supporting Information), indicating that the switching is not electrode related and is attributed solely to the SiOx layer. The independence of switching on electrodes in SiOx enables the use of other materials as electrodes that could provide further constriction, since conducting filaments can be strictly confined8,25 and require accurate positioning. Topological change, for example, from a vertical stacking structure to a planar one also eases the mechanistic probing.10 CNTs provide the natural lateral constriction for this mechanistic investigation. By electrical breakdown, a nanogap can be defined.22,30 The CNT-SiOx-CNT nanogap system, with the two broken CNT ends serving as effective electrodes (Figure 3a), shows very similar switching (Figure 3b,c). The switching is attributed to the SiOx at the nanogap region instead of a mechanical switch by the two broken CNT ends because: (1) forming-correlated damage to the SiOx at the nanogap region is always observed (Figure 3d, also see Figure S7 in the Supporting Information for a detailed forming description); (2) the switching is highly repeatable22 whereas mechanical CNT switches normally operate for only a few (104 switching cycles could be achieved, current fluctuations in the OFF states persist (Figure 4c). With the visualization the conduction path, we could do an estimation of the switching speed based on the mechanism we proposed. Consider that during a set process, a region of d ∼ 5 nm involves the reduction process SiOx f Si to rebridge the Si path, a switching time of several tens of nanoseconds could be calculated37 based on the number of charge transfers. The estimation is close to the actual switching speed achieved in the devices (e.g., 100 ns in the set process). This picture is further supported by the fact that a set process cannot be performed in air but can be done in 4108
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defective and thus more subject to leakage. Hence an etched vertical edge in the SiOx layer in the vertical poly-Si/SiOx/ poly-Si structure is necessary to induce the switching. Thermal annealing tends to introduce more defects at the surface thus assisting the forming process. Therefore, the switching is not intrinsically surface-confined. While a smaller x value in the SiOx could result in an easier electroforming process, the Si-pathway picture suggests that once the nanocrystals are formed, the switching is less likely to be x dependent. The Si-pathway picture provides guidance into engineering SiOx (e.g., through local Si doping) to make resistive switches for memory and logic applications. Acknowledgment. D.N. acknowledges the support of the David and Lucille Packard Foundation. L.Z. acknowledges support from the Texas Instruments Leadership University Fund and National Science Foundation Award No. 0720825. J.M.T. acknowledges support from the Army Research Office through the SBIR program administrated by PrivaTran, LLC.
FIGURE 4. Electrical characterizations in pillar structures as depicted in Figure 1. (a) Conduction states (read at +1 V) in 12 devices before (black column) and after (red column) annealing at 700 °C for 10 min in Ar/H2 environment (top panel) and in air (bottom panel). (b) Conduction states (read at +1 V) before (blue) and after (green) X-ray irradiation at a dose ∼2 Mrad in 40 devices, with 20 programmed to OFF (top panel) and 20 programmed to ON (bottom panel). (c) (Top panel) Switching cycles up to 104 by voltage pulses of +6 V (set) and +14 V (reset). The conduction states were read by a voltage pulse of +1 V. (Bottom panel) Switching cycles showing each conduction state after every programming pulse. (d) Retention of the conduction state tested by continuous +1 V voltage pulses (at a rate of 1 pulse s-1) for both an ON (magenta curve) and an OFF (blue curve) state. Dashed lines indicate the extrapolated tendency.
Supporting Information Available. Figures showing switching time, typical forming process, annealing-assisted forming process, annealing effects in devices with and without a SiOx vertical edge, variation in device fabrication and memory switching, resistive switching in vertical SiOx devices, formation of switching in a CNT-SiOx nanogap system, and distribution of the “set” and “reset” regions. This material is available free of charge via the Internet at http://pubs.acs.org.
nitrogen or vacuum (10-5 Torr), indicating that an oxygen environment hinders the reduction. The set process is most likely electrical-field-driven as the set threshold voltages tend to be distributed in a narrow range and is largely independent of OFF conduction (Figure S8 in the Supporting Information), whereas the reset process is more likely to be thermally driven by current local heating. As both Si and SiOx are stable materials, the switch shows robust nonvolatile properties with an extrapolated retention time beyond 10 years (Figure 4d). The CNT electrodes ensure that the only source for the formation of Si NCs is SiOx. This is consistent with the electrode-independent switching in SiOx. As the forming process can induce local crystalline structural changes, it is possible here that the forming process breaks the Si-O bonds to form direct Si-Si bonds, which then aggregate into NCs. Another similar scenario is to consider the movements of oxygen vacancies7,8,38 as the cause of the local material composition change. The forming process is found to be not only field driven but also thermal related. A substantial current level (10-6 A) needs to be reached before a forming process takes place; otherwise a hard breakdown (nonswitchable ON state) is more likely to happen. This indicates that local current heating is also necessary, as heat is found to help Si aggregation in SiOx.39 Consequently, a forming process could not be initialized at temperatures below 150 K in our experiments. The forming process is more readily induced at the surface of the SiOx, as surfaces are more © 2010 American Chemical Society
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