Room-Temperature-Processed Flexible Amorphous InGaZnO Thin

Dec 13, 2017 - School of Electronics and Computer Engineering, Shenzhen Graduate School, Peking University, Shenzhen 518055, China. ‡ Institute ...
56 downloads 7 Views 3MB Size
Forum Article Cite This: ACS Appl. Mater. Interfaces XXXX, XXX, XXX−XXX

www.acsami.org

Room-Temperature-Processed Flexible Amorphous InGaZnO Thin Film Transistor Xiang Xiao,† Letao Zhang,† Yang Shao,† Xiaoliang Zhou,‡ Hongyu He,† and Shengdong Zhang*,†,‡ †

School of Electronics and Computer Engineering, Shenzhen Graduate School, Peking University, Shenzhen 518055, China Institute of Microelectronics, Peking University, Beijing 100871, China



S Supporting Information *

ABSTRACT: A room-temperature flexible amorphous indium−gallium−zinc oxide thin film transistor (a-IGZO TFT) technology is developed on plastic substrates, in which both the gate dielectric and passivation layers of the TFTs are formed by an anodic oxidation (anodization) technique. While the gate dielectric Al2O3 is grown with a conventional anodization on an Al:Nd gate electrode, the channel passivation layer Al2O3 is formed using a localized anodization technique. The anodized Al2O3 passivation layer shows a superior passivation effect to that of PECVD SiO2. The room-temperature-processed flexible a-IGZO TFT exhibits a field-effect mobility of 7.5 cm2/V·s, a subthreshold swing of 0.44 V/dec, an on−off ratio of 3.1 × 108, and an acceptable gate-bias stability with threshold voltage shifts of 2.65 and −1.09 V under positive gate-bias stress and negative gate-bias stress, respectively. Bending and fatigue tests confirm that the flexible a-IGZO TFT also has a good mechanical reliability, with electrical performances remaining consistent up to a strain of 0.76% as well as after 1200 cycles of fatigue testing. KEYWORDS: amorphous indium−gallium−zinc oxide (a-IGZO), thin film transistor (TFT), flexible, anodization, room temperature



and has high penetration rates of O2 and H2O.6 The hightemperature PECVD SiO2 and PECVD SiNx would cause plasma damage and introduce too much hydrogen doping, which is the origin of the thermal instability of the AOS TFTs.9−11 Thus, both gate dielectric and passivation films formed at low temperature with high quality are needed urgently for AOS TFTs, especially the flexible AOS TFTs. On the other hand, the high quality of metal oxides like HfO2, Ta2O5, and Al2O3 can be fabricated by a simple anodization technique at low temperature, which has been applied in the fabrication of capacitors and gate dielectrics.12−14 The anodization formation of gate dielectrics on glass substrates has been investigated intensively. However, the anodization-technique-based dielectrics integration process for AOS TFTs on plastic substrates at full room-temperature has not been conducted so far. In this work, an anodization-based full room-temperature flexible a-IGZO TFT process on a polymeric substrate is developed for the first time, in which both the gate dielectric and passivation layers are grown by anodization. Moreover, a systematic investigation of the full room-temperature flexible a-IGZO TFT is conducted in this work.

INTRODUCTION Flexible and wearable devices have been attracting extensive attention in recent years.1,2 Amorphous oxide semiconductor (AOS) thin film transistors (TFTs) have been considered promising devices of flexible electronics for their high performances, even when fabricated at low temperature. High mobility and superior uniformity make them capable of driving high-resolution and large size active-matrix displays.3 Also, a steep subthreshold swing, low off current, and high gate-bias stress stability also make them outstanding in low-power system-on-panel electronics.4 While high-quality AOS films for channel layers can be deposited at low temperature, the high-quality dielectrics for the gate insulator and passivation layers are difficult to form at low temperature. Although ALD is able to fabricate high-quality dielectrics at low temperature, the large area and high-volume capability are questionable. PECVD and sputtering technologies are available for large area and high-volume production, but it is difficult to produce high-quality dielectrics at low temperature with them. Generally, a temperature over 300 °C is required to improve the dielectric quality, which is not compatible with flexible polymeric substrates.5 Moreover, it has been reported that the electrical performances of AOS TFTs are of large relevance to the properties of the back surface of AOS, especially the gate-bias stress stability.6−8 Thus, a proper back surface protection process and a dense passivation layer are necessary to ensure effective protection of the AOS from the subsequent process and environment atmosphere. However, the low-temperature PECVD SiO2 is usually less dense © XXXX American Chemical Society

Special Issue: Materials and Interfaces for Next Generation Thin Film Transistors Received: August 31, 2017 Accepted: November 27, 2017

A

DOI: 10.1021/acsami.7b13211 ACS Appl. Mater. Interfaces XXXX, XXX, XXX−XXX

Forum Article

ACS Applied Materials & Interfaces

Figure 1. (a) Cross-sectional schematic of the in situ localized anodization process. (b) Three- dimensional schematic of the room-temperatureprocessed flexible a-IGZO TFT on PEN fabricated in this work. (c) The flexible a-IGZO TFT array on 2 in. PEN substrate. (d) Microscopic image of the flexible a-IGZO TFT. (e) Scanning electron microscope image of the flexible a-IGZO TFT. (S: source, D: drain, PR: photoresist).



Measurement. The flexible a-IGZO TFTs were measured in an atmospheric environment at room temperature, a vacuum environment of 1.8 × 10−4 Pa at room temperature, an atmospheric environment at 60 °C, and a vacuum environment of 1.8 × 10−4 Pa at 60 °C using the probe station (ST-500, Janis Ltd., U.S.A.) and a Keithley 4200 semiconductor characterization system (Keithley Ltd., U.S.A.). The mechanical reliability test was conducted by wrapping the flexible substrate around rods with radii ranging from 20 to 5.5 mm. In the bending test, the devices were measured in situ with the flexible substrate around the rods. In the fatigue test, the flexible substrate was bent and reflattened repeatedly, and the devices were measured under the flattened state.

MATERIALS AND METHODS

TFT Fabrication. Cross-sectional schematic, 3D schematic, optical, microscopic, and scanning electron microscope (SEM) images of the flexible a-IGZO TFT fabricated in this work are shown in Figure 1. The fabrication procedures of the TFTs are as follows, and the detailed process flow is shown in Figure S1. First, a 200 nm thick Al:Nd was DC sputtered on a PEN substrate and patterned to form the gate electrode by photolithography and a lift-off technique. A 140 nm thick Al2O3 gate dielectric was then grown from the Al:Nd by the anodization.15 After that, a 40 nm thick a-IGZO for the channel layer and another Al:Nd film for the source/drain electrodes were DC sputtered in succession. Then, as shown in Figure 1a, an in situ localized anodization process was conducted with the source/drain areas covered by photoresist (PR) to convert the Al:Nd film only on the channel regions into Al2O3 film, which served as the channel passivation layer. The underlying a-IGZO channel layer was also modulated in conductivity. This was called back-channel anodization (BCA), in which the Al:Nd in the source/drain region was kept intact (Figure 1a).15 Finally, photolithography and wet etching were used to define the source/drain regions and active island simultaneously (Figure 1b). The completed device array on a 2 in. PEN substrate is shown in Figure 1c. A low O2/Ar flow ratio of 2 sccm/48 sccm was used during the a-IGZO sputtering to obtain a conductive a-IGZO layer. The resistivity of the deposited a-IGZO layer was measured to be around 1.8 × 10−2 Ω·cm, low enough to ensure a sufficient and uniform oxidation of Al:Nd during the back-channel anodization step. Anodization. For the formation of the gate dielectric by anodization, the electrolyte was composed of tartrate acid/H2O/ ammonium solution (25%)/ethylene glycol using the following ratio: 6 g:250 mL:6 mL:750 mL. The pH value of the electrolyte was 7. For the formation of passivation layer by anodization, two kinds of electrolytes were used. One was the neutral electrolyte as described above. The other one was a citric acid solution of 0.1 M. The anodization was conducted in the constant current (CC) mode first.13 Then, a constant voltage (CV) mode was triggered when the anode voltage reached the setting value Va (Figure S2). The CV mode was maintained until the current was low enough. The current density for the anodization of the gate dielectric and passivation layers was ∼0.1 and ∼0.02 mA/cm2, respectively. The Va values for the anodization of the passivation layer ranged from 55∼80 V for different samples.



RESULTS AND DISCUSSION Figure 1a is the schematic of the in situ anodic treatment of Al:Nd (97:3 wt %) on a-IGZO. Also, both the Al2O3 gate dielectric and Al2O3 passivation layer are formed by anodization at room temperature. Figure 1b,c shows the three-dimensional structure and TFT array of the room-temperature-processed aIGZO TFT on PEN, respectively. The process details are presented in the Materials and Methods section. The optical and scanning electron microscope (SEM) images demonstrate that the a-IGZO TFT with a channel length below 4 μm is producible by this localized anodization technique. Furthermore, the lateral oxidation length is less than 200 nm. As is known, the gate dielectric plays a crucial role in AOS TFT, especially in low-temperature-processed AOS TFT. However, the reported low-temperature dielectrics are insufficient for the application requirements.16−22 To address this problem, an anodized dielectric is developed and characterized herein. Figure 2a shows the electrical properties of the anodized Al2O3 dielectric. The leakage current density is below 3.1 × 10−8 A/cm2 under an electric field of 1.67 MV/cm. Figure 2b is the cross-sectional SEM image of the anodized Al2O3 on Al:Nd film. The step coverage of Al2O3 looks good. The breakdown electric field and permittivity are measured to be 5 MV/cm and 9.3, respectively (Figure S3). These properties of the anodized Al2O3 are superior to the lowB

DOI: 10.1021/acsami.7b13211 ACS Appl. Mater. Interfaces XXXX, XXX, XXX−XXX

Forum Article

ACS Applied Materials & Interfaces

Figure 2. (a) Plot of leakage current density versus the bias voltage and electric field strength of the anodized Al2O3. (b) Cross-sectional scanning electron microscope image of the anodized Al2O3 on Al:Nd.

temperature PECVD SiO2 deposited at 150 °C, even comparable to high-temperature PECVD SiO2 deposited at 300 °C and that of ALD23 (Figure S4). The surface roughness scattering is a key factor of the mobility degradation in AOS FET. Although the different surface morphologies of the derived Al:Nd by sputtering with different amounts of power are observed, the anodization seems helpful with smoothing the surface (Figure S5a−h). The atomic force microscope image indicates that the anodized Al2O3 has a surface roughness of 3.62 nm (Figure S5i). The anodization electrolyte species and the anodization voltage (Va in Figure 1a) during the in situ anodization of the Al2O3 passivation layer have significant influences on the electrical performances of the a-IGZO TFT. A neutral electrolyte and a moderate Va are necessary for highperformance a-IGZO TFT (Figures S6 and S7). After optimization, the typical I−V characteristics of the full roomtemperature-processed flexible a-IGZO TFT are shown in Figure 3. The field-effect mobility μFE, subthreshold swing SS, and on−off ratio are 7.5 cm2/(V s), 0.44 V/dec, and 3.1 × 108, respectively. A substantial improvement of the electrical performance of the room-temperature-processed flexible aIGZO TFT is achieved in this work, compared with previous works.21−25 These improvements are attributed to the excellent properties of anodized Al2O3 as shown above and the protective in situ passivation process by anodization, which will be discussed further later. Figure 4 shows the positive gate-bias stress (PBS) stability of the flexible a-IGZO TFT working at room temperature (RT), with (a) and (b) measured in atmosphere and a vacuum of 1.8 × 10−4 Pa, respectively. The PBS is set as VGS = 20 V, VD = VS = 0 V. The VTH shift (ΔVTH) versus the PBS time is plotted in Figure 5. The VTH shift results from three factors, the chargetrapping at the a-IGZO/Al2O3 interface, the state-creation, and the H2O desorption at the back interface. The VTH shifts 2.65 V, and the subthreshold swing (SS) remains unchanged in atmosphere after 3600 s of PBS. The VTH shifts 2.28 V in the vacuum after 3600 s, which is a little smaller than the former shift. This implies that the charge-trapping at the gate dielectric/a-IGZO interface is the main mechanism for the VTH instability,26 and the adsorption of H2O and O2 in a-IGZO TFT is another factor for VTH instability.5,27 However, compared with the charge-trapping at the gate dielectric/aIGZO interface, the influence of H2O desorption is weak, because the difference of the VTH shift between that in atmosphere and that in vacuum is much smaller than the total VTH shift, which indicates the good passivation effect of the in situ anodized Al2O3 on a-IGZO.

Figure 3. Room-temperature-processed flexible a-IGZO TFT device performance. (a) Drain current−gate voltage (IDS−VGS) characteristics. (b) Drain current−drain voltage (IDS−VDS) characteristics.

Figure 4. Positive gate-bias stress (PBS) stability of the roomtemperature-processed flexible a-IGZO TFT on PEN measured at room temperature, (a) in atmosphere and (b) in vacuum environment. The stress voltage is VGS = 20 V, VD = VS = 0 V.

Figure 5. Threshold voltage variations (ΔVTH) of the roomtemperature-processed flexible a-IGZO TFT under positive gate-bias stress (PBS) or positive gate-bias temperature stress (PBTS).

C

DOI: 10.1021/acsami.7b13211 ACS Appl. Mater. Interfaces XXXX, XXX, XXX−XXX

Forum Article

ACS Applied Materials & Interfaces Figure 6 shows the PBS stability at 60 °C (PBTS). The extracted ΔVTH is also plotted in Figure 5. It is seen that the

Figure 8. Threshold voltage variations (ΔVTH) of the roomtemperature-processed flexible a-IGZO TFT under negative gate-bias stress (NBS) or negative gate-bias temperature stress (NBTS).

surface of the device.28 After a bias for 3600 s, the final ΔVTH is −1.09 V in atmosphere and 0.04 V in a vacuum of 1.8 × 10−4 Pa. Also, the SS value increases slightly during the NBS. The SS deterioration indicates that the state-creation occurs during the NBS.29 This also accounts for the negative shift of VTH under NBS. Figure 9 shows the evolution of IDS−VGS curves under NBS at 60 °C (NBTS). Figure 8 shows the ΔVTH versus the stress

Figure 6. Positive gate-bias temperature stress (PBTS) stability of the room-temperature-processed flexible a-IGZO TFT on PEN measured at 60 °C, (a) in atmosphere and (b) in vacuum environment. The stress voltage is VGS = 20 V, VD = VS = 0 V.

VTH shifts more noticeably with the raised temperature and is up to 3.33 V at 60 °C in an atmospheric environment. This might result from the thermal-assisted charge-trapping. At a temperature of 60 °C, the electron injection from a-IGZO into the gate dielectric is intensified and accelerated. Note that the ΔVTH in vacuum (Figure 6b) is larger than that in atmosphere (Figure 6a) at the higher temperature of 60 °C. This seems to conflict with the result at room temperature. As discussed above, the H2O desorption on the back surface of a-IGZO is also responsible for the positive ΔVTH under PBS. It is suggested that the H2O desorption rate gets stronger in vacuum than in atmosphere at the raised temperature. That is, under the PBTS in vacuum, the thermal-assisted H2O desorption could enlarge the ΔVTH. Figure 7 shows the evolution of IDS−VGS curves under negative gate-bias stress (NBS) at room temperature. The NBS

Figure 9. Negative gate-bias temperature stress (NBTS) stability of the room-temperature-processed flexible a-IGZO TFT on PEN measured at 60 °C, (a) in atmosphere and (b) in vacuum environment. The stress voltage is VGS = −20 V, VD = VS = 0 V.

time. It can be seen that the first-stage positive shift of VTH gets less noticeable under the NBTS. This could be attributed to the fact that the hydration-reaction-induced proton transport related to the absorbed H2O is eliminated because of the thermal-assisted H2O desorption at the raised temperature. As shown in Figure 8, the VTH shifts more noticeably under NBTS than that under NBS. This could be ascribed to the enhanced state-creation at the raised temperature. A comparison between the anodized Al2O3 passivated flexible a-IGZO TFT on PEN and the PECVD SiO2 passivated backchannel-etch (BCE) a-IGZO TFT on glass is made in Figure 10. The PECVD SiO2 passivation layer is deposited at 150 °C to reduce the damage of plasma bombardment9 and annealed at 300 °C for 1 h. The evolution of the transfer characteristics of the PECVD SiO2 passivated a-IGZO TFT under PBS and NBS in atmosphere and vacuum environments are shown in Figures S8 and S9, respectively. The difference (ΔVTH,atm − ΔVTH,vac) between the ΔVTH in atmosphere (ΔVTH,atm) and in vacuum (ΔVTH,vac) under gate-bias stress is used to evaluate the effect of the passivation layer quantitatively. As shown in Figure 10, the ΔVTH,atm − ΔVTH,vac is 1.76 V for the SiO2 passivated a-IGZO TFT after a PBS bias for 3600 s. However, it is only 0.37 V for the anodized Al2O3 passivated flexible a-IGZO TFT. The

Figure 7. Negative gate-bias stress (NBS) stability of the roomtemperature-processed flexible a-IGZO TFT on PEN measured at room temperature, (a) in atmosphere and (b) in vacuum environment. The stress voltage is VGS = −20 V, VD = VS = 0 V.

is set as VGS = −20 V, VD = VS = 0 V. The measurement was also conducted in an atmosphere environment and in vacuum, respectively. The ΔVTH is extracted and plotted in Figure 8. The VTH shifts positively first and then shifts reversely. At the beginning of the NBS, the charge-trapping is negligible for the much lower hole concentration in a-IGZO. At the same time, the state-creation is also very weak for the short stress time. So, the influence of H2O becomes apparent at the beginning. The positive ΔVTH is possibly due to the hydration-reaction-induced proton transport, which is related to the absorbed H2O on the D

DOI: 10.1021/acsami.7b13211 ACS Appl. Mater. Interfaces XXXX, XXX, XXX−XXX

Forum Article

ACS Applied Materials & Interfaces

solution-processed metal-oxide TFTs have been published.31−35 Our woks achieved a comparable performance to these works using low-temperature treatment or DUV irradiation. The electrical performances under the mechanical strain state are crucial for flexible TFTs when applied to flexible electronics. Although a-IGZO has a Young’s modulus of 130 GPa, which is similar to that of silicon,40,41 the particular energy band formed by the ns orbital of a-IGZO makes it more tolerant of the structure change to some extent than Si, of which the energy band is made of antibonding and bonding states of sp3 hybridized orbitals.42 So, better mechanical strain properties are expected in a-IGZO TFTs than in Si-based TFTs. The flexible a-IGZO TFT is characterized under bending radii from ∞ (flattened state) to 5.5 mm. The bending direction is parallel to the current flow from drain to source. Figure 11a shows the IDS−VGS curves under different bending radii. The strain ε can be calculated by ε = (Tsub + TTFT)/2R, where Tsub, TTFT, and R are the thickness of substrate, the total thickness of TFT stack, and the bending radius, respectively.43 In this work, Tsub is 125 μm, and TTFT is about 0.34 μm. The calculated ε is 0 (flattened state) ∼ 1.14% (5.5 mm). The variations of electrical parameters μ/μ0, VTH/VTH0, and SS/SS0 are plotted in Figure 11c. The electrical performances do not show apparent degradation when the TFT is bent from the flattened state to 8.2 mm (ε = 0.76%). The slight increase of mobility when aIGZO TFT is bent from R = ∞ to 10 mm is related to the tensile-stress-induced Eg (energy bandgap) decrease, which would result in the mobility increase according to the percolation conduction.42 While R decreases to 5.5 mm (ε = 1.14%), the TFT shows no switch characteristic with an almost constant IDS. However, when it is reflattened, the switch characteristic recovers partially. Unlike our previous work for flexible a-IGZO TFT with a SiO2 gate dielectric,44 the gate leakage current IG remains unchanged in all of the above bending cases (Figure 11b). This suggests that the performance degradation is not caused by the deformation of the gate dielectric. Moreover, we do not observe any visible cracks by optical microscope. We speculate that it is caused by the interface failure between the gate dielectric and a-IGZO. Figure 12a shows the transfer characteristics of the flexible aIGZO TFT under the fatigue test. The bending radius is set as

Figure 10. Difference of ΔVTH in atmosphere (ΔVTH,atm) and in vacuum (ΔV TH,vac ) environment between the anodized Al 2 O3 passivated flexible a-IGZO TFT on PEN and PECVD SiO2 passivated back-channel-etch (BCE) a-IGZO TFT on glass.

ΔVTH,atm − ΔVTH,vac under NBS also shows the same law as that under PBS. The ΔVTH,atm − ΔVTH,vac is −2.72 and −1.13 V for the SiO2 passivated a-IGZO TFTs and anodized Al2O3 passivated flexible a-IGZO TFT, respectively. Thus, it can be concluded that the anodized Al2O3 has a superior passivation effect to the PECVD SiO2. It makes sense that the anodized Al2O3 shows a superior passivation effect to that of the PECVD SiO2. As is known, SiO2 can be fabricated by wet-oxidation of Si. So, the penetration of H2O is comparatively easy in the thermaloxidized SiO2. The penetration rate is even high in PECVD SiO2 deposited at low temperature for the large amount of defects. However, the Al2O3 is dense and shows a low penetration rate of both H2O and O2.30 Therefore, it is reasonable that the penetration rate of H2O is lower in Al2O3 than in low-temperature PECVD SiO2, and the anodized Al2O3 is a good passivation layer for the AOS TFTs. A comparison between our full room-temperature flexible aIGZO TFT with other related works is listed in Table 1. Typically, an on−off current ratio larger than 106 is required for driving AMLCD display. With superior dielectric properties, our full room-temperature a-IGZO TFT has both a lower leakage current and higher on−off current ratio than other IGZO TFT processed at room-temperature, which is crucial for the TFT working at the display panel, especially for driving the AMOLED display. Recently, literatures regarding some novel

Table 1. Comparisons between Our Work with Other Low-Temperature-Processed Metal-Oxide TFTs TFT sample

T (°C)

dielectric

ε

Jleakage (A/cm2) −8

3.1 × 10

μ (cm2/(V s)

ΔVTH (V) @PBS

SS (V/dec)

Ion/Ioff

7.5

0.44

3.1 × 10

2.65

8

this work 36 37 38 16

IGZO

RT

anodized Al2O3

9.3

IGZO IGZO IGZO IGZO

RT RT RT RT

29.5 − − −

1 × 10−5 − − −

61.5 4.1 18 76

0.61 1.4 0.1 0.129

∼105 1.77 × 106 ∼105 6.7 × 105

no no no no

39 18 31

IGZO IGZO IGZO

200 90 60 + DUV

21 − 8.37

1 × 10−5 − 1 × 10−8

22.1 11 5.86

0.18 0.4 0.258

2 × 105 ∼1 × 105 ∼1 × 108

no no 3.605

32

IZO

150 + DUV



7 × 10−8

16.2

0.29

3 × 105

no

33

InOx

150 + DUV



2−6 × 10−8

8.33

0.112

∼3 × 108

no

34 35

InOx/IZO IZO

175/250 180

E-beam Ta2O5 sputtered HfO2 sputtered SiO2 E-beam SiO2/TiO2/SiO2 E-beam HfLaO PECVD SiO2 solution-processed AlOx solution-processed SiO2 solution-processed AlOx − solution-processed LaZrOx/SiOx

− 11.8/5.3

− 1.8 × 10−6

3.14/4.03 24.8

0.158/0.145 0.16

109 4 × 107

1.47/0.29 no

E

DOI: 10.1021/acsami.7b13211 ACS Appl. Mater. Interfaces XXXX, XXX, XXX−XXX

Forum Article

ACS Applied Materials & Interfaces

Figure 11. Characteristics of the room-temperature-processed flexible a-IGZO TFT under different bending radii from ∞ to 5.5 mm. (a) Drain current−gate voltage (IDS−VGS) characteristics. (b) Gate leakage current−gate voltage (IG−VGS) curves. (c) Electrical parameters variation.

Figure 12. Characteristics of the room-temperature-processed flexible a-IGZO TFT under fatigue test. (a) Drain current−gate voltage (IDS−VGS) characteristics. (b) Electrical parameters variation.

12 mm, corresponding to a strain ε of 0.52%. The measurement of the IDS−VGS curves is performed in the reflattened state once the bending cycle is completed. The extracted electrical parameter variations are shown in Figure 12b. After bending for 1200 cycles, the flexible a-IGZO TFT does not show any degradation in electrical performance. These results demonstrate the high mechanical reliability of the room-temperatureprocessed flexible a-IGZO TFT. Furthermore, the mechanical reliability of the flexible a-IGZO TFT can be further improved if a proper encapsulation scheme45 or a thin/elastomeric substrate41 are adopted.



AUTHOR INFORMATION

Corresponding Author

*E-mail: [email protected]. ORCID

Xiang Xiao: 0000-0002-2409-0149 Notes



The authors declare no competing financial interest.



CONCLUSION In conclusion, a full room-temperature flexible a-IGZO TFT process was demonstrated successfully. An anodization technique was used for the growth of the gate dielectric and passivation layers. Both the anodized Al2O3 gate dielectric and passivation layers exhibited superior reliability and passivation effects. The room-temperature-processed flexible a-IGZO TFT showed good static electrical performances and mechanical reliability, as well as acceptable gate-bias stress stability. With the full room-temperature process, this flexible a-IGZO TFT process is very promising for applications in flexible and wearable electronics.



anodization electrolytes; TFT characteristics with different Va; PBS characteristics of BCE a-IGZO TFT; NBS characteristics of BCE a-IGZO TFT (PDF)

ACKNOWLEDGMENTS This work was supported by the National Science Foundation of China under Projects 61574003 and 61774010 and in part by the Guangdong Scientific Program under Grant 2016A030313382.



REFERENCES

(1) Forsythe, E. W.; Leever, B.; Gordon, M.; Vaia, R.; Morton, D.; Durstock, M.; Woods, R. Flexible electronics for commercial and defense applications. IEDM Technol. Dig. 2015, 1−4. (2) Mativenga, M.; Geng, D.; Kim, B.; Jang, J. Fully Transparent and Rollable Electronics. ACS Appl. Mater. Interfaces 2015, 7, 1578−1585. (3) Kwon, J. Y.; Jeong, J. K. Recent progress in high performance and reliable n-type transition metal oxide-based thin film transistors. Semicond. Sci. Technol. 2015, 30, 024002. (4) Lee, S.; Nathan, A. Recent progress in high performance and reliable n-type transition metal oxide-based thin film transistors. Science 2016, 354, 302−304. (5) Kattamis, A. Z.; Cherenack, K. H.; Hekmatshoar, B.; Cheng, I.-C.; Gleskova, H.; Sturm, J. C.; Wagner, S. Effect of SiNx Gate Dielectric Deposition Power and Temperature on a-Si:H TFT Stability. IEEE Electron Device Lett. 2007, 28, 606−608.

ASSOCIATED CONTENT

S Supporting Information *

The Supporting Information is available free of charge on the ACS Publications website at DOI: 10.1021/acsami.7b13211. Process flow; anodization voltage versus time; properties of anodized Al2O3; leakage current density; SEM images of sputtered Al:Nd and anodized Al2O3 and AFM image of anodized Al2O3; TFT characteristics of different F

DOI: 10.1021/acsami.7b13211 ACS Appl. Mater. Interfaces XXXX, XXX, XXX−XXX

Forum Article

ACS Applied Materials & Interfaces (6) Chowdhury, M. D. H; Mativenga, M.; Um, J. G.; Mruthyunjaya, R. K.; Heiler, G. N.; Tredwell, T. J.; Jang, J. Effect of SiO2 and SiO2/ SiNx Passivation on the Stability of Amorphous Indium-Gallium ZincOxide Thin-Film Transistors Under High Humidity. IEEE Trans. Electron Devices 2015, 62, 869−874. (7) Liu, P.-T.; Chou, Y.-T; Teng, L.-F. Environment-dependent metastability of passivation-free indium zinc oxide thin film transistor after gate bias stress. Appl. Phys. Lett. 2009, 95, 233504. (8) Jung, J.; Kim, S. J.; Yoon, D. H.; Kim, B.; Park, S. H.; Kim, H. J. Electrical Responses of Artificial DNA Nanostructures on Solution Processed In-Ga-Zn-O Thin-Film Transistors with Multistacked Active Layers. ACS Appl. Mater. Interfaces 2013, 5, 98−102. (9) Choi, S.-H.; Han, M.-K. Effect of Deposition Temperature of SiOx Passivation Layer on the Electrical Performance of a-IGZO TFTs. IEEE Electron Device Lett. 2012, 33, 396−398. (10) Nguyen, T. T. T.; Aventurier, B.; Terlier, T.; Barnes, J. P.; Templier, F. Impact of passivation conditions on characteristics of Bottom-gate IGZO Thin-film Transistors. J. Disp. Technol. 2015, 11, 554−558. (11) Toda, T.; Wang, D.; Jiang, J.; Hung, M. P.; Furuta, M. Quantitative Analysis of the Effect of Hydrogen Diffusion from Silicon Oxide Etch-Stopper Layer into Amorphous In−Ga−Zn−O on ThinFilm Transistor. IEEE Trans. Electron Devices 2014, 61, 3762−3767. (12) Shao, Y.; Xiao, X.; He, X.; Deng, W.; Zhang, S. Low-Voltage aInGaZnO Thin-Film Transistors With Anodized Thin HfO2 Gate Dielectric. IEEE Electron Device Lett. 2015, 36, 573−575. (13) Shao, Y.; Xiao, X.; Wang, L.; Liu, Y.; Zhang, S. Anodized ITO Thin-Film Transistors. Adv. Funct. Mater. 2014, 24, 4170−4175. (14) Lan, L.; Zhao, M.; Xiong, N.; Xiao, P.; Shi, W.; Xu, M.; Peng, J. Low-Voltage High-Stability Indium−Zinc Oxide Thin-Film Transistor Gated by Anodized Neodymium-Doped Aluminum. IEEE Electron Device Lett. 2012, 33, 827−829. (15) Xiao, X.; Shao, Y.; He, X.; Deng, W.; Zhang, L.; Zhang, S. Flexible In−Ga−Zn−O Thin-Film Transistors on Elastomeric Substrate Bent to 2.3% Strain. IEEE Electron Device Lett. 2015, 36, 357−359. (16) Hsu, H.-H.; Chang, C.-Y.; Cheng, C.-H. A Flexible IGZO ThinFilm Transistor With Stacked TiO2-Based Dielectrics Fabricated at Room Temperature. IEEE Electron Device Lett. 2013, 34, 768−770. (17) Su, N.-C.; Wang, S.-J.; Huang, C.-C.; Chen, Y.-H.; Huang, H.-Y.; Chiang, C.-K.; Chin, A. Low-Voltage-Driven Flexible InGaZnO ThinFilm Transistor With Small Subthreshold Swing. IEEE Electron Device Lett. 2010, 31, 680−682. (18) Lim, W.; Jang, J. H.; Kim, S.-H.; Norton, D. P.; Craciun, V.; Pearton, S. J.; Ren, F.; Shen, H. High performance indium gallium zinc oxide thin film transistors fabricated on polyethylene terephthalate substrates. Appl. Phys. Lett. 2008, 93, 082102. (19) Kim, D. H.; Cho, N. G.; Han, S. H.; Kim, H.-G.; Kim, I.-D. Thickness Dependence of Gate Dielectric and Active Semiconductor on InGaZnO4 TFT Fabricated on Plastic Substrates. Electrochem. SolidState Lett. 2008, 11, H317−H319. (20) Esro, M.; Vourlias, G.; Somerton, C.; Milne, W. I.; Adamopoulos, G. High-Mobility ZnO Thin Film Transistors Based on Solution-processed Hafnium Oxide Gate Dielectrics. Adv. Funct. Mater. 2015, 25, 134−141. (21) Seul, H. J.; Kim, H.-G.; Park, M.-Y.; Jeong, J. K. A solutionprocessed silicon oxide gate dielectric prepared at a low temperature via ultraviolet irradiation for metal oxide transistors. J. Mater. Chem. C 2016, 4, 10486−10493. (22) Hsu, H.-H.; Chang, C.-Y.; Cheng, C.-H.; Chen, P.-C.; Chiu, Y.C.; Chiou, P.; Cheng, C.-P. High Mobility Field-Effect Thin Film Transistor Using Room-Temperature High-k Gate Dielectrics. J. Disp. Technol. 2014, 10, 875−881. (23) Huang, S.; Jiang, Q.; Wei, K.; Liu, G.; Zhang, J.; Wang, X.; Zheng, Y.; Sun, B.; Zhao, C.; Liu, H.; et al. High-Temperature LowDamage Gate Recess Technique and Ozone-Assisted ALD-grown Al2O3 Gate Dielectric for High-Performance Normally-Off GaN MISHEMTs. IEDM Technol. Dig. 2014, 442−445.

(24) Yu, M.-J.; Yeh, Y.-H.; Cheng, C.-C.; Lin, C.-Y.; Ho, G.-T.; Lai, B. C. -M.; Leu, C.-M.; Hou, T.-H.; Chan, Y.-J. Amorphous InGaZnO Thin-Film Transistors Compatible With Roll-to-Roll Fabrication at Room Temperature. IEEE Electron Device Lett. 2012, 33, 47−49. (25) Hsu, H.-H.; Chang, C.-Y.; Cheng, C.-H. Room-temperature flexible thin film transistor with high mobility. Curr. Appl. Phys. 2013, 13, 1459−1462. (26) Lee, J.-M.; Cho, I.-T.; Lee, J.-H.; Kwon, H.-I. Bias-stress-induced stretched-exponential time dependence of threshold voltage shift in InGaZnO thin film transistors. Appl. Phys. Lett. 2008, 93, 093504. (27) Jeong, J. K.; Yang, H. W.; Jeong, J. H.; Mo, Y.-G.; Kim, H. D. Origin of threshold voltage instability in indium-gallium-zinc oxide thin film transistors. Appl. Phys. Lett. 2008, 93, 123508. (28) Jhu, J.-C.; Chang, T.-C.; Chang, K.-C.; Yang, C.-Y.; Chou, W.C.; Chou, C.-H.; Chung, W.-C. Investigation of Hydration ReactionInduced Protons Transport in Etching-Stop a-InGaZnO Thin-Film Transistors. IEEE Electron Device Lett. 2015, 36, 1050−1052. (29) Raja, J.; Jang, K.; Balaji, N.; Choi, W.; Trinh, T. T.; Yi, J. Negative gate-bias temperature stability of N-doped InGaZnO activelayer thin-film transistors. Appl. Phys. Lett. 2013, 102, 083505. (30) Carcia, P. F.; McLean, R. S.; Groner, M. D.; Dameron, A. A.; George, S. M. Gas diffusion ultrabarriers on polymer substrates using Al2O3 atomic layer deposition and SiN plasma-enhanced chemical vapor deposition. J. Appl. Phys. 2009, 106, 023533. (31) Jo, J.-W.; Kim, Y.-H.; Park, J.; Heo, J. S.; Hwang, S.; Lee, W.-J.; Yoon, M.-H; Kim, M.-G.; Park, S. K. Ultralow Temperature SolutionProcessed Aluminum-Oxide Dielectrics via Local Structure Control of Nanoclusters. ACS Appl. Mater. Interfaces 2017, 9, 35114−35124. (32) Seul, H. J.; Kim, H.-G.; Park, M.-Y.; Jeong, J. K. SolutionProcessed Silicon Oxide Gate Dielectric Prepared at Low Temperature via Ultraviolet Irradiation for Metal Oxide Transistors. J. Mater. Chem. C 2016, 4, 10486−10493. (33) Park, S.; Kim, K.-H.; Jo, J.-W.; Sung, S.; Kim, K.-T.; Lee, W.-J.; Kim, J.; Kim, H. J.; Yi, G.-R.; Kim, Y.-H.; Yoon, M.-H.; Park, S. K. InDepth Studies on Rapid Photochemical Activation of Variation SolGel Metal Oxide Films for Flexible Transparent electronics. Adv. Funct. Mater. 2015, 25, 2807−2815. (34) Hwang, Y. H.; Seo, J.-S.; Yun, J. M.; Park, H.; Yang, S.; Park, S.H. K.; Bae, B.-S. An ‘Aqueous route’ for the fabrication of lowtemperature-processable oxide flexible transparent thin-film transistors on plastic substrates. NPG Asia Mater. 2013, 5, e45. (35) Je, S. Y.; Son, B.-G.; Kim, H.-G.; Park, M.-Y.; Do, L.-M.; Choi, R.; Jeong, J. K. Solution-Processable LaZrOx/SiO2 Gate Dielectric at Low Temperature of 180 °C for High-Performance Metal Oxide FieldEffect Transistors. ACS Appl. Mater. Interfaces 2014, 6, 18693−18703. (36) Chiu, C. J.; Chang, S. P.; Chang, S. J. High-Performance aIGZO Thin-Film Transistor Using Ta2O5 Gate Dielectric. IEEE Electron Device Lett. 2010, 31, 1245−1247. (37) Chun, Y. S.; Chang, S.; Lee, S. Y. Effects of gate insulators on the performance of a-IGZO TFT fabricated at room-temperature. Microelectron. Eng. 2011, 88, 1590−1593. (38) Yu, M.-J.; Yeh, Y.-H.; Cheng, C.-C.; Lin, C.-Y.; Ho, G.-T.; Lai, B. C.-M.; Leu, C.-M.; Hou, T.-H.; Chan, Y.-J. Amorphous InGaZnO Thin-Film Transistors Compatible With Roll-to-Roll Fabrication at Room Temperature. IEEE Electron Device Lett. 2012, 33, 47−49. (39) Su, N.-C.; Wang, S.-J.; Huang, C.-C.; Chen, Y.-H.; Huang, H.-Y.; Chiang, C.-K.; Chin, A. Low-Voltage-Driven Flexible InGaZnO ThinFilm Transistor With Small Subthreshold Swing. IEEE Electron Device Lett. 2010, 31, 680−682. (40) Yoshikawa, T.; Yagi, T.; Oka, N.; Jia, J.; Yamashita, Y.; Hattori, K.; Seino, Y.; Taketoshi, N.; Baba, T.; Shigesato, Y. Thermal Conductivity of Amorphous Indium−Gallium−Zinc Oxide Thin Films. Appl. Phys. Express 2013, 6, 021101. (41) Cantarella, G.; Münzenrieder, N.; Petti, L.; Vogt, C.; Büthe, L.; Salvatore, G. A.; Daus, A.; Tröster, G. Flexible In−Ga−Zn−O ThinFilm Transistors on Elastomeric Substrate Bent to 2.3% Strain. IEEE Electron Device Lett. 2015, 36, 781−783. G

DOI: 10.1021/acsami.7b13211 ACS Appl. Mater. Interfaces XXXX, XXX, XXX−XXX

Forum Article

ACS Applied Materials & Interfaces (42) Kamiya, T.; Hosono, H. Material characteristics and applications of transparent amorphous oxide semiconductors. NPG Asia Mater. 2010, 2, 15−22. (43) Li, H. U.; Jackson, T. N. Oxide Semiconductor Thin Film Transistors on Thin Solution-Cast Flexible Substrates. IEEE Electron Device Lett. 2015, 36, 35−37. (44) Yu, Y.; Xiao, X.; Zhang, Y.; Li, K.; Yan, C.; Wei, X.; Chen, L.; Zhen, H.; Zhou, H.; Zhang, S.; Zheng, Z. Photoreactive and MetalPlatable Copolymer Inks for High-Throughput, Room-Temperature Printing of Flexible Metal Electrodes for Thin-Film Electronics. Adv. Mater. 2016, 28, 4926−4934. (45) Kinkeldei, T.; Münzenrieder, N.; Zysset, C.; Cherenack, K.; Tröster, G. Encapsulation for Flexible Electronic Devices. IEEE Electron Device Lett. 2011, 32, 1743−1745.

H

DOI: 10.1021/acsami.7b13211 ACS Appl. Mater. Interfaces XXXX, XXX, XXX−XXX