Schottky Barrier Height Engineering for Electrical Contacts of Multi

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Schottky Barrier Height Engineering for Electrical Contacts of MultiLayered MoS Transistors with Reduction of Metal-Induced Gap States 2

Gwang-Sik Kim, Seung-Hwan Kim, June Park, Kyu Hyun Han, Jiyoung Kim, and Hyun-Yong Yu ACS Nano, Just Accepted Manuscript • DOI: 10.1021/acsnano.8b03331 • Publication Date (Web): 31 May 2018 Downloaded from http://pubs.acs.org on May 31, 2018

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Schottky Barrier Height Engineering for Electrical Contacts of Multi-Layered MoS2 Transistors with Reduction of Metal-Induced Gap States

Gwang-Sik Kim,1 Seung-Hwan Kim,1 June Park,2 Kyu Hyun Han,1 Jiyoung Kim,3 and HyunYong Yu1,*

1

School of Electrical Engineering, Korea University, Seoul 02841, Korea

2

Department of Nano Semiconductor Engineering, Korea University, Seoul 02841, Korea

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Department of Materials Science and Engineering, The University of Texas at Dallas,

Richardson, TX 75080, USA

*

corresponding author: [email protected]

ACS Paragon Plus Environment

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ABSTRACT

The difficulty in Schottky barrier height (SBH) control arising from Fermi-level pinning (FLP) at electrical contacts is a bottleneck in designing high-performance nanoscale electronics and optoelectronics based on molybdenum disulfide (MoS2). For electrical contacts of multi-layered MoS2, the Fermi level on the metal side is strongly pinned near the conduction-band edge of MoS2, which makes most MoS2-channel field-effect transistors (MoS2 FETs) exhibit n-type transfer characteristics regardless of their source/drain (S/D) contact metals. In this work, SBH engineering is conducted to control the SBH of electrical top contacts of multi-layered MoS2 by introducing a metal–interlayer–semiconductor (MIS) structure which induces the Fermi-level unpinning by a reduction of metal-induced gap states (MIGS). An ultra-thin titanium dioxide (TiO2) interlayer is inserted between the metal contact and the multi-layered MoS2 to alleviate FLP and tune the SBH at the S/D contacts of multi-layered MoS2 FETs. A significant alleviation of FLP is demonstrated as MIS structures with 1-nm-thick TiO2 interlayers are introduced into the S/D contacts. Consequently, the pinning factor (S) increases from 0.02 for metal– semiconductor (MS) contacts to 0.24 for MIS contacts, and the controllable SBH range is widened from 37 meV (50 – 87 meV) to 344 meV (107 – 451 meV). Furthermore, the Fermilevel unpinning effect is reinforced as the interlayer becomes thicker. This work widens the room for modifying electrical characteristics of contacts by providing a platform to control the SBH through a simple process as well as understandings of the FLP at the electrical top contacts of multi-layered MoS2.

KEYWORDS: molybdenum disulfide, Fermi-level unpinning, metal-induced gap states, Schottky barrier height, metal–interlayer–semiconductor structure


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Two-dimensional (2-D)-layered transition metal dichalcogenides (TMDs) have emerged as semiconducting materials for next-generation electronics and optoelectronics due to their characteristics.1–4 Of these, molybdenum disulfide (MoS2) is considered the most promising material because it has more potential than any other TMDs for large-scale fabrication.5 For MoS2-based electronics, MoS2-channel field-effect transistors (MoS2 FETs) have been widely studied due to their high on/off current ratio,1 great scalability, small short-channel effects,6 and ease of fabrication. Although MoS2 FETs are very promising, some bottlenecks that obstruct their successful transfer to practical applications still exist. Electrical properties of metal/MoS2 source/drain (S/D) contacts, specifically in MoS2 FETs, are one of the most problematic issues in MoS2-based nanoelectronics. The electrical performance and transfer characteristics of MoS2 FETs are highly dependent on the carrier transport at metal/MoS2 S/D contact;7 however, severe Fermi-level pinning (FLP) at metal/MoS2 contacts reduces the room for controlling their electrical characteristics.8–15 The Schottky barrier height (SBH, ΦB) of metal/MoS2 contacts is almost independent of the work-function values of contact metals due to the severe FLP. In addition, most MoS2 FETs exhibit n-type transfer characteristics even though the work function of the contact metal is large enough, because the Fermi level on the metal side is strongly pinned near the conduction-band edge of the MoS2.1,11,16–18 For this reason, high-performance p-channel MoS2 FETs are difficult to develop, which acts as an obstacle in implementing complementary metal–oxide–semiconductor (CMOS) logic applications.19 Furthermore, the FLP at metal/MoS2 S/D contacts in MoS2 FETS is much more critical than that in conventional semiconductor materials such as Si, Ge, and III-V because the SBH at S/D contacts determines the electrical characteristics of MoS2 FETs owing to the difficulty in doping MoS2.19 Therefore, it is very


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important to develop Fermi-level unpinning and SBH control techniques for metal/MoS2 contacts based on the understandings of their FLP for the practical logic applications of MoS2 FETs. Metal-induced gap states (MIGS) are formed inside the band gap of the semiconductor when the metal is directly in contact with the semiconductor.20 These MIGS have been identified as the main cause of the FLP in conventional semiconductor materials. Therefore, a metal– interlayer–semiconductor (MIS) structure has been developed to alleviate the FLP and reduce the electron SBH by reducing the MIGS in Si,21,22 Ge,23–32 and III-V.33–36 Ultra-thin interlayers such as TiO221–28,32,33,36 and ZnO29–31,35,36 which exhibit a small conduction band offset (CBO) to semiconductor materials are inserted between the metal contact and the semiconductor as the Fermi-level unpinning layer that minimizes the increase in the interlayer resistance. Several researchers have previously developed the MIS structure for the MoS2 to control the electron SBH of its electrical contacts by using Ta2O5,37 TiO2,38–40 MgO,41 and h-BN42,43 interlayers. However, all those studies have been limited to a reduction of the electron SBH at electrical contacts of MoS2 and most of them have not properly investigated the mechanism of the SBH reduction induced by the interlayer insertion. Furthermore, some studies have not precisely investigated the effects of MIS structures on S/D contacts because the interlayers were deposited on both the channel and the S/D regions. In this work, the SBH controllability is improved using an MIS structure on multi-layered MoS2 FETs and its SBH controlling mechanism is systematically investigated by analyzing three possible mechanisms: (1) Fermi-level unpinning by the MIGS reduction,23–32,35,36 (2) Fermi-level unpinning by the metal/semiconductor interface passivation,27,28,44 and (3) interface dipole formation.23,26,33,34,36 Four metals with various work-function values, titanium (Ti), copper (Cu),


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gold (Au), and platinum (Pt), are adopted as contact metals with an ultra-thin titanium dioxide (TiO2) interlayer, and the transfer characteristics of multi-layered MoS2 FETs and SBH of their S/D contacts are analyzed to demonstrate the SBH controlling effect. The mechanism of the SBH control is investigated by comparing each of the three possible mechanisms. Furthermore, to improve the accuracy, the following three strategies are adopted. First, a TiO2 interlayer is fabricated only in the S/D region, excluding the channel region, to confirm whether the output characteristics result from the contact region. Second, the metal–semiconductor (MS) and the MIS contact structures are implemented on the same MoS2 channel to minimize any effect induced by the difference among the multi-layered MoS2 flakes. Third, each S/D contact structure is fabricated to include only a top contact of the MoS2 channel by using an SiO2 interlayer dielectric (ILD) to rule out an edge contact configuration that has considerable dependence on the number of layers of MoS2 flakes.


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RESULTS AND DISCUSSION FLP at metal/multi-layered MoS2 contacts. The multi-layered MoS2 FETs are fabricated with the electrically top-contacted S/D configuration and the SiO2/p+-Si back-side gate stack as shown in Figure 1. Figure 1a, Figure1b, and Figure 1c show a three-dimensional (3-D) schematic illustration, a cross-sectional schematic diagram, and a top-view optical microscopy image, respectively, of the fabricated MoS2 FET with both MS and MIS S/D structures on the same MoS2 channel. The top-contacted configurations are realized using a SiO2 ILD layer. The transfer characteristics, drain current vs. back-gate bias (ID–VBG), of the multi-layered MoS2 FETs with an MS S/D contact structure are measured to investigate the FLP characteristics of the metal/MoS2 contacts. A comparison between the multi-layered MoS2 FETs with two types of S/D contact structures, a typical combined contacted S/D scheme and a top-contacted S/D scheme, is described in Supporting Information 1. Figure 2 shows the transfer characteristics of four multi-layered MoS2 FETs with different metal contacts: Ti (metal work-function, ΦM ~ 4.33 eV), Cu (~ 4.8 eV), Au (~ 5.15 eV), and Pt (~ 5.75 eV). All devices show clear n-type transfer characteristics with high on/off current ratio over the order of 106 regardless of the metal work-function values. According to the results, there are only slight differences among the different metal contacts and their on-state current levels are almost the same, which indicates that the work-function values of the contact metals hardly affect the S/D contact properties and electrical characteristics of multi-layered MoS2 FETs. This shows a good agreement with the results present in the literatures, which have revealed that the Fermi level on the metal side is strongly pinned near the conduction-band edge of MoS2.1,11,16–18


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SBH control of metal/multi-layered MoS2 contacts by ultra-thin interlayer insertion A TiO2 layer with a physical thickness of 1 nm is inserted between the metal contact and the multilayered MoS2 as the SBH controlling layer. Figure 1d shows a transmission electron microscopy (TEM) image of the MIS structure, which shows uniform deposition of the sputtered TiO2 interlayer and clear interfaces of the fabricated MIS contact. Figure 3 shows the transfer characteristics of multi-layered MoS2 FETs with MS and MIS S/D contact structures with a 1-nm-thick TiO2 interlayer for four metal contacts. The MS and MIS S/D structures are fabricated on the same MoS2 channel for the fixed metal contact to compare the two contact schemes under the same condition. No significant difference is observed between the MS and MIS S/D structures for the Ti contact, as shown in Figure 3a. Interestingly, the gap of electrical characteristics between the MS and MIS structures becomes wider as the work-function value of the contact metal increases. Figure 3b, Figure 3c, and Figure 3d show the transfer characteristics of multi-layered MoS2 FETs with MS and MIS S/D structures on the same MoS2 channel for different metal contacts: Cu, Au, and Pt. They show a significant reduction in the on-state current level depending on the work-function values of the contact metals (~×101 for Cu, ~×102 for Au, and ~×103 for Pt) with the off-state current remaining constant when the MIS structure is introduced into their S/D contact scheme. The larger the work-function value of the contact metal is, the larger the reduction in the on-state current is. These results clearly indicate that the Fermi levels of the contact metals move closer to their ideal positions because the ultra-thin TiO2 interlayer between the metal contact and the multi-layered MoS2 induces the Fermi-level unpinning effect. The drain current vs. drain-source bias (ID–VDS) characteristics of multi-layered FETs and the back-to-back diode I–V


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characteristics for different contact structures are presented in Supporting Information 2 and Supporting Information 3, respectively. The effective SBH values at S/D contacts of multi-layered MoS2 FETs are extracted for all discussed contact structures as a function of VBG, as shown in Figure 4, by using the 2D thermionic emission equation37 (Equation 1) and an Arrhenius plot. ௤

‫ܫ‬஽ = ‫∗ܣܣ‬ଶ஽ ܶ ଷ/ଶ exp ቂ− ቀߔ஻ − ௞்

௏ವೄ ௡

ቁቃ

(1)

where A is the area of the metal/multi-layered MoS2 contacts, A2D* is the 2D equivalent Richardson constant, q is the electron charge, k is the Boltzmann constant, T is the temperature, and n is the ideality factor. The effective electron SBH values under the flat-band bias condition (VBG = flat-band voltage, VFB) can be obtained using the SBH vs. VBG curve. For the multilayered MoS2 FETs with MS S/D contact structures, the SBH values of the contacts are very small, which are 50 meV for Ti, 72 meV for Cu, 55 meV for Au, and 87 meV for Pt, and show slight differences as indicated in Figure 4a, Figure 4c, Figure, 4e, and Figure 4g. In contrast, as expected from the I–V results, the SBH values of MIS S/D contacts with a 1-nm-thick TiO2 interlayer show dependency on the work-function values of the contact metals, which are 107 meV for Ti, 171 meV for Cu, 212 meV for Au, and 451 meV for Pt, as shown in Figure 4b, Figure, 4d, Figure 4f, and Figure 4h. The Pt contact exhibits the most significant change in the SBH, a 364 meV increase from the MS structure, after insertion of a 1-nm-thick TiO2 interlayer because it has the largest work-function value among four contact metals. The controllable SBH window for the four metal contacts is widened from 37 meV (50 – 87 meV) for MS structures to 344 meV (107 – 451 meV) for MIS structures.


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Figure 5 summarizes the comparison between the MS and MIS structures with a 1-nm-thick TiO2 interlayer for different metal contacts. Figure 5a shows a box plot of drain current under zero back-gate bias and 0.5 V of drain-source bias condition of multi-layered MoS2 FETs with different contact structures. A trend that shows a good agreement with the above discussions can be verified through the plot. Little dependency of ID on work functions of the contact metals exists for MS structures, and ID significantly decreases as the work function of the contact metal increases for MIS structures. Figure 5b shows an effective electron SBH under the flat-band bias condition vs. contact metal work function plot for different contact structures. The pinning factor (S), which shows how severely FLP occurs at the contacts, can be defined as the slope of that curve (S ~ ΦB/ΦM).45,46 An ideal value of S is 1, indicating no FLP at contacts, and the perfect FLP is represented as S = 0. The S value of the MS contact structures is ~0.02 which indicates a severe FLP, and that of the MIS contact structures is ~0.24, which represents significant Fermilevel unpinning through insertion of a 1-nm-thick TiO2 interlayer.

Mechanism of SBH control: Fermi-Level unpinning by MIGS reduction. The SBH control by insertion of the interlayer can be explained by three mechanisms: (1) Fermi-level unpinning by the MIGS reduction,23–32,35,36 (2) Fermi-level unpinning by the metal/semiconductor interface passivation,27,28,44 and (3) interface dipole formation.23,26,33,34,36 First of all, the two Fermi-level unpinning effects and the interface dipole effect can be separated from the SBH vs. contact metal work function plot as shown in Figure 6a. In the plot, the intersection point between the ideal line with S = 1 and the experimentally obtained MS line with S = 0.02 is a branch point that does not change as the pinning factor changes. A line with S = 0 corresponding to the perfect pinning must cross the branch point and this line gives the experimental charge neutrally level (ECNL)


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which is a pinning point inside the band gap of the multi-layered MoS2.20 The experimental ECNL is found to be 45 meV below the conduction band edge of the multi-layered MoS2, which shows a good agreement with the literature.9 When the 1-nm-thick TiO2 interlayer is inserted, the MIS line with S = 0.24 ought to also cross the branch point also; however, it does not. It is because another factor induces a parallel shift of the line, and that factor must be the interface dipole formation induced by the 1-nm-thick TiO2 interlayer. The interface dipole induces a negative shift of the MIS line resulting in the lowering of the electron SBH by approximately 38 meV. The SBH lowering by the interface dipole occurs equally for all contact metals and its contribution to the overall SBH modulation is small. Both the MIGS reduction and the interface passivation results in the Fermi-level unpinning corresponding to the increase in the S factor, which makes it difficult to distinguish between these two effects from the plot in Figure 6a. For this reason, it is essential to figure out the interface passivating effect of the TiO2 interlayer on the MoS2. The multi-layered MoS2 FETs with additional TiO2 gate interfacial layer does not exhibit improved interface quality as compared to those without the TiO2 gate interfacial layer, and the effective gate interface state density in the range of 1012 – 1013 cm–2eV–1 are comparable to those previously reported in literatures.39,47–49 Moreover, as the TiO2 layer is deposited onto the MoS2 channel surface in the multi-layered MoS2 FET, the subthreshold swing is degraded, indicating that the sputtered TiO2 makes poorer interface compared to the pristine MoS2 surface when it forms an interface with the MoS2. The experimental details and results are presented in Supporting Information 4. From those results, it is concluded that the TiO2 does not passivate the MoS2 surface or the metal/MoS2 interface in this work.


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Based on the analysis above, it is concluded that the SBH controlling effect of the insertion of the TiO2 interlayer is mainly induced by the Fermi-level unpinning effect with a small contribution of the interface dipole formation, and the Fermi-level unpinning effect results from only the MIGS reduction of the interlayer, not from its interface passivation. Furthermore, the MIGS reduction is more effective to alleviate the FLP for the multi-layered MoS2 (Eg ~ 1.2 eV)50 than the mono-layered MoS2 (Eg ~ 1.88 eV).50 This is because the MIGS have a stronger FLP inducing effect as the band gap of the semiconductor becomes smaller.45 Figure 6b shows an alignment of the Fermi levels of the metal contacts to the energy band of multi-layered MoS2 for all discussed cases. The Fermi levels of the four contact metals are strongly pinned very close to the ECNL of the multi-layered MoS2 and produces small electron SBH values. The Fermi levels move closer to their ideal position depending on the metal work function when the 1-nm-thick TiO2 interlayer is inserted. The interface dipole induced by the interlayer makes the Fermi levels shift up slightly. The energy band diagrams of the MS and MIS contact structures which present the FLP at the electrical contacts of the multi-layered MoS2 and its alleviation through the TiO2 interlayer insertion are illustrated in Figure 6c and Figure 6d.

Interlayer thickness dependency on Fermi-level unpinning and SBH control. The FLP induced by the MIGS can be further alleviated as the interlayer becomes thicker.45,46 The TiO2 interlayer thickness dependency on FLP of the metal/multi-layered MoS2 contacts is analyzed for Pt contact because its large work function induces more SBH change when the interlayer thickness increases. Figure 7a shows the transfer characteristics of multi-layered MoS2 FETs with Pt S/D metal contacts for different TiO2 interlayer thicknesses: 0 nm (MS), 1 nm, 2 nm, and 3 nm. As the interlayer thickness increases, the on-state current level is reduced mainly due to an increase


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in the electron SBH induced by further Fermi-level unpinning effect of thicker interlayers. The flat-band SBH of the Pt/TiO2/MoS2 contact increases up to 547 meV for a 2-nm-thick TiO2 interlayer and up to 651 meV for a 3-nm-thick TiO2 interlayer, as shown in Figure 7b. When a thicker interlayer is inserted between the metal contact and multi-layered MoS2, it can block the penetration of electron wave functions from the metal side, reduce MIGS further, alleviate the FLP more, increase electron SBH, and eventually prevent the current conduction of electrons under the flat-band and the on-state bias conditions for Pt contacts. The results also indicate that FLP occurs due to MIGS formation within the band gap of multi-layered MoS2 and can be alleviated by the insertion of interlayers having a physical thickness. In addition, the off-state current increase with increasing interlayer thickness is also indicative of Fermi-level unpinning because the reduced hole SBH can produces additional off-state hole leakage current flow.


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CONCLUSION The FLP at metal/multi-layered MoS2 contacts and its alleviation, as well as the SBH control through the ultra-thin interlayer insertion, were investigated on multi-layered MoS2 FETs with top-contacted S/D configurations. Four contact metals were adopted as the S/D contacts with and without a 1-nm-thick TiO2 interlayer, to demonstrate the effect of MIS structures on SBH control for metal/multi-layered MoS2 contacts. It was revealed that the Fermi level on the metal side is strongly pinned at the ECNL which is 45 meV below the conduction-band edge of MoS2 at the MS contact. The Fermi levels of the contact metals return close to its ideal position depending on their work functions with 38 meV of the up-shift induced by the interface dipole formation as the MIS structure is introduced. The S parameter was increased from 0.02 for MS structures to 0.24 for MIS structures with the 1-nm-thick TiO2 interlayer. The SBH control mechanism of the interlayer insertion was revealed to be the Fermi-level unpinning effect brought on by the reduction in the MIGS. In addition, the relation between the Fermi-level unpinning effect and the interlayer thickness was investigated for a Pt contact. The SBH increased with the interlayer thickness due to further reduction in the MIGS due to the interlayer, and ~651 meV of the electron SBH was obtained for the Pt contact and a 3-nm-thick TiO2 interlayer. Thus, the SBH control technique based on the Fermi-level unpinning effect by the MIGS reduction of MIS structures can be useful for modifying the transfer characteristics and electrical performances of multi-layered MoS2 FETs via an appropriate design of the S/D contact schemes.


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METHODS Device fabrication. A 90-nm-thick thermally grown silicon dioxide (SiO2) film (back-gate oxide) on top of a p-type silicon (Si) substrate (back-gate) doped by boron with 0.005 Ω·cm of film resistivity was prepared. The multi-layered MoS2 flakes were mechanically exfoliated by a tape and transferred on to the SiO2/Si substrate by using a polydimethylsiloxane (PDMS) stamp. The active area of the MoS2 channel was opened via SiO2 ILD and the MS and MIS S/D contact areas were defined by a standard photolithography process. The TiO2 interlayer was deposited by the RF sputtering process and all metal contacts were deposited by electron beam evaporation. A detailed process flow is described in Supporting Information 5.


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ASSOCIATED CONTENT Supporting Information. Comparison between multi-layered MoS2 FETs with combined contacted S/D structure and top-contacted S/D structure (Supporting Information 1), ID–VDS characteristics of multi-layered MoS2 FETs for contact structures (Supporting Information 2), back-to-back diode I–V characteristics of contact structures (Supporting Information 3), investigation of interface passivating effect of TiO2 layer (Supporting Information 4), and detailed process flow of device fabrication (Supporting Information 5).

ACKNOWLEDGMENTS This work was supported in part by Basic Science Research Program through the National Research Foundation of Korea (NRF) funded by the Ministry of Science, ICT, and Future Planning (2017R1A2B4006460), in part by Nano·Material Technology Development Program through the National Research Foundation of Korea(NRF) funded by the Ministry of Science, ICT, and Future Planning (2016M3A7B4910426), and in part by the IC Design Education Center (IDEC), Korea.


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REFERENCES (1) Radisavljevic, B.; Radenovic, A.; Brivio, J.; Giacometti, V.; Kis, A. Single-Layer MoS2 Transistors. Nat. Nanotechnol. 2011, 6, 147–150. (2) Mak, K. F.; Lee, C.; Hone, J.; Shan, J.; Heinz, T. Atomically Thin MoS2: A New DirectGap Semiconductor. Phys. Rev. Lett. 2010, 105, 136805. (3) Jones, A. M.; Yu, H.; Ghimire, N. J.; Wu, S.; Aivazian, G.; Ross, J. S.; Zhao, B.; Yan, J.; Mandrus, D. G.; Xiao, D.; Yao, W.; Xu, X. Optical Generation of Excitonic Valley Coherence in Monolayer WSe2. Nat. Nanotechnol. 2013, 8, 634–638. (4) Cui, X.; Shih, E.; Jauregui, L. A.; Chae, S. H.; Kim, Y. D.; Li, B.; Seo, D.; Pistunova, K.; Yin, J.; Park, J. H.; Choi, H. J.; Lee, Y. H.; Watanabe, K.; Taniguchi, T.; Kim, P.; Dean, C. R.; Hone, J. C. Low-Temperature Ohmic Contact to Monolayer MoS2 by van der Waals Bonded Co/h-BN Electrodes. Nano Lett. 2017, 17, 4781–4786. (5) Ahn, C.; Lee, J.; Kim, H. U.; Bark, H.; Jeon, M.; Ryu, G. H.; Lee, Z.; Yeom, G. Y.; Kim, K.; Jung, J.; Kim, Y.; Lee, C.; Kim, T. Low-Temperature Synthesis of Large-Scale Molybdenum Disulfide Thin Films Directly on a Plastic Substrate Using Plasma-Enhanced Chemical Vapor Deposition. Adv. Mater. 2015, 27, 5223–5229. (6) Liu, H.; Neal, A. T.; Ye, P. D. Channel Length Scaling of MoS2 MOSFETs. ACS Nano 2012, 6, 8563–8569. (7) Kwon, J.; Lee, J. Y.; Yu, Y. J.; Lee, C. H.; Cui, X.; Hone, J.; Lee, G. H. ThicknessDependent Schottky Barrier Height of MoS2 Field-Effect Transistors. Nanoscale 2017, 9, 6151–6157.


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(17) Kaushik, N.; Nipane, A.; Basheer, F.; Dubey, S.; Grover, S.; Deshmukh, M.; Lodha, S. Schottky Barrier Heights for Au and Pd Contacts to MoS2. Appl. Phys. Lett. 2014, 105, 113505. (18) Neal, A. T.; Liu, H.; Gu, J. J.; Ye, P. D. Metal Contacts to MoS2: A Two-Dimensional Semiconductor. Proc. Device Research Conference (DRC) 2012, 65–66. (19) Chuang, S.; Battaglia, C.; Azcatl, A.; McDonnell, S.; Kang, J. S.; Yin, X.; Tosun, M.; Kapadia, R.; Fang, H.; Wallace, R. M.; Javey, A. MoS2 P-type Transistors and Diodes Enabled by High Work Function MoOx Contacts. Nano Lett. 2014, 14, 1337–1342. (20) Monch, W. On the Physics of Metal-Semiconductor Interfaces. Rep. Prog. Phys. 1990, 53, 221–278 (21) Agrawal, A.; Lin, J.; Barth, M.; White, R.; Zheng, B.; Chopra, S.; Gupta, S.; Wang, K.; Gelatos, J.; Mohney, S. E.; Datta, S. Fermi Level Depinning and Contact Resistivity Reduction Using a Reduced Titania Interlayer in n-Silicon Metal-Insulator-Semiconductor Ohmic Contacts. Appl. Phys. Lett. 2014, 104, 112101. (22) Yu, H.; Schaekers, M., Schram, T.; Demuynck, S.; Horiguchi, N.; Barla, K.; Collaert, N.; Thean, A. V.-Y.; De Meyer, K. Thermal Stability Concern of Metal-InsulatorSemiconductor Contact: A Case Study of Ti/TiO2/n-Si Contact. IEEE Trans. Electron Devices 2016, 63, 2671–2676. (23) Lin, J. Y. J.; Roy, A. M.; Saraswat, K. C. Reduction in Specific Contact Resistivity to Ge Using Interfacial Layer. IEEE Electron Device Lett. 2012, 33, 1541–1543.


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(24) Kim, G. S.; Kim, J. K.; Kim, S. H.; Jo, J.; Shin, C.; Park, J. H.; Saraswat, K. C.; Yu, H. Y. Specific Contact Resistivity Reduction Through Ar Plasma-Treated TiO2−x Interfacial Layer to Metal/Ge Contact. IEEE Electron Device Lett. 2014, 35, 1076–1078. (25) Dev, S.; Remesh, N.; Rawal, Y.; Manik, P. P.; Wood, B.; Lodha, S. Low Resistivity Contact on n-type Ge Using Low Work-Function Yb with a Thin TiO2 Interfacial Layer. Appl. Phys. Lett. 2016, 108, 103507. (26) Tsui, B. Y.; Kao, M. H. Mechanism of Schottky Barrier Height Modulation by Thin Dielectric Insertion on n-type Germanium. Appl. Phys. Lett. 2013, 103, 032104. (27) Kim, G. S.; Yoo, G.; Seo, Y.; Kim, S. H.; Cho, K.; Cho, B. J.; Shin, C.; Park, J. H.; Yu, H. Y. Effect of Hydrogen Annealing on Contact Resistance Reduction of Metal–Interlayer– n-Germanium Source/Drain Structure. IEEE Electron Device Lett. 2016, 37, 709–712. (28) Kim, G. S.; Kim, S. W.; Kim, S. H.; Park, J.; Seo, Y.; Cho, B. J.; Shin, C; Shim J. H.; Yu, H. Y. Effective Schottky Barrier Height Lowering of Metal/n-Ge with a TiO2/GeO2 Interlayer Stack. ACS Appl. Mater. Interfaces 2016, 8, 35419–35425. (29) Manik, P. P.; Mishra, R. K.; Kishore, V. P.; Ray, P.; Nainani, A.; Huang, Y. C.; Abraham, M. C.; Ganguly, U.; Lodha, S. Fermi-Level Unpinning and Low Resistivity in Contacts to n-type Ge with a Thin ZnO Interfacial Layer. Appl. Phys. Lett. 2012, 101, 182105. (30) Gupta, S.; Manik, P. P.; Mishra, R. K.; Nainani, A.; Abraham, M. C.; Lodha, S. Contact Resistivity Reduction through Interfacial Layer Doping in Metal-Interfacial LayerSemiconductor Contacts. J. Appl. Phys. 2013, 113, 234505.


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(31) Manik, P. P.; Lodha, S. Contacts on n-type Germanium Using Variably Doped Zinc Oxide and Highly Doped Indium Tin Oxide Interfacial Layers. Appl. Phys. Express 2015, 8, 051302. (32) Kim, G. S.; Kim, S. H.; Lee, T. I.; Cho, B.; Choi, C.; Shin, C.; Shim, J. H.; Kim, J.; Yu, H. Y. Fermi-Level Unpinning Technique with Excellent Thermal Stability For n-Type Germanium. ACS Appl. Mater. Interfaces 2017, 9, 35988–35997. (33) Hu, J.; Saraswat, K. C.; Philip Wong, H. S. Metal/III-V Effective Barrier Height Tuning Using Atomic Layer Deposition of High-k/High-k Bilayer Interfaces. Appl. Phys. Lett. 2011, 99, 092107. (34) Hu, J.; Saraswat, K. C.; Philip Wong, H. S. Metal/III-V Schottky Barrier Height Tuning for the Design of Nonalloyed III-V Field-Effect Transistor Source/Drain Contacts. J. Appl. Phys. 2010, 107, 063712. (35) Kim, S. H.; Kim, G. S.; Kim, J. K.; Park, J. H.; Shin, C.; Choi, C.; Yu, H. Y. Fermi-Level Unpinning Using a Ge-Passivated Metal–Interlayer–Semiconductor Structure for NonAlloyed Ohmic Contact of High-Electron-Mobility Transistors. IEEE Electron Device Lett. 2015, 36, 884–886. (36) Kim, S. W.; Kim, S. H.; Kim, G. S.; Choi, C.; Choi, R.; Yu, H. Y. The Effect of Interfacial Dipoles on the Metal-Double Interlayers-Semiconductor Structure and Their Application in Contact Resistivity Reduction. ACS Appl. Mater. Interfaces 2016, 8, 35614– 35620.


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(44) Kim, G. S.; Kim, S. H.; Kim, J. K.; Shin, C.; Park, J. H.; Saraswat, K. C.; Cho, B. J.; Yu, H. Y. Surface Passivation of Germanium Using SF6 Plasma to Reduce Source/Drain Contact Resistance in Germanium n-FET. IEEE Electron Device Lett. 2015, 36, 745–747. (45) Agrawal, A.; Shukla, N.; Ahmed, K.; Datta, S. A Unified Model for Insulator Selection to Form Ultra-Low Resistivity Metal-Insulator-Semiconductor Contacts to n-Si, n-Ge, and nInGaAs. Appl. Phys. Lett. 2012, 101, 042108. (46) Wager, J. F.; Robertson, J. Metal-Induced Gap States Modeling of Metal-Ge Contacts with and without a Silicon Nitride Ultrathin Interfacial Layer. J. Appl. Phys. 2011, 109, 094501. (47) Lee, C. H.; Vardy, N.; Wong, W. S. Multilayer MoS2 Thin-Film Transistors Employing Silicon Nitride and Silicon Oxide Dielectric Layers. IEEE Electron Device Lett. 2016, 37, 731–734. (48) Salvatore, G. A.; Munzenrieder, N.; Barraud, C.; Petti, L.; Zysset, C.; Buthe, L.; Ensslin, K.; Troster, G. Fabrication and Transfer of Flexible Few-Layers MoS2 Thin Film Transistors to Any Arbitrary Substrate. ACS Nano 2013, 7, 8809–8815. (49) Zou, X.; Wang, J.; Chiu, C. H.; Wu, Y.; Xiao, X.; Jiang, C.; Wu, W. W.; Mai, L.; Chen, T.; Li, J.; Ho, J. C.; Liao, L. Interface Engineering for High-Performance Top-Gated MoS2 Field-Effect Transistors. Adv. Mater. 2014, 26, 6255–6261. (50) Wang, Z. M. MoS2 – Materials, Physics, and Devices, 1st ed.; Springer, 2014.


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Figure 1. (a) 3-D schematic illustration, (b) cross-sectional schematic, and (c) top-view optical microscopy image of the back-gated multi-layered MoS2 FET with top-contacted MS and MIS S/D structures on the same MoS2 channel. (d) Cross-sectional TEM image of Pt/TiO2(2 nm)/multi-layered MoS2 structure at the MIS S/D structure.


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Figure 2. Transfer characteristics (ID–VBG) of back-gated multi-layered MoS2 FETs with four metal contacts. (inset) Cross-sectional schematic of the fabricated device showing the ID–VBG measurement scheme.


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Figure 3. Transfer characteristics (ID–VBG) of back-gated multi-layered MoS2 FETs with both MS and MIS (TiO2 1 nm) S/D contacts on the same MoS2 channel for four metal contacts: (a) Ti, (b) Cu, (c) Au, and (d) Pt. (a, inset) Cross-sectional schematic of the fabricated device showing the ID–VBG measurement scheme.


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Figure 4. Effective electron SBH of MS S/D contacts for (a) Ti, (c) Cu, (e) Au, and (g) Pt metal contacts, and MIS S/D contacts with 1-nm-thick TiO2 interlayer for (b) Ti, (d) Cu, (f) Au, and (h) Pt metal contacts in multi-layered MoS2 FETs as a function of back-gate bias.


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Figure 5. (a) Box plot of ID at VDS = 0.5 V and zero back-gate bias of multi-layered MoS2 FETs with MS and MIS S/D structures for four metal contacts. (b) Effective electron SBH under the flat-band bias condition of MS and MIS S/D structures for four metal contacts. Solid line in (b) indicates ideal SBH following the Schottky-Mott rule.


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Figure 6. (a) Fitted lines of effective electron SBH under the flat-band bias condition of MS and MIS S/D structure with and without assuming interface dipole formation. (b) Alignment of Fermi levels of metal contacts to the energy band of multi-layered MoS2 for each case (EVAC is a vacuum energy level). Energy band diagrams of (c) MS S/D contact structures and (d) MIS S/D contact structures for four metal contacts under a flat-band bias condition.


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Figure 7. (a) Transfer characteristics of multi-layered MoS2 FETs with Pt S/D contact for different TiO2 interlayer thicknesses. (b) Effective electron SBH under the flat-band bias condition of Pt S/D contacts of multi-layered MoS2 FETs for different TiO2 interlayer thicknesses.


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Table of Contents Graphic


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Schottky Barrier Height Engineering for Electrical Contacts of Multi

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