Letter pubs.acs.org/NanoLett
Selective Doping of Silicon Nanowires by Means of Electron Beam Stimulated Oxide Etching G. Pennelli,*,† M. Totaro,† and M. Piotto‡ †
Dipartimento di Ingegneria della Informazione, Università di Pisa, Via G.Caruso, I-56122 Pisa, Italy IEIIT - Pisa, CNR, Via G.Caruso, I-56122 Pisa, Italy
‡
ABSTRACT: Direct patterning of silicon dioxide by means of electron beam stimulated etching is shown, and a full characterization of exposure dose is presented. For its high dose, this technique is unsuitable for large areas but can be usefully employed like a precision scalpel for removing silicon dioxide by well-localized points. In this work, this technique is applied to the definition of windows through the oxide surrounding top down fabricated n-doped silicon nanowires. These windows will be employed for a selective doping of the nanowire by boron diffusion. In this way, pn junctions can be fabricated in welllocalized points in the longitudinal direction of the nanowire, and an electrical contact to the different junctions can be provided. Electrical I−V characteristics of a nanowire with pn longitudinal junctions are reported and discussed. KEYWORDS: silicon nanowires, selective doping, e-beam stimulated oxide etching, pn nanojunctions
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process simulator. The resulting devices have been electrically characterized, and I−V measurements are shown and discussed. Electron Beam Stimulated Oxide Etching. In the past, O’Keeffe and Handy11 demonstrated that silicon dioxide can be used as inorganic resist for e-beam lithography. They found that the exposition of a thermally grown silicon dioxide film to a high energy electron beam (1−15 keV) increases its etch rate in hydrofluoric solution. Silicon dioxide, used as inorganic e-beam resist, has a very low sensitivity requiring doses about 5 orders of magnitude greater than standard organic resists as polymethylmethacrylate (PMMA). However, silicon dioxide is less affected by secondary electrons resulted from the primary e-beam scattering and thus offers perspectives for a better resolution with respect to organic e-beam resist. For its very high doses, applications of silicon dioxide as an e-beam resist have been limited to the definition of very small areas.12−14 The principle of e-beam stimulated etching process is schematically shown in Figure 1. It is based on the localized exposure of thermally grown silicon dioxide, with an initial thickness Th, by means of electron beam; a successive calibrated chemical etching is performed for half of the time usually required for removing the Th thick SiO2 layer. In this way, the final thickness of the oxide layer is Th/2 in unexposed areas; meanwhile it results completely removed in exposed (e-beam stimulated) areas where the etch rate is faster. In order to fabricate devices with a good yield, the process has been carefully calibrated and the details are provided in the following. SiO2 layers have been thermally grown on standard
ilicon nanowires (SiNWs) are widely investigated for their interesting properties that make devices based on SiNWs suitable building blocks for different applications such as nanoelectronic1 and nanophotonic devices, nanosensors,2,3 and nanoelectromechanical systems.4 Silicon nanowire field effect transistors (SiNW-FETs) are recognized in the ITRS (International Technology Roadmap for Semiconductor) as one of the two most promising alternatives to planar CMOS for the “beyond CMOS” era.5 Recently, SiNW-based devices have been proposed for their interesting thermoelectric properties6,7 with possible important applications to energy conversion and energy harvesting. Devices based on silicon nanowires can be fabricated by means of top down processes.8−10 Typically, all these top down processes use silicon dioxide growth for reducing the nanowire width, and the silicon core of the nanowire results wrapped in thermally grown SiO2. In this work, selective doping of a well-defined zone of the silicon core is performed through a window defined in the surrounding SiO2 layer. This window is opened by means of an electron beam stimulated oxide etching technique. Enhancement of the SiO2 chemical etch rate by e-beam irradiation (e-beam stimulated) has already been reported in the past,11 and this technique has been preliminary characterized and successfully applied to the fabrication of metal nanocontacts to silicon nanowires.12 In this work, a full characterization of this technique is performed and reported. Contrast curves for different thicknesses are reported and the possible use of SiO2 layers as e-beam resist is shown and discussed. Silicon nanowires have been selectively doped by means of diffusion from a solid source through SiO2 windows. The formation of a double pn nanojunction along the longitudinal direction of the wire has been modeled with a commercial technological © 2012 American Chemical Society
Received: December 22, 2011 Published: January 20, 2012 1096
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Inspecting by eyes the state of the wet surface it is possible to detect even a very thin layer (few nanometers) of SiO2. This property has been exploited in order to estimate the time for a complete removal of the SiO2 layer (SiO2 layer full time etch) on the test sample with an uncertainty of about 1−2 s. The exposed sample has then been etched for half of the full time etch. In this way, in unexposed areas the thickness of the remained oxide resulted half of its original value while in exposed areas, as a consequence of the electron beam stimulation, the etch proceeded faster and the final thickness resulted smaller. The residual SiO2 thickness depends on the exposure dose, and a complete removal of the oxide can occur for doses sufficiently high. The depth of exposed areas after etch has been measured by no contact atomic force microscopy (AFM PSIA100). Figure 2a is an AFM image of a typical sample employed for process calibration. The image has been taken on five areas with exposure doses increasing from left to right, and in Figure 2b a profile showing the different depths is reported. Accurate measurements of exposed area depths have been performed by taking images 255 × 255 points wide of every single area. The plot of Figure 3a reports the depth of exposed areas as a function of the e-beam exposure doses for a sample with initial thickness of the SiO2 film of Th = 45 nm. After the half-time etch (typical full time etch 58 s, half-time etch 29 s), the presumed oxide thickness in unexposed regions of the sample should be Th/2 = 22.5 nm. From Figure 3a it can be seen that the depth of regions exposed with e-beam doses greater than 2 × 104 C/m2 is 22−23 nm. This means that in these regions the oxide has been completely removed, that is, they are fully exposed. Conversely for doses smaller than 2 × 103 C/m2, the depth resulted very small. The oxide thickness in these areas is the same as that in unexposed areas; this means that the oxide etch rate is substantially unaltered for these low exposure doses. In order to investigate the effect of e-beam stimulation for different SiO2 thicknesses, samples with a 70 nm thick SiO2 layer have been tested. The plot of Figure 3b shows depths of exposed areas as a function of exposure doses for a sample with Th = 70 nm. The typical values for etch time have been in this case full time etch of 92 s and half-time etch of 46 s; congruently, the final thickness of the film, measured as the depth of fully exposed areas, is 35 nm. Despite this, both doses for full exposure and for unaltered thickness resulted very similar with respect to the ones obtained with a 45 nm thick
Figure 1. Schematic view of the electron beam stimulated oxide etching technique. (a) The starting substrate is a silicon wafer ⟨100⟩ oriented. (b) A silicon dioxide layer with a thickness Th is grown by thermal oxidation. (c) Electron beam lithography is used for exposing delimited areas with a suitable dose. (d) Silicon dioxide wet etch (buffered HF) is performed for half of the time required for removing the whole SiO2 layer (d). The final thickness in unexposed areas is Th/ 2, meanwhile the SiO2 is completely removed from exposed areas.
⟨100⟩ silicon wafers (n-doped 1016 cm−3), as schematically shown in Figure 1a,b. E-beam exposures have then been performed with a pattern generator,15 applied to a JEOL6500F field emission SEM. An accelerating voltage of 30 kV has been used in all the exposure tests. Square areas of 500 × 500 nm2 (see Figure 1c) have been exposed with different doses (charge per surface unit, C/m2), obtained by changing dwell times and maintaining a fixed current (300 pA) and beam step (2.5 nm in X and Y directions). A buffered HF (BHF) solution16 (15 mL H2O, 164 mL NH4F 40%, 22 mL HF 48%) has been used for etching the SiO2 film; the nominal etch rate of this solution is 50 nm/min, but it is variable with temperature, state of the solution, and quality of the oxide. For this reason, the correct time has been determined immediately before performing the etch of the exposed sample. To this end, an unexposed test sample with the same oxide quality and thickness (grown in the same run) has been etched. It is well-known that SiO2 is hydrophilic, meanwhile naked Si surface is hydrophobic.
Figure 2. (a) Portion of an AFM image showing 5 areas after the half-time SiO2 etch, exposed with increasing dose. (b) A profile taken along the five areas of (a). 1097
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Figure 3. The depth of exposed areas is reported as a function of the exposure dose. On the left: an initial layer 45 nm thick has been used; after the half-time BHF etch (in this case 29 s), a layer of SiO2 22 nm thick remained in unexposed areas. On the right: an initial layer of 70 nm has been used. In the two cases, the dose required for a complete exposure is quite similar.
surrounding the nanowire silicon core. Typically, SEM normal imaging gives an exposure dose lower than the one necessary for stimulating the oxide etching. This fact has been exploited for a precise alignment, by SEM imaging, on a desired position of the nanowire immediately before starting the SiO2 exposure. In order to be sure that a complete removal of the oxide can occur, a dose of 30% greater than the minimum dose required for full exposure has been used, previously determined. Figure 4
SiO2 film. This means that variations of the initial oxide thicknesses, in the range of few tens of nanometers, do not substantially modify the minimum dose for full exposure, that has been determined to be 2 × 104 C/m2. Of course, greater thicknesses require higher etch times. Oxide Windowing and Selective Doping of Silicon Nanowires. The e-beam stimulated silicon dioxide etching is unsuitable for the definition of large areas due to the high doses required. Nevertheless, it can be usefully employed as a precision scalpel in order to remove oxide from small areas. In a previous work,12 this technique has been employed for opening windows through the oxide of silicon nanowires fabricated on an n-doped silicon on insulator (SOI) substrate. A metal contact was defined in the window, and the effect as a control gate of a metal-n silicon junction FET has been demonstrated. In this work, this technique has been further investigated and applied for the selective doping of a silicon nanowire through a well-delimited area. Silicon nanowire devices have been fabricated following the process already reported in detail elsewhere.10,17 The process can be briefly resumed as follows. The starting material is a SOI substrate with a ⟨100⟩ top silicon layer 260 nm thick, uniformly n-doped (phosphorus) 5 × 1017 cm−3. A 50 nm thick SiO2 layer, to be used as a mask for the silicon etching, was grown by means of dry thermal oxidation and patterned by e-beam lithography, using a standard PMMA resist. After the SiO2 etching and PMMA stripping, the top silicon layer was anisotropically etched using a KOH solution (35% in weight) saturated with isopropyl alcohol (IPA) at 43 °C. The anisotropic etching, stopping on well-precise crystalline planes, defines a very regular trapezoidal cross section, even on long wires. After removal of the SiO2 mask, a well-controlled reduction of the cross-section is performed by stress limited oxidation. The high uniformity of the section and the good control of the oxidation reduction allow the fabrication of several micrometers long SiNWs18 with final triangular cross section as narrow as 10 nm. The reduction process by oxide growth can be performed both in a single oxidation step or by successive oxidation and oxide removal steps (by BHF etch), until the desired nanowire width is reached. At the end of the reduction by oxidation, the silicon nanowire core results embedded in silicon dioxide with a thickness established by the last oxidation step. A typical final SiO2 thickness of Th = 70 nm has been considered for the purposes of this work. At this point, the e-beam stimulated oxide etching technique is employed for opening a window through the oxide
Figure 4. SEM images of a silicon nanowire positioned between silicon leads for routing the electrical signal to large area pads with a window in the oxide surrounding the nanowire. The inset shows a particular of the SiNW central region: the silicon core has been stripped from the SiO2 that still surrounds all the rest of the nanowire.
is a composition of two SEM images showing a typical fabricated nanowire, positioned between large silicon leads necessary for routing the electric signal. The enlargement shows the central region of the nanowire where the silicon oxide has been selectively removed by e-beam stimulation and half-time etch. A 600 nm wide opening in the SiO2 surrounding the nanowire has been obtained, while the rest of the nanowire is still embedded in 35 nm thick SiO2 (Th/2). An opening as narrow as 50 nm can be fabricated using this technique.12 The opening through the oxide has been used for doping selectively the nanowire. In particular, SiNWs uniformly n doped 5 × 1017 cm−3 have been heavily p doped (p+) in the 1098
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Figure 5. The process for selective doping of a central portion of a silicon nanowire device is represented. (a) The uniformly n-doped SiNW device after reduction by oxidation (SiNW core embedded in SiO2) is sketched. (b) After the opening through the oxide has been obtained by e-beam stimulated etching, boron diffusion by solid ceramic source is performed. (c) The p+ central region and silicon large pad areas are provided of metals for routing the electrical signal. (d) An electrical scheme of the final device is shown.
center where the opening was defined. In this way, two p+n junctions disposed in series along the nanowire have been generated. The procedure is schematically represented in Figure 5. After SiNW fabrication (a), and opening definition (b), silicon doping by boron diffusion from solid ceramic source (Filmtronics) has been performed (c). Essentially, the sample with nanodevices has been positioned on the B-type ceramic source and a rapid thermal annealing process has been performed for 10 min at 800 °C in N2 atmosphere by means of a JPELEC100 RTA machine. In this way, boron diffusion is allowed in the windows defined by ebeam stimulated etching, and it is masked in the remaining regions of the nanowire by the 35 nm thick SiO2 layer. The p+ doped region has then been contacted by a large aluminum track (see Figure 5c) defined by e-beam lithography on standard PMMA resist, aluminum thermal evaporation, and liftoff. Even if the aluminum deposition is wider than the opening on the nanowire, the electrical contact occurs only in the p+ doped area, because the rest of the device is covered by the SiO2 film. Metal contact definition on the large area n-doped silicon pads (see Figure 5c) completes the device fabrication process. A low resolution e-beam lithography on standard PMMA resist has been used for opening large windows, 150 × 150 μm2, on silicon pads. The oxide is then removed from these areas, and metal evaporation and lift-off have been used for defining contacts. Figure 6 shows a composition of SEM images of a typical np+n-doped SiNW device. The main image shows the nanowire 3 μm long, positioned between silicon leads that route the electrical signal to large area Si pads. In the top inset, the large area metal pads contacted with microwires are shown. The bottom right is an high-magnification SEM image that shows the 400 nm wide opening defined in the center of the nanowire. The silicon core has a diameter of 60 nm and the aluminum deposition, which makes electrical contact with the p+ doped opening, is about 60 nm thick. In the next section, doping simulations and electrical characterization of typical devices, similar to the one shown in Figure 6, will be presented and discussed. Process Simulations and Electrical Characterization. In Figure 5d, a model (equivalent circuit) of the np+n-doped nanowire is proposed. This model is based on the following hypotheses: (1) the whole cross section in the window region, exposed to boron diffusion, is p-doped (the original n-doping is inverted); (2) the 35 nm silicon dioxide, remained in the unexposed regions of the nanowire, is thick enough for masking the boron diffusion, in such a way that all the unexposed portions of the nanowire remain n type; (3) boron diffuses from the window along the SiNW; in this way, p+n junctions
Figure 6. SEM images of a device based on a silicon nanowire 60 nm wide and 3 μm long, selectively doped through a window 400 nm wide positioned at the middle of the nanowire. The top inset is an overall vision of the device with pads microbonded to external connections, ready for electrical measurements. In the bottom inset a detail of the window, where the p+ doping has been performed and aluminum electrode 60 nm thick has been deposited, is shown.
along the wire are formed close to the two sides of the window but under the SiO2 layer. The last hypothesis is important because it implies that the metal, deposited on the oxide window, makes contact only with the p+-doped region, forming the common anode of the two diodes of Figure 5d. In order to support these hypotheses, process simulations have been performed by Synopsys TCAD commercial simulator. A substrate made of silicon dioxide on silicon has been considered, and a silicon nanowire 100 nm wide, n-doped 5 × 1017 cm−3 has been designed in a top silicon layer. A 35 nm thick silicon dioxide layer has been deposited, and a window 400 nm wide has been opened through the oxide in the middle of the SiNW. Diffusion by ceramic source has been simulated by implanting boron with very low energy (0.01 keV) in such a way that it remained in a very thin layer at the surface of the structure. The implanted dose has been 1013 cm−2, which is compatible with previous experimental measurements on planar silicon, doped by means of the same boron ceramic source. At this point, an annealing at 800 °C for 10 min in N2 atmosphere has been simulated. Figure 7 shows a typical simulation result. In the main image, it is shown that the silicon nanowire is embedded in SiO2 (made transparent for clearness) apart from the central region where oxide has been removed. 1099
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Figure 7. Synopsys TCAD simulations of a typical device. In the central image, it is shown the SiNW with the window through the oxide surrounding it; the oxide is made transparent for clearness. The SiNW was initially doped n type. After boron diffusion, the doping of the central part is inverted (p type). On the left, a cross section taken in the central region is shown; the doping results p type in all the section. On the right, a cross section taken in a side region (under the oxide) is shown; the nanowire is still n type. On the bottom right, a longitudinal section is shown; the two pn junctions along the nanowire are visible.
Figure 8. (a) An I−V characteristic of a selectively doped SiNW measured between the extremities (cathodes K1 and K2) is reported; this characteristic is typical of two junction back to back, as schematized in the top inset. (b) An I−V characteristic between the metal contact on the p+doped region of the nanowire (Anode A) and the right (cathode K2) extremity is shown. This characteristic is typical of a pn silicon junction.
cm−3. A section taken in the longitudinal direction, which makes more evident the two p+n junctions, is also shown. The experimental electrical measurements are in full agreement with the double diode model. As an example, in Figure 8 typical I−V characteristics of a device similar to the one shown in SEM images of Figure 6 are reported. Figure 8a shows an I−V characteristic measured between the extremities of the nanowire, that are the cathodes K1 and K2 of the two p+n junctions. The curve is typical of two back-to-back silicon diodes with reverse currents of the order of few nanoamperes.
From the doping scale, it is possible to see that this central region is fully p-doped, meanwhile the rest of the nanowire remained n-doped. Clearly visible are the two p+n junctions under the SiO2 very close to the two sides of the window. Two cross sections, taken respectively in the central p-doped region and in one of the extremities protected by SiO2, are also shown. It can be seen that the central cross section is p-doped from a maximum of 1019 cm−3 at the surface to about 1018 cm−3 in the middle of the nanowire, while the cross section in the area protected by the SiO2 remained uniformly n-doped 5 × 1017 1100
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(10) Pennelli, G.; Piotto, M. J. Appl. Phys. 2006, 100, 054507. (11) Keeffe, T. W. O.; Handy, R. M. IEEE Trans. Electron Devices 1968, 15, 436. (12) Pennelli, G.; Piotto, M. Proc. of the 9th IEEE Conference on Nanotechnology IEEE-NANO Genoa 2009, 295. (13) Allee, D. R.; Broers, A. N.; Pease, R. F. W. Proc. IEEE 1991, 79, 1093. (14) Tsutsumi, T.; Ishii, K.; Hiroshima, H.; Hazra, S.; Yamanaka, M.; Sakata, I. J. Vac. Sci. Technol., B 2000, 18, 2640. (15) Pennelli, G.; D’Angelo, F.; Piotto, M.; Barillaro, G.; Pellegrini, B Rev. Sci. Instrum. 2003, 74, 3579. (16) Fundamentals of Microfabrication and Nanotechnology: The Science of Miniturization; Madou, M. J., Ed.; CRC Press: Cambridge, 2011. (17) Pennelli, G.; Pellegrini, B. J. Appl. Phys. 2009, 101, 2139. (18) Pennelli, G. Microelectron. Eng. 2009, 86, 2139.
In Figure 8b, an I−V characteristic, measured between the metal track contacting the p+ region (the anode A) and one of the extremity is shown. This characteristic is typical of a diode, and this makes evident the presence of a p+n junction. Despite the limitation of the conduction due to the small section of the nanowire, the forward current for positive voltage is at least 2 orders of magnitude greater than the reverse current (for negative voltages). Conclusions. The selective doping of silicon nanowires through precise openings in the surrounding SiO2 layer has been proposed. In particular, the doping of the central region of a n type silicon nanowire has been made p type. SiO2 etch has been performed by exploiting the properties of e-beam stimulated oxide etching. This technique has been completely characterized, and it has been obtained that the full exposure dose is the same for thicknesses in the range 45−70 nm. This indicates that the dose necessary for a full exposure can tolerate variation in the oxide thickness at least of the order of few tens of nanometers. It has been also determined that doses obtained by normal SEM imaging are not sufficient for stimulating the etching. In this way, a precise alignment of windows on the device can be performed by direct SEM imaging of the nanowire before starting the SiO2 exposure. This is a clear advantage in terms of window positioning resolution with respect to standard e-beam lithography based on PMMA where the alignment must be performed in structures distant from the exposed areas. Nanowires, fabricated with a uniform n-doping, have been pdoped by boron diffusion that occurs through the oxide windows in the central region. As established by numerical simulations, the remained Th/2 SiO2 layer is enough for preventing the boron diffusion in the rest of the nanowire that remains n-doped. In this way, two p+n junctions are obtained along the nanowire, close to the extremities of the oxide window. The np+n doped SiNW device can be modeled by two junctions (diodes) placed in series. Measured I−V characteristics confirm the formation of pn junctions along the silicon nanowire.
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REFERENCES
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