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Enhanced Giant Piezoresistance Performance of Sandwiched ZnS/Si/SiO2 Radial Heterostructure Nanotubes for Nonvolatile Stress Memory with Repeatable Writing and Erasing Baochang Cheng, Li Xiong, Qiangsheng Cai, Haiping Shi, Jie Zhao, Xiaohui Su, Yanhe Xiao, and Shuijin Lei ACS Appl. Mater. Interfaces, Just Accepted Manuscript • DOI: 10.1021/acsami.6b10966 • Publication Date (Web): 01 Dec 2016 Downloaded from http://pubs.acs.org on December 6, 2016

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ACS Applied Materials & Interfaces

Enhanced Giant Piezoresistance Performance of Sandwiched ZnS/Si/SiO2 Radial Heterostructure Nanotubes for Nonvolatile Stress Memory with Repeatable Writing and Erasing Baochang Cheng,†,‡,* Li Xiong,† Qiangsheng Cai,† Haiping Shi,† Jie Zhao,† Xiaohui Su,‡ Yanhe Xiao,† and Shuijin Lei† †

School of Materials Science and Engineering, Nanchang University, Jiangxi 330031, P. R. China, and ‡Nanoscale

Science and Technology Laboratory, Institute for Advanced Study, Nanchang University, Jiangxi 330031, P. R. China

ABSTRACT It is a challenge to realize nonvolatile stress-writing memory. Herein, we propose a strategy to construct rewritable stress information storage devices, consisting of deliberately designing individual sandwiched ZnS/Si/SiO2 radial heterostructure nanotubes synthesized by one-step thermal evaporation method. Bulk trap-related Poole–Frenkel hopping mechanism is proposed. Carriers are localized in narrow bandgap Si intermediate layer, and moreover incorporated impurities and heterointerface defects can serve as charge trap centers or storage mediators. Compressive strain can induce trap barrier height to decrease at relatively low operation bias voltage, whereas tensile strain can induce it to increase, resulting in a giant piezoresistance effect. After both loading compressive and tensile strains at low bias voltage, additionally, the emptying of trap states results in a high resistance state. However, the emptied trap states can be filled up by applying a relatively high bias voltage without strains, and correspondingly the memories return to low resistance state. The emptying and filling of trap states, respectively applied by strains and high electric field, results in a repeatable writing/easing nonvolatile memory effect. The results indicate that the creation and modification of trap states in multiscale nanostructures can give an avenue to the development of novel nanodevices for rewritable nonvolatile stress sensor and memory. KEYWORDS: nanotubes · nanodevices · charge transport · data storage · flexible electronics.

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Address correspondence to [email protected]. ACS Paragon Plus Environment

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1. INTRODUCTION Piezoresistance (PZR) is the variation in the electrical resistivity of a solid induced by an applied mechanical stress. In bulk crystalline materials，its origin such as silicon is mainly a variation in the electronic structure which results in an amendment of the effective mass of charge carriers.1,2 In Si nanowires, however, a giant PZR (GPZR) effect, which was more than two orders of magnitude larger than the known bulk effect, was found.3 It has have attracted considerable attention in the GPZR properties of nanosemiconductors due to their wide applications in stress sensor. Although GPZR behaviors have been intensively investigated in Si-based nanomaterials,2,3-11 numerous nanostructured materials, such as carbon nanotube,12-16 graphene,17 GaSb,18,19 ZnO,20 GaN,21 Ge,22 InGaAs/GaAs,23,24 SiC,25-26 Sr2IrO4,27 and nanocomposite,28-31 show piezoresistivity as well. At present, some GPZR mechanisms, such as carrier mobility variation,3,32 effective carrier mass variation,33 insulator to metal transition,34 electron concentration change,35 trap activation energy change,36 surface Fermi-level shift,37,38 and non-stress-related surface charge relaxation4,39 have been proposed, whereas the physicochemical processes at the nanoscale are still controversial. For the found PZR materials, especially unfortunately, their resistivity can immediately return to initial state once the externally applied stress is withdraw completely, showing a volatile feature. Therefore, almost all of the PZR materials studied recently do not show the properties of nonvolatile data storage. If the stress-induced piezoresistive information can be stored for long time after removing external stress, the materials will be promising candidates for nonvolatile stress sensor and memory applications. Semiconductor one-dimension (1D) nanostructures have demonstrated their potential as building blocks for nanoscale electronics. Because the density-of-states (DOS) decreases with the increase of 1D energy, the same number of charges, induced by electrostatic gating, can induce a greater shift of Fermi level, resulting in greater tunability as comparison to 2D, 3D and bulk counterparts.40 For these building blocks versus nanostructures fabricated by “top-down” processing, additionally, an advantage is that their critical nanoscale features are defined in the course of synthesis, which can yield uniform

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structures on atomic scale.41,42 Owing to very large surface-to-volume ratio, the surface states of nanostructures play a key role in determining their physical properties. For surface/interface states, particularly, it can be expected that Fermi level pinning would leads to the formation of band bending and depleted region near the surfaces or interfaces.43-45 In order to meet the growing demand for device performance, it is essential to tailor the semiconductor properties by designing and controlling the fabrication of new nanostructures. Silicon nanostructures are important because they are totally compatible with the microelectronics on the basis of Si. Since the discovery of Si whiskers,46 Due to their interesting electrical and optical properties, Si nanowires have drawn extensive attention in mesoscopic research and device applications as well as basic research.41,47-49 Although the isolated transistors based on carbon nanotubes have shown excellent performance,50,51 the difficulty in fabricating pure semiconductor nanotubes make the integration on a large scale challenging. Recently, the successful synthesis of pure silicon nanotubes was also reported using molecular beam epitaxy and chemical vapor deposition on a nanochannel Al2O3 substrate,52,53 sacriﬁcial template strategy,54-56 thermal evaporation of SiO2,57 supercritical hydrothermal synthesis,58 and direct transformation of silicon substrates through plasmatreatment.59 In contrast, the preparation and application of heterostructure nanotubes have rarely been explored although individual Si 1D nanostructures have been extensively researched. In comparison with single Si 1D nanostructures, 1D heterostructure nanotubes can form radial junction, and therefore they have more freedom to tune their physical properties by selecting the materials with different bandgaps. Inspired by the above ideas, sandwiched ZnS/Si/SiO2 radial heterostructure nanotubes were synthesized in the present work, by a thermal evaporation of ZnS, Si and metal Sn powders to create and modify charge traps. By scaling down, the thickness of Si nanotube-based devices can be finally comparable with the de Broglie wavelength of electrons. Under such a size scale, it can naturally be expected that two-dimensional quantum confinement effect would enhance piezoresistive sensitivity. This novel class of two-terminal mechanical nanodevices, constructed on the basis of individual


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sandwiched ZnS/Si/SiO2 heterostructure nanotubes, can show a strain dependence of GPZR effect. The sensing mechanism is ascribed to the presence of defect-related bulk trap states within intermediate layer Si. Due to the lattice mismatch at ZnS/Si/SiO2 heterostructure interface and the incorporation of impurities in Si lattice, quantities of defects exist in Si. Moreover, these abundant defects can serve as charge traps or mediators, namely, the storage medium for a memory. The strain dependent variation of trap barrier height results in GPZR behavior. More importantly, the resistance of devices still remain relatively large variation after completely withdrawing external strains, and moreover the change magnitude is dependent of the strain variables, resulting in a nonvolatile memory function. It originates from the reduction of trapped charge density after applying an external stain. In contract, the filling of the trapped states leads to the recovery of resistance at a relatively high external bias. We present the nonvolatile piezoresistance random access memory (PRRAM) based on individual sandwiched ZnS/Si/SiO2 nanotubes, through which the writing/erasing access of the memory cell is programmed by respectively loading strain and high bias voltage. 2. EXPERIMENTAL METHODS 2.1. Material synthesis Sandwich-like ZnS/Si/SiO2 radial heterostructure nanotubes employed in this work were prepared by the thermal evaporation of Si, ZnS and metal Sn powders. A horizontal corundum tube was installed inside a tubular furnace. High pure ZnS and Sn powders were mixed and then placed in a corundum crucible, and the Si powder was put next to the ZnS powder along to the downstream side of flowing high-purity Ar+5%H2. Prior to heating, the tube was held in a constant flow of the mixed of 200 ml/min gas for 1h to ensure that O2 in the tube was eliminated. The furnace was then heated up to 1200 °C and held for 60 min. In the course of growth, the gas flow maintains at a constant rate of 30 ml/min. Some yellowish cotton-like products were found on the inner wall of tube after the furnace was cooled to room temperature. 2.2. Morphology and structure characterization


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The as-prepared products were analyzed by means of X-ray diffraction (XRD; Phillips X’Pert PRO with Cu Kα radiation), field emission environmental scanning electron microscopy (FE-ESEM, FEI Quanta 200F), transmission electron microscopy (TEM; JEOL JEM-2000FX) equipped with energy–dispersive X-ray spectroscopy (EDS), and high-resolution TEM (HRTEM; JEOL JEM-2010, operated at 200 kV). The micro-Raman measurement was carried out by a confocal laser micro-Raman spectrometer (LABRAM-HR, France JY Company) at room temperature, which was performed in the backscattering geometry using an Ar+-ion laser with 514.5 nm wavelength as an excitation light source. The measurement of room temperature photoluminescence (PL) was conducted using a He-Cd laser with 325 nm wavelength as an excitation light source. 2.3. Fabrication and measurement of nonvolatile stress-writing memory For the preparation of devices, individual ZnS/Si/SiO2 nanotubes were transferred on flexible kapton substrates and the two-terminal electrodes of the single nanobelt device were prepared by semi-dried Ag paste. Afterthat, a post-annealing was carried out under Ar+5%H2 atmosphere at 400 °C for 10 min to minimize the contact resistance between electrode and nanotube. Finally, the devices were packed via polydimethylsiloxane (PDMS) in order to increase the mechanical strength of the device. Sample deformation was controlled by a linear motor. The measurement of electrical characteristics was carried out by the combination of synthesized function generator (Stanford Research System Model DS345) and low-noise current preamplifier (Stanford Research System Model SR570). 3. RESULTS AND DISCUSSION 3.1 Characterization of as-synthesized products The X-ray diffraction (XRD) pattern of as-grown product, as illustrated in Figure 1a, clearly evidences that the nanostructures are comprised of two crystalline phases, namely , cubic diamond Si (JCPDS file No. 27-1402) and hexagonal wurtzite ZnS (JCPDS file No. 36-1450). No characteristic peaks were detected in other crystalline forms within the XRD detection limit. The observation of lowmagnification FE-ESEM, as shown in Figure 1b, reveals that as-prepared product is mainly composed


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of quantities of wire-like nanostructures, ranging in length from several to several tens of micrometers. These wire are oriented randomly, and furthermore most of them are bent slightly. As shown from highmagnification FE-ESEM (Figure 1c and d), the nanowires show different contrasts between their center and edge, indicating that they may exhibit as tubular structure. 800

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Figure 1. Structure and morphology characterization of as-synthesized product. (a) XRD pattern. (b) Low-magnification FE-ESEM image, displaying general morphology. (c) and (d) Higher-magnification FE-ESEM images, displaying tube-like structure. Shown in Figure 2 are typical low-magnification TEM images of as-synthesized nanostructures. The wires display different contrasts between edge and core. They are coated with outer layers of a shallow contrast along the direction of wire axis, whereas the intermediate layer shows darker contrast, indicating the formation of multi-layer nanotubes. EDS analysis, illustrated in Figure 2e, reveals that the shallow area of tube-like wires is only composed of Si. However, the shallow-darkshallow area consists of Zn and S besides Si. The abrupt interface between inner and outer walls obviously shows that ZnS tube is fully sheathed by a Si layer. At their tips, additionally, there exist catalytic particles (Figure 2d), identified as Sn by the EDS analysis (Figure 2e).


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Figure 2. TEM images and composition analysis of ZnS/Si/SiO2 radial heterostructures. (a)~(c) TEM bright-field images, showing two layer tubular structures with a relatively thick wall. (d) EDS spectra in (1), (2) and (3) taken from the corresponding regions in (c), showing that the black area is mainly composed of ZnS besides Si, the gray area is composed of Si, and the sphere at the top end of the 1D nanostructures is mainly composed of Sn besides Si. Figure 3 is HRTEM images, taken from the fringe part of a single nanotube, which show more detailed microstructure. As seen from Figure 3a, the outmost layer of the tube presents amorphous structure. As seen from fast Fourier transform (FFT) images (Figure 3b) taken from the intermediate layer nanotube wall (red dotted frame in Figure 3a), additionally, only one set of single-crystal diffraction spot, indexed to a cubic Si. In the inverse FFT (IFFT) analysis taken from the middle region of nanotube (blue dotted frame in Figure 3e), the periodic structure of the two alternating stripes is formed along the cross-direction of the tube on the whole. The corresponding FFT analyses, as shown in Figure 3d, implies a superposition of two sets of single crystal diffraction spots, which can be indexed


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to be a cubic Si (red) with [110] zone axis and a hexagonal ZnS with [111] zone axis (blue), respectively. Therefore, the nanotube is composed of hexagonal ZnS inner wall, cubic Si interlayer, and amorphous SiO2 outer wall. The thickness of SiO2, originating from the natural oxidation of Si under air atmosphere, is less than 10 nm. Due to the overlapping of two parallel planes between Si and ZnS, ordered Moiré fringes produce in the relatively dark region. The corresponding structure model of cube Si (upper) and hexagon ZnS (lower) projected along [110 ] cube and [111] hexagon is shown in Figure 3f and distinctly reveals the relation between their orientations. Owing to the incorporation of Si atoms into ZnS lattice, the growth of ZnS is almost along [101] direction rather than common [001] c-axis direction. In crystallography, (011) and (101) are equivalent, and moreover the included angle between the two planes is 710. A slight fluctuation can cause the crystal growth to change from (011) to (101) due to a small difference in surface energy between (011) and (101) . Therere, the nanotubes can be curved. Although the facet distance of cube Si (111) is very close to hexagon ZnS (101) , they form a coherent orientation, which is in favor of the decrease of stress and makes the energy of system reduce. It can be seen from Figure 3f that it cannot form a well-coherent relation between Si and ZnS due to the difference in Si and ZnS lattice. Therefore, there exist quantities of stress at their heterointerface.


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Figure 3. Microstructure characterization of ZnS/Si/SiO2 radial heterostructures. (a) HRTEM image taken from the fringe part of a single ZnS/Si/SiO2 nanotube. (b) and (c) Corresponding FFT and IFFT analyses of the red dotted frame area in (a) taken from the intermediate layer of nanotube wall, indexed to a cubic structure Si with [110] zone axis. (d) and (e) Corresponding FFT and IFFT analyses of the blue dotted frame area in (a) close to the inner layer of nanotube wall. The FFT pattern (d) is composed of two sets of fundamental patterns, indexed to a cubic structure Si (red) with [110] zone axis and hexagonal structure ZnS with [111] zone axis (blue), respectively. The periodic structure of the two alternating stripes exists in the IFFT pattern (e), implying an appearance of ordered Moiré fringes. (f) The structure model of the epitaxial growth relationship of cubic Si (upper) and hexagonal ZnS (lower) projected along [110] and [111] direction, respectively, displaying that the (111) planes of cubic Si is parallel to the (101) planes of hexagonal ZnS and forms a relatively well-coherent relation. (g)


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Schematic diagram of ZnS/Si/SiO2 radial heterostructure nanotube. 3.2. Raman scattering and Photoluminescence (PL) 400

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Figure 4. Spectroscopy characterization of ZnS/Si/SiO2 radial heterostructure nanotubes. (a) Raman scattering pattern. (b) Room-temperature PL spectrum. Raman scattering and PL spectroscopies were measured to further demonstrate the quality and crystal structure of ZnS/Si/SiO2 nanotubes. The measurement of Raman scattering was performed with the 514.5 nm line of Ar+ laser, as shown in Figure 4a. An asymmetric peak at 512 cm-1 is markedly observed, which can be ascribed to the first order TO phonon peak of Si. However, it is redshifted by 8 cm-1 as compared with the optical phonon of bulk silicon (q=0).60-62 In the nanostructures, first, phonon confinement effects exist due to a small size.63 Due to the incorporation of impurities such as Zn and S, second, numerous defect centers are formed in the nanostructures, and thus long-range symmetry is broken and phonon is localized.64 Due to the growth of Si on ZnS surface, additionally, the crystal curl into tubular structure, and thus a tensile stress exists in Si tubular nanostructures. As a result, TO mode of Si takes place a relatively large redshift. For as-synthesized nanostructures, the room temperature PL spectrum was also measured by using the He-Cd laser with 325 nm emission line as an excitation resource, was provided in Figure 4b. The spectrum is dominated by a broad peak centered at 710 nm (1.75 eV). The full width at half maximum is about 180 nm. Based on the much larger PL energy than the bulk Si with indirect band gap and the


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spectral blueshift of PL with decreasing Si nanostructure diameter, the PL may be ascribable to the quantum size effect related to the relatively small Si nanostructures.65 The broadening effect of the PL peak may arise from the wide distribution of Si nanostructure diameters and the present of numerous defects in Si lattice. Therefore, Raman scattering and PL spectroscopies can further demonstrate the presence of abundant defects in tubular Si nanostructures. 3.3. GPZR effect of ZnS/Si/SiO2 nanotube

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We fabricated prototype stress switching-based sensor and memory cell, as shown schematically in Figure 5a (lower right inset), which consists of an individual ZnS/Si/SiO2 radial heterostructure nanotube which is in contact with Ag electrodes on a flexible kapton substrate. Moreover the devices were packed by polydimethylsiloxane (PDMS). Once the substrate is deformed, a pure compressive/tensile strain is created in the nanotube because the mechanical behavior of the entire cell structure is determined by the substrate. Representative I–V characteristics of an individual nanotubebased PRRAM cell are shown in Figure 5 under different static strains, where tensile strain is defined as positive while compressive strain is defined as negative. All the curves show nonlinear characteristics. To understand the piezoresistive mechanism, the I–V relationship in several models,66-70 such as I∝V for Ohmic law, ln(I)∝Sqrt(V) for Schottky emission, I∝V2 for space charge limited current (SCLC), ln(I/V)∝Sqrt(V) for Poole–Frenkel (PF) emission, and ln(I/V2)∝1/V for Fowler-Nordeim (FN) tunneling, are used to fit the I–V data, respectively. Figure 5b show the best fittings for the I-V curves under different strains. Plotting ln(I/V) versus V1/2 can be obtain a linear plot, suggesting that the conduction mechanism in the nanodevices mainly originates from bulk trap-related PF hopping rather than nanowire-electrode contact-related barrier variation in applied voltage range of 0–1 V. The PF emission refers to electric-field-enhanced thermal emission from a trapped state into a continuum of electronic states, in which usually, but not necessarily, the conduction band in an insulator. If this mechanism is assumed, the current through an individual ZnS/Si/SiO2 heterostructure nanotube can be given by: I = CV exp(−q(φ − (qV / πε 0ε r )1/ 2 ) / kT )

Where I is the current density, C is the trap density related constant, V is the applied bias voltage, q is the charge of electron, qφ is the barrier height for electron emission from trapped state (that is an electron must cross to move from one atom to another in the crystal) associated with Coulomb potential, namely trap ionization energy, ε0 is the permittivity of the free space, εr is the dynamic dielectric constant, k is the Boltzmann constant, and T is the absolute temperature. From Figure 5b, additionally, it ACS Paragon Plus Environment

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can also be seen that the curve slope is nearly independent of the externally applied strains, with a statistical average of about 0.88, indicating that only PF hopping barrier height qφ changes under different strains. Under a compressive strain, the barrier height qφ decreases, and hence it becomes easier for electrons to ionize from traps and cross the heterostructure nanotubes. Correspondingly, the conductivity increases due to significant increase in mobility and concentration of carriers. In contrast, the barrier height qφ increases under a tensile strain and fewer electrons can surpass the barrier, resulting in a decrease of current. 10 100

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we have performed the measurement of I-V characteristics of an individual ZnS/Si/SiO2 nanotube-based PRRAM under loading periodically dynamic strains, because the trapped charge density and barrier height in the nanostructures can reach readily a steady state. A triangular wave voltage was applied with a maximum magnitude of 1 V and a frequency of 0.01 Hz at room temperature, and meanwhile the device was periodically loaded a compressive stress with a strain of about -1.0 % for 1 s and then released for 2 s. Representative result acquired from the device shows the current variation behavior, as shown in Figure 6a. From an enlargement graph shown in Figure 6b, it can obviously be seen that the conductivity increases when a compressive strain is loaded, while it decreases when the stress is withdrawn. Although the I-V characteristics of the nanodevices show a higher conductivity under loading a static compressive strain than that without loading any deformation after loading a periodically compressive strain, both of their conductivity are lower than the primitive value before loading the periodically compressive strains, as shown in Figure 6c. As seen from the fitting curves of ln(I/V) versus V1/2, as shown in Figure 6d, under static compressive strain, the trap barrier height qφ increases after loading periodically compressive strain compared with the primitive trap barrier height qφ. Without any strains, however, the trap barrier height qφ shows a large increase. Especially, the lope of curve fitted by PF emission I-V increases slightly after loading periodically compressive strain, indicating a decrease in dynamic dielectric constant εr. After loading a periodically compressive stress, trap states are emptied, and rarely charges can migrate freely in the heterostructure nanotubes, resulting in a decrease of dynamic dielectric constant. Similarly, the measurement of I-V characteristics of individual ZnS/Si/SiO2 nanotube-based devices was also performed under loading a periodically dynamic tensile stress with a strain of 1.0 %, as shown in Figure 7. For the nature of current variation under a periodically tensile strain, it is just opposite compared to loading a periodically compressive strain. The conductivity decreases upon loading a tensile strain, whereas it increases upon releasing the tensile stress loaded. After the periodically tensile stress is withdrawn, both of their conductivity with loading a static tensile strain and without loading


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any external strains are similarly lower than that of the pristine state before loading the periodically dynamic tensile strain. Moreover, the ln(I/V) versus V1/2 curve, as shown in Figure 7d, further shows the barrier height φ increases under loading tensile train. Additionally, the device is almost nonconductive after loading a periodically tensile strain, indicating the complete empty of charge traps. 200

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Figure 7. Current variation under tensile stress with a strain of about 1.0 %. (a) I-T curve under applying a periodically tensile stress, loading 1 s and then releasing 2 s (green curve), and the red curve represents the applied triangle wave voltage with a sweeping frequency of 0.01Hz. (b) An enlarged graph of a dash frame in (a). (c) I-V cycle curves of before loading a periodically compressive strain (black), and under a static compressive strain (green) and without any external deformation (red) after withdrawing a periodically compressive stress. (d) The PF emission fitting for the positive-biased part in (c). 3.4. Rewritable nonvolatile stress information memory based on individual ZnS/Si/SiO2 radial heterostructure nanotube As seen from Figure 6c and 7c, more interestingly, the devices cannot return to their low resistance state ACS Paragon Plus Environment

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(LRS) after completely removing external compressive and tensile strains at a relatively low bias voltage of 1 V, and still remain relatively large resistivity (high resistance state, HRS), indicating that data information can be written by loading external strains at a relatively low bias voltage. Similarly importantly, their resistance can be back to LRS after a bias voltage higher than about 8.5 V is applied without strain, as illustrated in Figure 8. This indicating that the stress-related storage data can be erased effectively by exerting a relatively large external electric field. Therefore, the stress information can be written/set by loading an external strain at a relatively low bias voltage and then erased/reset by applying a relatively high external electric field without strain.

Figure 8. After applying strains at a low bias of 1V, I-V characteristics with applying a relatively large bias voltage of 10 V, revealing the change of device from HRS into LRS at about 8.5 V under the first sweep. The numbered arrows (1–3) indicate the sweep direction of applied bias voltage. We further measured the memory characteristics of the heterostructure nanotube-based PPRAM cell and the corresponding experiment results were illustrated in Figure 9. After applying a compressive strain of about -1.0 % at a relatively low bias voltage of 1.0 V, the resistance difference between LRS and HRS is around 8 MΩ under reading out at the same low bias of 1.0 V, and the corresponding ON/OFF-state resistance ratio of about 2.8, defined by RHRS/RLRS, can be obtained. Similarly, after applying a tensile strain of about 1.0 % at the bias of 1.0 V, the resistance difference between HRS and ACS Paragon Plus Environment

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LRS is around 80 MΩ under reading out at the bias of 1.0 V, and the corresponding ON/OFF-state resistance ratio can reach about 12. Compared with compressive strain, tensile strain can induce a larger memory window due to a higher OFF-state resistance. In Figure 8, additionally, the multiple continuous “write-read-erase-read” cycles demonstrate a high degree of reversibility and stability.

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read cycle, revealing that strain can induce a HRS and large bias can reset a LRS. (c) A higher magnification in the purple dotted frame in (b), demonstrates the presence of an obvious memory window of 2.8× between HRS and LRS. (d) Cycling characteristics of the memory device written/set by loading a tensile strain of 1.0 % at a low bias voltage of 1.0 V, read out at the same bias voltage of 1.0 V, and erased/reset by applying a large bias voltage of 10 V without strain. (e) The expanded graph of the green dotted frame in (c) shows a detailed write-read-erase-read cycle. (f) A higher magnification in the purple dotted frame in (e), reveal the presence of a larger memory window of 12× between HRS and LRS. For the outmost layer SiO2 in ZnS/Si/SiO2 nanotubes, its thickness is enough thin so that charges can cross freely it by direct tunneling under relatively large electric field. The tunable current by electric field and strain dictates that the predominant conductive mechanism mainly originates from bulkcontrolled PF hopping rather than injection-controlled nanotube/electrode interface Schottky emission, in which carrier transport must occur by trapped states rather than via direct thermionic emission from Ag electrodes. Moreover, the energy of trapped states must be close to the Fermi level of metal. If the trap barrier height was sufficiently lower in energy, the emission of the carriers from Ag electrodes directly into trap states would most likely dominate, while if the trap barrier height was significantly higher in energy, the emission of the carriers from Ag into the trapped state would also be a great important factor. In the sandwiched ZnS/Si/SiO2 radial heterostructure nanotubes, double type-I heterostructure can be formed based on the structure of their energy bands, and the corresponding schematic diagrams of strain-induced trap barrier and charge density variation are illustrated in Figure 10. In the double type-I heterostructure, charges can be localized in intermediate layer Si with narrow bandgap. In the course of nanotube growth, additionally, Si can be incorporated into ZnS lattice, and meanwhile Zn and S can also be incorporated into Si lattice. Moreover, the lattice mismatch can induce quantities of defects at Si and ZnS heterointerface, supported by the above experiment results of HRTEM, Raman scattering and PL, ACS Paragon Plus Environment

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and similarly quantities of defects can exist at Si and SiO2 interface as well. These defects can serve as trap states, and then capture and store charges, resulting into a dominant defect trap-related conduction in the transport current at room temperature for individual ZnS/Si/SiO2 nanotube-based devices. Electrons can obtain enough energy to get out of one trapped state by random thermal fluctuations, and then hop into another trapped state. Once there, the electrons can move through the nanotube, in a short period of time, before relaxing to another localized state. Tensile strain makes trap barrier height qφPF increase, and therefore it is difficult for electrons to get out of the traps, resulting in an increase of resistance. On the contrary, compressive strain makes qφPF decrease, and hence it is easier for electrons to get out of traps, resulting in a decrease of device resistivity. Therefore, the modulation of trap barrier height qφPF via strains results in a large variation of carrier mobility and concentration, and correspondingly creating a GPZR effect in ZnS/Si/SiO2 radial heterostructure nanotubes.

Figure 10. Schematic diagrams of strain-induced trap barrier and charge density variation for


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illustrating the GPZR-related memory effect. qφ, qφC, and qφT represent respectively the trap barrier height under original state, compressive strain, and tensile strain. V and Ef represent externally applied voltage and Si Fermi level, respectively. (a) Schematic energy band diagram of Ag, SiO2, Si, and ZnS, showing that the formation of type-I heterojunction induces the localization of carriers within intermediate layer Si with a narrow bandgap. (b) Under loading a compressive strain at low bias voltage, the height of trap barrier and the population of trapped electrons both decrease compared without loading any strain, resulting in an upshift of Si Ef and a decrease of device resistivity. Electrons can cross outmost layer SiO2 by direct tunneling, while cross intermediate layer Si by PF hopping. (c) Under loading a tensile strain at low bias voltage, the height of trap barrier increases compared without loading any strain, whereas the population of trapped electrons decreases, resulting in a downshift of Si Ef and an increase of device resistivity. (d) At externally applied bias voltage induced the height of energy band tilt more largely than that of trap barrier (qV>qφ), the emptied trap states are filled up, and corresponding the Ef of Si upshifts and the device returns from HRS into LRS. After exerting tensile and compressive strains, their conductivities both decreases at low bias voltage, and moreover they can be back to LRS by applying a relatively high bias voltage without strain, indicating that only the total number of trapped charges decreases after withdrawing the loaded strains, namely bulk trap state empty or detrapping. As a consequence, the concentration of electrons which can move freely reduces, and corresponding the Fermi level (Ef) of Si downshift, resulting in a HRS. In the course of loading tensile strains, more electrons can be forced out from traps as compared to compressive strains, indicating that detrapping incident is more pronounced which in turn decreases largely the concentration of electrons which can move freely in nanotubes. With the increase of bias voltage, subsequently, the energy band and Fermi level tilt gradually, and meanwhile the trap barrier height decrease.74 When the external electric field induced the height of energy band tilt exceeds that of the trap barrier, namely qV>qφPF, electrons can be injected into the emptied traps from the negative electrode end, resulting in a filling of trap states. The abrupt jumping of device current provides a ACS Paragon Plus Environment

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substantial support for this view of trap filling, as shown in Figure 8. At high bias voltage, additionally, impact ionization readily occurs, and quantities of free charges can be captured simultaneously by traps. The electrons don't need as much thermal energy to hop from one trap to another because part of this energy arises from being pulled by the electric field, and hence it does not need as large a thermal fluctuation and will be able to move more frequently. As a result, the trapped states can be filled up at relatively high bias voltage without strain, and simultaneously the devices return to LRS. The results imply that the trapped charges can be extruded by a mechanical deformation, and then refilled up by applying a relatively high external electric field without strains, namely reversible writing and erasing storage effect. Therefore, the rewritable nonvolatile memory can store stress information by loading external strains at zero or low bias voltage, read out at low bias voltage, and erase by applying relatively high external bias voltage. 4. CONCLUSION In summary, sandwiched SiO2/Si/ZnS radial heterostructure nanotubes, synthesized by one-step thermal evaporation method at 1200 °C, were utilized to construct nonvolatile stress information sensor and memory. The creation of double type-I heterostructure makes charges localized in intermediate layer Si with narrow bandgap. The lattice mismatch induces numerous defects to exist in SiO2/Si/ZnS heterointerface, and meanwhile the incorporation of impurities and the curl of tube wall cause abundant defects in lattice as well. Therefore, these defects located in Si can serve as trap states, namely storage mediators, and capture charges. Furthermore, they can be modulated readily by external strains and electric fields. In the SiO2/Si/ZnS nanotubes-based devices, the bulk traps-related PF hoping is dominant conduction mechanism at relatively low bias voltage. Compressive strains can induce trap barrier height to decrease, whereas tensile strains can induce trap barrier height to increase, yielding a GPZR effect. Additionally, the trap states can be emptied after both exerting compressive and tensile strains at relatively low bias voltage, resulting in HRS, especially for tensile strains. However, the emptied trap states can be filled upon applying a relatively high external electric field, resulting into a


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recovery of LRS. Therefore, the nanodevices not only show highly sensitive GPZR behavior to strains, but show excellent memory function written by external strains and erased by external electric fields. The creation and modification of trap states in multiscale nanostructures would be significant in developing highly sensitive and high resolution nanodevices for nonvolatile mechanical information sensor and memory.

AUTHOR INFORMATION Corresponding Author *E-mail: [email protected]

Notes The authors declare no competing financial interest. ACKNOWLEDGMENT This work was financially supported by the National Natural Science Foundation of China (51462023, 51571107), the Project for Young Scientist Training of Jiangxi Province (20133BCB23002), and the Major Program of Natural Science Foundation of Jiangxi Province (20152ACB20010). REFERENCES (1) Barlian, A. A.; Park, W.; Mallon, J. R.; Jr.; Rastegar, A. J.; Pruitt, B. L. Review: Semiconductor Piezoresistance for Microsystems. Proc. IEEE 2009, 97, 513-552. (2) Rowe, A. C. H. Piezoresistance in Silicon and its Nanostructures. J. Mater. Res. 2014, 29, 731744. (3) He, R. R.; Yang, P. D. Giant Piezoresistance Effect in Silicon Nanowires. Nat. Nanotech. 2006, 1, 42-46. (4) Milne, J. S.; Rowe, A. C. H.; Arscott, S.; Renner, C.; Milne, J. S. Giant Piezoresistance Effects in Silicon Nanowires and Microwires. Phys. Rev. Lett. 2010, 105, 226802. ACS Paragon Plus Environment

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TOC GRAPHIC

Erase

2

Current (uA)

(High electric field)

Voltage (V)

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

Page 30 of 30

50

1

(LRS) 0

Write

(Tensile strain) (HRS)

(LRS) 0

Time


30

Si

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