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J. Phys. Chem. C 2007, 111, 7508-7513
Structure and Morphology of Annealed Gold Films Galvanically Displaced on the Si(111) Surface Nicola Ferralis,* Roya Maboudian, and Carlo Carraro Department of Chemical Engineering, UniVersity of California, Berkeley, California 94720 ReceiVed: February 8, 2007; In Final Form: March 27, 2007
The effects of thermal treatment in ultrahigh vacuum (UHV) of gold films galvanically displaced on the Si(111) surface are studied with low-energy electron diffraction, Auger electron spectroscopy, atomic force microscopy, Kelvin probe force microscopy, and X-ray photoelectron spectroscopy. Annealing the galvanically displaced gold on Si substrates to 1100 K produces films with similar structure, composition, and morphology to annealed gold films evaporated on Si in UHV. The surface morphology is consistent with the StranskiKrastanov growth mode. Compared to the unannealed film, an interfacial gold silicide layer forms upon annealing, although with limited improvement in adhesion. We report the formation of submicrometer Au/Si islands with narrow size dispersion, separated by deep trenches and with local order and shape dictated by the symmetry of the substrate. A mechanism for the formation of these islands is proposed.
I. Introduction Deposition methods based on immersion plating are showing increasing promise in semiconductor-based technologies. In this process, also known as galvanic displacement, the substrate supplies the electrons needed to reduce the noble metal ions in solution.1-3 Although the deposition of Au films4 or metallic nanoclusters5,6 on Si by galvanic displacement has been the focus of substantial research, the resulting semiconductor-metal interface remains poorly characterized. On the basis of the general argument of incompatibility between the covalent bonding of many semiconductors (e.g., Si) and the metallic bonding of the displaced film, poor interfacial bonding is expected and usually found experimentally. As a consequence, poor mechanical and electrical behaviors ensue. It is found sometimes that thermal treatment improves the quality of the interface,7 possibly because it favors intermixing or the formation of silicides. In our previous study of Au films galvanically displaced on Si and Ge substrates,4 vastly different interfacial strengths were observed for the two systems, and this difference was attributed to the presence of a stoichiometric compound formed at room temperature at the Au/Ge interface (Au3Ge) but not at the Au/Si interface. The presence (absence) of this compound in the galvanic displacement of Au films on Ge (Si) mirrors what was found earlier for the same systems prepared by room-temperature evaporation in ultrahigh vacuum (UHV).8 The effect of thermal annealing on the interface between Si and galvanically displaced Au films has never been addressed, however. The issue merits consideration, and not simply for its potential effect on film adhesion. Indeed, renewed interest in the morphology and evolution of three-dimensional (3D) Au clusters on semiconductor substrates at elevated temperature has resurfaced because of several technological implications,9 in particular for their role as catalysts during nanowire growth.6,10-13 Furthermore, it is known from extensive studies spanning over 30 years14,15 that annealing of gold films on silicon substrates in UHV produces a very rich set of surface reconstructions and interesting morphology. Those structural studies were mostly * Corresponding author. E-mail:
[email protected].
undertaken after gold deposition in UHV, usually through evaporation. The film deposited at room temperature follows a layer-by-layer growth mode, with a surface consisting of a diffuse and alloyed zone, an almost pure Au film, and a Si-rich overlayer with eutectic composition.16 Annealing the film at high temperatures leads to the agglomeration of Au into 3D clusters over a monolayer of gold, following the Stranski-Krastanov growth mode.17 This 3D growth mode is attributed to the very nature of the metal-semiconductor interface, where different atomic bonding (metallic versus covalent or ionic) and disparities in surface diffusivities prevent layer-by-layer growth, often despite similar lattice constants (as for Fe/GaAs).18 Several types of adsorbate-induced long range ordered structures with different symmetries are found for the Au monolayer on Si(111) surfaces.19,20 The high mobility of Au atoms on Si substrates at high temperature is responsible for these different phases, which depend on the surface preparation in vacuum and specifically on heating and cooling rates. The film morphology is also affected, since the Au atoms in excess of a monolayer form domain walls and ultimately 3D Au clusters.21,22 In this study, using low-energy electron diffraction (LEED), Auger electron spectroscopy (AES), X-ray photoelectron spectroscopy (XPS), and atomic force microscopy (AFM), we investigate the effects of temperature treatments in vacuum on the surface structure and morphology of the Au-Si interface produced by galvanic displacement, and the role of natural contaminants present in the film prior to the UHV treatment. We also present a surface potential investigation of the interface using Kelvin probe force microscopy (KPFM), which yields a map of the local work function with nanometer resolution. The results show the following: (i) An oxide layer is present at the interface between Si substrate and displaced Au film. Only upon its removal by flash annealing at 1100 K does a galvanically deposited Au film behave similarly to films evaporated in vacuum. (ii) A monolayer of gold silicide with submicrometer domain texture forms underneath 3D gold clusters. This monolayer has stoichiometric composition AuSi, and unlike pure Au or the eutectic alloy Au82Si18, it is not removed by the standard KI/I2 gold etch. (iii) Adhesion in the annealed film
10.1021/jp071105s CCC: $37.00 © 2007 American Chemical Society Published on Web 05/03/2007
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Figure 1. AES spectra at room-temperature obtained on films of different thicknesses, produced by different immersion times in the plating solution. Spectra are displaced arbitrarily for clarity. The inset shows an expanded region of the spectra.
Figure 2. AES spectra after annealing to different temperatures. The initial film thickness is 3-5 ML.
improves compared to the unannealed film, although it remains poor, compared to the Au/Ge system.4 II. Experimental Details The annealing experiments were carried out in a UHV chamber (base pressure of 2 × 10-10 Torr), equipped with conventional rear-view LEED (VG Microtech) and a cylindrical mirror analyzer for AES (PHI-Perkin-Elmer model 10-155). X-ray photoelectron spectra were acquired ex situ in a separate UHV chamber using an Omicron DAR400 source and an Omicron EA125 analyzer as described in our previous work.4 Film morphology and surface potential distribution were characterized in air using a Digital Instruments Nanoscope IIIa microscope operating in contact mode (Si cantilever, force constant of 0.12 N/m) for AFM measurements and in tapping mode (Ti-Pt coated Si cantilever,
force constant of 4.5 N/m, resonant frequency of 150 kHz, Q-factor of ∼200) for KPFM measurements. The resolution in these surface potential measurements is better than 1 mV.23 Single-crystal p-type Si(111) crystals were degreased by sonication in acetone and rinsed in deionized water and dried with nitrogen gas; they were then treated for 5 min in a UVozone cleaner (Jelight model 42). Samples were etched in concentrated (48% by weight) HF for 5 min before deposition. Galvanic deposition was obtained using a plating solution of 80% by volume of 1.25 mM potassium tetrachloroaurate (KAuCl4) and 20% concentrated HF. Deposition times were adjusted between 15 s (“thin” films), 30 s (“medium thickness” films), and 60 s (“thick” films), with an average deposition rate of 0.1 ML/s. After deposition, samples were rinsed in deionized water and dried with nitrogen.
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Gold films evaporated on the clean Si substrates under UHV conditions were also compared with the galvanically displaced films. The HF-treated Si(111) surfaces were annealed in UHV for 10 min at 1100 K. This procedure resulted in a clean and well-ordered surface, with sharp (7 × 7) LEED patterns. Gold was then evaporated using an Omicron EM3 UHV evaporator (Au flux of 25 nA at 765 V). The deposition rate of about 0.15 ML/min was measured using the Au AES signal at 69 eV (IAu69) and Si AES signal at 92 eV (ISi92). The gold-coated substrates were annealed in UHV at increasing temperatures up to the maximum temperature reached by the heater (1100 K), for up to 5 min using the procedure described below. At 1100 K we do not expect any significant sublimation of Si. The coverage of the resulting sample surface was determined from the ratio R ) IAu69/ISi92 of the differentiated AES signals as described elsewhere for the same system.24,25 The error bars in the determination of the film thickness were estimated to be about (50%.24 III. Results A. Surface Structure and Composition. Contamination in the galvanically displaced Au films on Si(111) is monitored with AES as shown in Figure 1. Carbon and oxygen peaks (272 and 503 eV, respectively) point to the main sources of contamination. The peak corresponding to silicon oxide (76 eV) is notably dominant over the Au (69 eV) and Si (92 eV) peaks. The thinner films (15 s deposition) have higher amounts of oxygen and silicon oxide as the oxygen peak is significantly stronger than either Si or Au peaks. For longer deposition times, the amount of oxides detected is significantly reduced, while the Au peak becomes predominant, indicative of oxygen residing at the buried Au/Si interface. The thickness of freshly deposited films can be estimated from the ratio of Au and Si peaks. However for thin films, this estimate (∼2 monolayers (ML)) is complicated by the presence of the oxide. For thick films the ratio overestimates the gold thickness, because of the limited penetration depth of incoming electrons; the accuracy allows only a lower limit estimate, ∼5 ML. As films are annealed in UHV for 10 min from 750 to 950 K, the intensities of C, O, and SiO2 peaks drop approximately by half as shown in Figure 2 for a ∼3-5 ML Au film. These contaminants and the oxide are fully removed by further annealing the film at 1100 K for about 2 min. Thinner films (∼2-3 ML, 15-30 s immersion in plating solution) require slightly longer (∼30%) annealing times to remove the contamination and oxides completely. Thicker films (>5 ML, 30-60 s immersion in plating solution) are inherently cleaner because of the longer exposure to HF in the plating solution, so a shorter annealing is required. On the basis of the AES analysis, the apparent coverage of the resulting clean film is always about 0.9-1.1 ML, regardless of the amount of Au initially displaced. The final average surface composition is 95% gold and 5% Si, which is consistent with what was previously found for evaporated films in UHV.17,26 Further annealing does not induce significant changes in the surface composition. The amount of Au desorbed at 900 K (or higher) for a few minutes of annealing is negligible,22 and we do not detect any change in AES intensity of the Au peak compared to the Si peak before and after the annealing at the highest temperature. Diffusion of gold atoms to the bulk is also negligible. The absence of a LEED pattern for the freshly displaced gold film is consistent with the results from Au films evaporated at room temperature on clean substrates. The evolution of LEED patterns from a disordered to an ordered structure can be
Figure 3. The local order of excess gold atoms (filled circles in left panels a, b, c) over the Au/Si layer with (x3 × x3) symmetry (shown as a triangular lattice) depends on the sample temperature and on the cooling rate. The high-temperature phase (shown in panel a, with corresponding LEED pattern recorded at 43 eV and T ) 850 K) consists of randomly displaced gold atoms which form no superstructures. Cooling the sample causes the formation of densely packed domains, whose order strictly depends on the cooling rate. When the sample is quenched, these domains are randomly packed in the β - ( x3 × x3) phase, to form a short range order (shown in panel b, with LEED pattern recorded at 74 eV and T ) 105 K). In contrast, if the sample is cooled slowly, these domains form a closed-packed (6 × 6) superstructure, whose unit cell is schematically shown with the dashed line in panel c (LEED pattern recorded at 74 eV and T ) 105 K).
monitored in real time as the film is annealed up to 900 K. By comparing the evolution of these LEED patterns with the corresponding chemical composition analysis with AES, it is determined that ordered structures for the Si(111) surfaces are obtained once the contamination is fully removed. Further annealing does not induce any particular improvement over the long range order of the films. LEED patterns of the galvanically displaced and annealed gold films on Si(111) at room temperature (Figure 3) clearly distinguish the surface reconstruction of the β - (x3 × x3) and (6 × 6) phases. These are observed over the coverage range of 0.9-1.1 ML, which is consistent with films prepared in vacuum.19 There is no evidence of the low-coverage (5 × 2) and R - (x3 × x3) phases for the annealed films of galvanically displaced gold; this may be due to the high coverage constraints induced by the galvanic displacements. The two visible phases can be reversibly obtained by using different cooling rates: a slow cooling (up to ∼10 K/s) results in the (6 × 6) phase, while quenching the sample (∼15 K/s) results in the β - (x3 × x3) phase. For LEED measurements at high temperatures (T > 750 K), only the main (x3 × x3) diffraction spots are visible (Figure 3a), the only ones in common with the two room-temperature phases.
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Figure 5. Contact-mode atomic force micrographs of Au/Si(111) after annealing to 1100K: (a) 4 min; (b) 10 min.
Figure 4. Contact-mode atomic force micrographs of Au/Si(111) system after annealing to 1100 K (for up to 2 min). The surface consists of 3D gold clusters over a gold silicide layer (a). A closer scan reveals that the gold silicide layer consists of islands divided by deep trenches. These islands have triangular shape (b, c).
Profile analyses on the diffraction spots for the different phases provide a lower limit for the size of local domains, limit imposed by the instrumental resolution of the conventional LEED optics (∼15-20 nm). Domains of at least 150 nm in size are measured on all the three phases. Domains on the Si(111) surfaces have local (x3 × x3) order.21 B. Surface Morphology. Surface morphology was characterized by atomic force microscopy. Annealed gold layers on Si(111) exhibit a Straski-Krastanov growth mode. The surface is composed of a monolayer of gold silicides with 3D clusters (Figure 4a). The “clusters” are sparsely distributed; they have round shapes and sizes that vary between 0.8 and 1.1 µm and an average height of 200 nm. The gold silicides consist of islands of triangular shape (parts b and c of Figure 4), with average size of 80-120 nm; the root mean square (rms) roughness ranges from 3 to 50 nm. Deep trenches in the surface (20-100 nm) are visible between islands.
The variations in sizes and heights of these islands depend strictly on the annealing time at the highest temperature (1100 K). Extended annealing times (longer than 2 min) cause these islands to join at the boundaries (Figure 5a). The triangular shape of the islands is lost after annealing at 1100 K for about 10 min (Figure 5b). C. Surface Potential and Chemical Bonding at the Au/Si Interface. The topography and surface potential of the Au/Si(111) surface are shown in Figure 6. The surface potential is homogeneous (rms ) 5 mV) in areas between the 3D clusters, consisting of gold silicides and where the triangular islands are located. The difference between the surface potential of a 3D Au cluster and the potential of the gold silicides (shown in the inset of Figure 6b as a dotted and dashed line, respectively) is approximately 16 ( 3 mV, while the height difference is approximately 110 nm. Since the work function for pure gold is on average 4.85 eV,27 the work function of the silicides is on average about 4.83 mV. The 3D Au clusters can be removed by 20 min dipping in a solution of potassium iodide and iodine (KI, 4 g; I2, 1 g; H2O, 50 mL). After the etch treatment, although AES and XPS indicate that gold is still present on the surface (at about 60% of the apparent coverage before etching), there is no surface potential difference between the areas previously covered by the 3D clusters and the gold silicides. This suggests that the interface region between the 3D Au cluster and the substrate consists of the same gold silicides that forms outside the clusters. The failure of the gold etch treatment to remove the gold silicide monolayer, while apparently removing all remnants of either pure or eutectic alloyed metal comprising the bulk of the clusters, suggests that the chemical bonding responsible for the formation of the AuSi monolayer compound has a partially covalent nature. We have employed the X-ray photoelectron spectroscopy of the Au valence band (VB) region to explore
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Ferralis et al. with a small residual intensity attributable to clean Si. (The VB spectrum of clean silicon is also shown for comparison in Figure 7, dot-double dashed line.) In other words, there is no evidence of a chemical interaction between the two systems, consistent with the presence of an intervening oxide layer as observed in AES spectra. Upon annealing to 1100 K and removal of the oxide layer, a slight decrease in the intensity of the Au 5d5/2 peak, relative to the Au 5d3/2 peak, is observed, along with a simultaneous shift of the peak position to higher binding energy. This trend is even more marked after treatment in the gold etch solution, suggesting that the spectrum after annealing results from the sum of separate contributions from the Au/Si monolayer and from residual elemental Au. The loss of intensity in the Au 5d5/2 region means that electrons from this orbital are partaking in bond formation with the Si surface atoms, leading to the stable Au/Si monolayer observed in LEED experiments. Remarkably, the same orbitals were found to be responsible for the strong bonding of Au to Ge.4,28 IV. Discussion
Figure 6. Atomic force micrographs (a) and surface potential plot (b) of the annealed Au/Si(111) surface. The surface was annealed to 1100 K for 2 min. Height and surface potential profiles across the 3D gold clusters are shown in the insets. The dotted and dashed lines in the surface potential profile are used to measure the surface potential difference between the Au gold droplets and the gold silicides.
Figure 7. X-ray photoelectron spectrographs of the valence band in the different stages of preparation.
this issue further and to identify the electronic orbitals responsible for the bonding in gold atoms at the annealed Au/Si interface. The spectrum of a reference pure Au sample (thick sputtered film) in the range from -2 to 14 eV (see Figure 7, solid line) consists of two peaks at 3.2 and 6.1 eV, corresponding to the Au 5d5/2 and 5d3/2 levels, respectively. In pure Au, the population of the two levels is the same as that in the isolated atom, (2j + 1), leading to a relative intensity of 3/2 for the 5d5/2 versus the 5d3/2 orbital. This is in agreement with what we observe for the thick sputtered film. Similar to our previous findings,4 the VB spectrum of a sample after immersion plating for 15 s is dominated by the signal of the pure Au 5d levels,
A. Surface Structure Evolution upon Annealing. Annealed films of gold, galvanically displaced on Si substrates, show remarkable similarities with films evaporated on clean Si substrates in UHV. The amount of oxide and contaminants can be controlled and eventually removed according to the annealing temperature used. Low temperature annealings (