Surface Modification of a Polyimide Gate Insulator with an Yttrium

Article pubs.acs.org/Langmuir

Surface Modification of a Polyimide Gate Insulator with an Yttrium Oxide Interlayer for Aqueous-Solution-Processed ZnO Thin-Film Transistors Kwang-Suk Jang,*,† Duyoung Wee,† Yun Ho Kim,† Jinsoo Kim,† Taek Ahn,‡ Jae-Won Ka,*,† and Mi Hye Yi† †

Division of Advanced Materials, Korea Research Institute of Chemical Technology, Daejeon 305-600, Republic of Korea Department of Chemistry, Kyungsung University, Busan 608-736, Republic of Korea

‡

S Supporting Information *

ABSTRACT: We report a simple approach to modify the surface of a polyimide gate insulator with an yttrium oxide interlayer for aqueous-solution-processed ZnO thin-film transistors. It is expected that the yttrium oxide interlayer will provide a surface that is more chemically compatible with the ZnO semiconductor than is bare polyimde. The field-effect mobility and the on/off current ratio of the ZnO TFT with the YOx/polyimide gate insulator were 0.456 cm2/V·s and 2.12 × 106, respectively, whereas the ZnO TFT with the polyimide gate insulator was inactive.

1. INTRODUCTION Recently, solution-processed metal oxide semiconductors have been extensively studied for use in low-cost thin-film transistor (TFT) arrays and circuits. A variety of high-performance, solution-processable metal oxide semiconductors have been developed. Metal oxide TFTs with SiO2 gate insulators have shown excellent TFT performance with high field-effect mobility and high on/off current ratio.1−10 For low-cost and printed electronics applications, solution-processed gate insulators should be used instead of SiO2 gate insulators, prepared on Si substrates by vacuum deposition. However, there has been only limited research on solution-processed metal oxide gate insulators for the TFTs.11−15 Polymeric gate insulators could be an attractive candidate for solution-processed metal oxide TFTs. Because polymers are easily processable at low temperature and are applicable to flexible substrates, polymeric gate insulators have been widely studied and used for organic TFTs. To use polymeric gate insulators for solution-processed metal oxide TFTs, two major issues should be addressed. The first is the thermal resistance of polymeric gate insulators. Polymeric gate insulators should not be damaged during the postannealing process. For example, in bottom-gate TFTs, metal oxide semiconductors on gate insulators are annealed at 200−400 °C.1−10 Because of the low thermal decomposition temperature or glass transition temperature, use of polymeric gate insulators in metal oxide TFTs is limited. The second issue is the surface property of gate insulators. Polymeric gate insulators cannot provide a chemically compatible interface to metal oxide semiconductors due to their dissimilarities in bonding characteristics.15−18 © XXXX American Chemical Society

Because of the two major problems mentioned above, to our best of knowledge, polymeric gate insulators have not been successfully used for solution-processed metal oxide TFTs with a bottom-gate structure. In this study, we have prepared soluble polyimide gate insulators with high thermal resistivity. The 5% weight-loss temperature of the prepared polyimide is 438 °C, which is higher than the conventional processing temperature of metal oxide semiconductors. To provide a compatible interface to metal oxide semiconductors, the polyimide gate insulator was treated with an yttrium oxide interlayer. The YOx interlayer was deposited on the polyimide gate insulator using a simple spincoating and annealing method before the semiconductor deposition process. To investigate the role of the YOx interlayer, we fabricated zinc oxide TFTs in which the ZnO precursor solution was spin-coated on the gate insulators and annealed at 300 °C. The prepared ZnO TFT with the polyimide gate insulator was inactive. On the other hand, the ZnO TFT with the YOx/polyimide gate insulator showed reasonable TFT performance with field-effect mobility of 0.456 cm2/V·s and on/off current ratio of 2.12 × 106. The obtained mobility value is better than that of the ZnO TFT with the SiO2 gate insulator, 0.135 cm2/V·s.

2. EXPERIMENTAL SECTION Polyimide can be classified into two categories. The first is the polyamic-acid-based polyimide, which requires the additional imidizaReceived: January 24, 2013

A

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Figure 1. (a) Chemical structures, and (b) TGA and (c) DSC results of KSPI-1, KSPI-2, and KSPI-3. and annealed at 90 °C for 10 min and at 300 °C for 1 h on a hot plate in ambient air. After the annealing process, a 120 nm-thick source and drain aluminum electrodes were deposited by thermal evaporation on the semiconductor layer through a shadow mask, creating transistors with channel length (L) and width (W) of 50 and 1000 μm, respectively.

tion process at a high temperature. The second category is the fully soluble polyimide with the final imidized state. The soluble polyimides of this study could be synthesized through the one-step condensation polymerization of diamine and dianhydride monomers with a 1:1 molar ratio. For the synthesis of the soluble polyimides, 0.01 mol of 5(2,5-dioxytetrahydrofuryl)-3-methyl-3-cyclohexene-1,2-dicarboxylic anhydride (DOCDA) and 0.01 mol of 4,4-diaminodiphenylmethane (MDA), p-phenylenediamine (p-PDA), or 1,5-naphthalenediamine (1,5-NDA) were dissolved in m-cresol using a mechanical stirrer. The total concentration of the monomers was 15 wt %. Once the monomers were completely dissolved, 0.01 mol of isoquinoline, a base catalyst, was added, and the reaction mixture was slowly heated to 130 °C over 6 h in an oil bath; temperature was kept constant for the polymerization. When the solution viscosity reached the saturation point, the reaction was stopped by removing the oil bath and cooling the solution to room temperature. The polyimide was precipitated by adding reaction mixture dropwise to the ice-cooled excess methanol. The mixture was washed several times with methanol and filtered, and the polyimide was dried under vacuum. The crude polyimide was redissolved in m-cresol, and precipitated again by dropping it into the excess methanol. The purification procedure was repeated twice more to yield a white solid. The prepared polyimide was dissolved in γ-butyrolactone (8 wt %), and spin-coated on patterned or nonpatterned indium tin oxide (ITO) coated glass substrates. The spin-coated films were annealed at 90 °C for 10 min and at 300 °C for 30 min on a hot plate in ambient air. YOx interlayers were deposited on the polyimide films using a simple spincoating method. Yttrium(III) nitrate hexahydrate (Y(NO3)3)·6H2O was dissolved in 2-butoxyethanol with a concentration of 10 wt %. The precursor solution was spin-coated at 2000 rpm for 30 s on the polyimide films, and annealed at 90 °C for 10 min and at 300 °C for 40 min on a hot plate in ambient air. For electrical characterizations, we prepared bottom-gate, topcontact ZnO TFT devices. ITO-coated glass was used as the substrate, and the ITO was patterned (2 mm wide strips) to produce the gate electrode. The ZnO precursor solution was prepared by dissolving zinc hydroxide (Zn(OH)2) in aqueous ammonia (NH4OH, NH3 ∼20%) with a concentration of 0.1 M. The ZnO precursor solution was deposited on the prepared gate insulators using a simple spin-coating method. The precursor solution was spin-coated at 2000 rpm for 45 s,

3. RESULTS AND DISCUSSION To realize flexible and printed electronics, polymeric gate insulators for organic TFTs have been widely studied.

Figure 2. FT-IR spectrum of KSPI-3.

However, solution-processed metal oxide TFTs with polymeric gate insulators have rarely been reported. Qiu et al. reported high-performance, solution-processed zinc−tin oxide (ZTO) TFTs with poly(methyl methacrylate) (PMMA) gate insulators. The ZTO TFTs with a top-gate structure exhibited mobilities up to 1.8 cm2/V·s and on/off current ratios of >105.19 On the other hand, the use of polymeric gate insulators in solution-processed metal oxide TFTs with a bottom-gate structure is more limited due to their low thermal resistance and surface that is chemically incompatible to inorganic B

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Figure 3. AFM images (5 μm × 5 μm) of (a) the KSPI-3 film and (b) the YOx/KPSI-3 film.

424 °C. The glass transition temperatures of KSPI-1, KSPI-2, and KSPI-3 are 198, 250, and >350 °C, respectively. KSPI-3 is expected to be stable up to at least 350 °C, and applicable to solution-processed metal oxide TFTs in terms of thermal resistance. Molecular weight of KSPI-3 was determined by gel permeation chromatography (GPC) analysis. The numberaverage molecular weight (Mn) and the weight-average molecular weight (Mw) of KSPI-3 were 30 800 and 46 100 g/ mol, respectively, with a polydispersity index of 1.50. The inherent viscosity of KSPI-3 was measured to be 0.47 dL/g. The result of the elemental analysis of KSPI-3 was in good agreement with the calculated values (Calculated: C, 71.49%; H, 4.70%; N, 7.25%; O, 16.56%. Found: C, 70.83%; H, 4.83%; N, 6.79%; O, 17.55%.) The structure of KSPI-3 was characterized with Fourier transform infrared (FT-IR) spectroscopy (Figure 2). The sharp peak at 1357 cm−1 is due to the imide C−N stretching of KSPI-3.20−22 This peak confirms that

semiconductors. For example, soluble polyimide KSPI-1, prepared from DOCDA and MDA (Figure 1a), is used as a gate insulator for pentacene TFTs.20 Although KSPI-1 has a thermal decomposition temperature higher than 400 °C, the glass transition temperature, 198 °C, is lower than the conventional processing temperature of metal oxide semiconductors. After processing above the glass transition temperature, unwanted morphological changes of the polymer film may cause lower TFT performance. To obtain polyimide with high thermal resistance, rigid aromatic monomers are generally used because their use is known to be advantageous to the polymer chain packing, which is strongly related to the thermal resistance. In this study, p-PDA and 1,5-NDA were used as a diamine monomer instead of MDA to obtain soluble polyimides with higher glass transition temperatures, KSPI-2 and KSPI-3, respectively (Figure 1a). Figure 1b and c shows TGA and DSC results of KSPI-1, KSPI-2, and KSPI-3. The 5% weight loss temperatures of all three polyimides are higher than C

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250 °C.23,24 On the other hand, ZnO cannot form chemical bonding with most polymers. The formation of a coherent interface between the solution-processed ZnO and the polymeric gate insulator could not be guaranteed due to the irregular formation and the atomically rough facets of polycrystalline ZnO at the interface. Moon et al. reported that polymeric gate insulators, including poly(4-vinylphenol), polymethacrylate, polyimide, and polyvinyl alcohol, were damaged during the deposition process of ZnO semiconductor layers for bottom-gate TFTs.16 The ZnO TFTs with polymeric gate insulators were inactive or exhibited poor performance. In this study, to provide an interface that is chemically compatible to metal oxide semiconductors and to protect the polyimide gate insulator, a YOx interlayer was deposited on the KSPI-3 film by spin-coating of yttrium nitrate/2-butoxyethanol solution and annealing at 300 °C in ambient air. Among the various applicable metal oxides for the interlayer deposition, we used a YOx because YOx thin films could be formed at low temperature and provide a chemically compatible interface to the solution-processed ZnO semiconductor.15 Thicknesses of the KSPI-3 film and the interlayer-deposited KSPI-3 film were measured to be 150 and 165 nm, respectively, by alpha-step profilometer. After the interlayer deposition, the water contact angle of the gate insulator dropped from 52.9° to 19.9°. Surface energies, calculated from the contact angles of water and diiodomethane, of KSPI-3 and YOx/KSPI-3 films were 57.3 and 71.4 dyn/cm, respectively. The reduced surface energy of the gate insulator is expected to be advantageous to the aqueous-solution processing for the deposition of metal oxide semiconductors. Figure 3a and b shows atomic force microscope (AFM) images of the KSPI-3 film and the YOx/ KSPI-3 film, respectively. Surface root-mean-square (rms) roughness values of the KSPI-3 film and the YOx/KSPI-3 film, measured in an area of 5 μm × 5 μm, were 0.53 and 1.63 nm, respectively. The YOx/KSPI-3 film has higher surface roughness, but also has a smooth surface. KSPI-3 and the interlayer were amorphous as confirmed by X-ray diffraction (XRD) analysis (Figure S1a and S1b). It is known that crystalline yttrium oxide is formed from yttrium nitrate at a temperature above 500 °C. There should be organic residue due to the unconverted precursors in the 300 °C-annealed interlayer. Incomplete conversion of the precursors for metal oxide gate insulators could increase the leakage current density of the film.25 However, in this study, the 15 nm-thick YOx layer, deposited on the 150 nm-thick KSPI-3 layer, was used as an

Figure 4. (a) Electric field-dependent leakage current densities and (b) frequency-dependent capacitances of the 150 nm-thick KSPI-3 film and the 165 nm-thick YOx/KPSI-3 bilayer film.

completely polymerized and imidized polyimide was obtained by the one-step route. Aromatic (CC) and carbonyl (CO) stretching peaks are also present at 1508 and 1708 cm−1, respectively. To use the KSPI-3 gate insulator in solution-processed metal oxide TFTs, the surface of the KSPI-3 film should be modified. The chemical compatibility between the semiconductor and the gate insulator is critical to the TFT performance. The chemical compatibility is expected to be strongly related to the formation of a coherent interface between the semiconductor and the gate insulator without any chemical damage.15−18 Because of the bonding similarity between the metal oxides, metal oxide semiconductors such as ZnO could readily form covalent bonds with the surface of other metal oxides such as SiO2 and YOx. For example, atomically flat interface between ZnO and SiO2 could be formed after annealing at a high temperature above

Figure 5. Transfer characteristics of the ZnO TFTs with KSPI-3 and YOx/KSPI-3 gate insulators. D

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Figure 6. AFM images (5 μm × 5 μm) of ZnO layers on (a) the KSPI-3 and (b) the YOx/KPSI-3 gate insulators.

frequency-dependent capacitances of the 150 nm-thick KSPI-3 film and the 165 nm-thick YOx/KSPI-3 film. The corresponding dielectric constants of the KSPI-3 film and the YOx/KSPI-3 film were calculated to be 2.9 and 3.0, respectively, in the frequency range from 100 Hz to 10 kHz. The slightly increased leakage current density and dielectric constant might be due to the characteristics of the YOx interlayer. It is expected that YOx interlayer deposition is a nondestructive method for surface modification of the polyimide gate insulator. To investigate the potential of the surface-modified KSPI-3 film as a gate insulator, ZnO was used as a semiconductor for solution-processed metal oxide TFTs. ZnO is the most common low-temperature solution-processable metal oxide semiconductor for TFTs. We chose a simple method for ZnO deposition among the various reported methods. Zinc hydroxide/aqueous ammonia solution was directly spin-coated on the gate insulators; sample was annealed at 300 °C in ambient air. Figure 5 shows the transfer characteristics (Ids vs

interlayer to modify the surface properties, not as a gate insulating layer. The YOx interlayer is expected not to affect the gate insulating properties, unless the 150 nm-thick polyimide layer was not damaged during the process. To obtain leakage current densities and capacitances of the gate insulators, metal− insulator−metal (MIM) capacitor structures were prepared by deposition on the top gold electrode on the gate insulatorcoated ITO glasses. The active area of the MIM devices was 50.24 mm2. Figure 4a shows the electric field-dependent leakage current densities of the150 nm-thick KSPI-3 film and the 165 nm-thick YOx/KSPI-3 film. The leakage current densities of the KSPI-3 film and the YOx/KSPI-3 film were measured to be 5.86 × 10−5 and 7.55 × 10−5 A/cm2 at 1 MV/ cm, respectively, which are comparable to that of the organosiloxane-based organic−inorganic hybrid gate dielectric for ZnO TFTs, ∼3 × 10−5 A/cm2.26 The breakdown voltage of the interlayer-deposited KSPI-3 film was measured and found to be more than 4.5 MV/cm (Figure S2). Figure 4b shows the E

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insulator was inactive. On the other hand, ZnO TFT with the YOx/KSPI-3 gate insulator showed reasonable TFT performance. Figure S3a shows the output characteristic (Ids vs Vds) of the ZnO TFT with the YOx/KSPI-3 gate insulator. The ZnO TFT showed typical n-type characteristics. The field-effect mobility, on/off current ratio (Ion/Ioff), threshold voltage (Vth), and subthreshold slope (S-slope) of the ZnO TFT with the YOx/KSPI-3 gate insulator were 0.456 cm2/V·s, 2.12 × 106, 15.3, and 0.73 V/decade, respectively. To obtain the averages and standard deviations of the electrical properties, we prepared eight TFT devices. The average field-effect mobility, threshold voltage, and subthreshold slope were measured and found to be 0.417 ± 0.038, 14.7 ± 2.1, and 1.41 ± 0.57, respectively. Also, their on/off current ratios were in the range from 2.18 × 105 to 3.67 × 107. From the negligible hysteresis of the ZnO TFT with the YOx/KSPI-3 gate insulator (Figure S3b), we expect that the remaining organic residues in the YOx interlayer did not significantly affect the TFT performance. Figure 6 provides AFM images of ZnO layers on the KSPI-3 and the YOx/KPSI-3 gate insulators. On the KSPI-3 gate insulator, a continuous ZnO layer was not formed, and some ZnO particles were irregularly aggregated. The chemical incompatibility between the ZnO and the polyimide gate insulator resulted in the formation of the inactive layer. On the other hand, on the YOx/KPSI-3 gate insulator, a continuous ZnO layer was observed. ZnO particles with diameters in the range of 20−90 nm were close-packed, forming an active ZnO layer. The surface rms roughness value of the ZnO layer on the YOx/KSPI-3 gate insulator, measured in an area of 5 μm × 5 μm, was 1.84 nm. The interconnected particular morphology, with a slightly rougher surface, is a common feature of solutionprocessed ZnO layers.27−30 Figure 7a and b shows the scanning electron microscope (SEM) images of the YOx layer on the KSPI-3 film and the ZnO layer on the YOx/KSPI-3 film, respectively. The smooth surface of YOx layer and the closepacked ZnO particles were observed in the SEM images, respectively, which correspond well with the AFM images. Conformal formation of the YOx interlayer and the ZnO layer was confirmed by transmission electron microscopy (TEM) and energy-dispersive X-ray spectroscopy (EDX) elemental mapping analysis. Figure 8a and b shows the TEM image and the EDX elemental mapping of the cross-sectioned ZnO/YOx/ KSPI-3 film. From top to bottom, carbon-rich, zinc-rich, yttrium-rich, and carbon-rich regions correspond to epoxy glue, ZnO, YOx, and KSPI-3 layers, respectively. Thicknesses of YOx and ZnO layers were found to be 15 and 15−20 nm, respectively. Although characteristic peaks were not clear in the XRD pattern of ZnO/YOx/KSPI-3 film (Figure S1c), nanocrystals were observed in the ZnO layer. From the TFT performances, and the AFM, SEM, and TEM images, we can conclude that the YOx interlayer provides a surface that is chemically compatible with the ZnO semiconductor. The chemical structure of the ZnO layer was studied by X-ray photoelectron spectroscopy (XPS) to confirm the formation of the oxide skeleton framework. The detailed scan for O 1s was analyzed (Figure S4). The three XPS peaks at 530.1, 531.5, and 532.3 eV indicate an oxide lattice with a chemical bond of Zn− O, an oxygen-deficient lattice, that is, an oxide lattice with an oxygen vacancy, and the oxygen in the hydroxide, respectively.30−32 During the annealing process for solution-processed metal oxide TFTs, organic groups from the metal precursor should be successfully removed.33 To show the surface impurities of the ZnO layer, the detailed scan for C 1s was

Figure 7. SEM images of (a) the YOx interlayer on the KSPI-3 film and (b) the ZnO layer on the YOx/KSPI-3 film.

Figure 8. (a) TEM image and (b) EDX elemental mapping of the cross-sectioned ZnO/YOx/KSPI-3 film.

Table 1. Electrical Performace Parameters of ZnO TFTs with KSPI-3, YOx/KSPI-3, and SiO2 Gate Insulators gate insulator

mobility (cm2/V·s)

Ion/Ioff

S-slope (V/decade)

Vth (V)

KSPI-3 YOx/KSPI-3 SiO2

inactive 0.456 0.135

2.12 × 106 3.07 × 106

0.73 0.67

15.3 18.5

Vgs) of the ZnO TFTs with KSPI-3 and YOx/KSPI-3 gate insulators. The prepared ZnO TFT with the bare KSPI-3 gate F

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Langmuir also analyzed (Figure S5). The XPS peak at 284.6 eV can be assigned to C−C and C−H moieties.34 The peaks 286.0 and 288.8 eV indicate carbon oxide groups.35 The three C 1s peaks at 284.6, 286.0, and 288.8 eV are thought to be generated from surface contamination from (CHx)-like carbon and carbon oxides,34−36 not from the precursor, zinc hydroxide in aqueous ammonia. It is expected that the oxide skeleton was successfully formed after the annealing process with the presence of a small amount of surface contaminant. To compare the TFT performance, we also prepared the ZnO TFT with the SiO2 gate insulator using the same experimental conditions. Figure S6 shows the transfer characteristic of the ZnO TFT with the 100 nm-thick SiO2 gate insulator. The field-effect mobility, on/off current ratio, threshold voltage, and subthreshold slope of the ZnO TFT with the 100 nm-thick SiO2 gate insulator were 0.135 cm2/V·s, 3.07 × 106, 18.5 V, and 0.67 V/decade, respectively. The ZnO TFT with the YOx/KSPI-3 gate insulator showed better performance than that with the SiO2 gate insulator (Table 1). We have investigated a simple and promising way to modify the surface of a polymeric gate insulator with a YOx interlayer for solution-processed metal oxide TFTs. It is expected that use of the metal oxide interlayer-deposited polymeric gate insulators with lower leakage current density and more smooth surface, and formation of the ZnO layer with higher crystallinity and more smooth surface, could improve the TFT performance. The research works for improving the TFT performance are currently being investigated.

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REFERENCES

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ASSOCIATED CONTENT

S Supporting Information *

XRD patterns of KSPI-3, YOx/KSPI-3, and ZnO/YOx/KSPI-3 films. Applied voltage-dependent leakage current density of the YOx/KSPI-3 film. Output and transfer characteristics of the ZnO TFTs with the YOx/KSPI-3 gate insulator. Transfer characteristic of the ZnO TFT with the SiO2 gate insulator. XPS spectra of the ZnO layer. This material is available free of charge via the Internet at http://pubs.acs.org.

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ACKNOWLEDGMENTS

This work was supported by a grant from the cooperative R&D program funded by the Korea Research Council for Industrial Science and Technology and was partially supported by the KRICT core project (KK-1302-C0, Development of Core Technology of Advanced Materials for Printing Processes) funded by the Ministry of Knowledge Economy.

4. SUMMARY We have presented a polyimide gate insulator with high thermal resistance and have detailed its surface modification for solution-processed ZnO TFTs. To make the surface chemically compatible with the ZnO semiconductor, the YOx interlayer was deposited on the polyimide gate insulator. The ZnO TFT with the polyimide gate insulator was inactive. On the other hand, the ZnO TFT with the YOx/polyimide gate insulator showed reasonable TFT performance, with field-effect mobility of 0.456 cm2/V·s, the value of which is better than that of the ZnO TFT with the SiO2 gate insulator, 0.135 cm2/V·s. Our results suggest that deposition of the metal oxide interlayer could be a simple and efficient surface-treatment of polymeric gate insulators for high-performance, solution-processed metal oxide TFTs.

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AUTHOR INFORMATION

Corresponding Author

*E-mail: [email protected] (K.-S.J.); [email protected] (J.-W.K.). Notes

The authors declare no competing financial interest. G

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