Synthesis of Wafer-Scale Monolayer WS2 Crystal Towards the

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Functional Nanostructured Materials (including low-D carbon)

Synthesis of Wafer-Scale Monolayer WS2 Crystal Towards the Application in Integrated Electronic Devices Jiajun Chen, Kai Shao, Weihuang Yang, Weiqing Tang, Jiangpeng Zhou, Qinming He, Yaping Wu, Chunmiao Zhang, Xu Li, Xu Yang, Zhiming Wu, and Junyong Kang ACS Appl. Mater. Interfaces, Just Accepted Manuscript • Publication Date (Web): 06 May 2019 Downloaded from http://pubs.acs.org on May 6, 2019

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ACS Applied Materials & Interfaces

Synthesis of Wafer-Scale Monolayer WS2 Crystal Towards the Application in Integrated Electronic Devices Jiajun Chen†, Kai Shao†, Weihuang Yang‡, Weiqing Tang†, Jiangpeng Zhou†, Qinming He†, Yaping Wu*,†, Chunmiao Zhang*,†, Xu Li†, Xu Yang†, Zhiming Wu*,† and Junyong Kang † Department of Physics, OSED, Fujian Provincial Key Laboratory of Semiconductor Materials and Applications, Jiujiang Research Insititute, Xiamen University, Xiamen, 361005, P. R. China.

‡ Key Laboratory of RF Circuits and System of Ministry of Education, Hangzhou Dianzi University, Hangzhou, 310018, P. R. China

*correspond to: [email protected], [email protected], [email protected]

KEYWORDS wafer-scale, WS2 monolayer, chemical vapor deposition, thermal evaporation, field effect transistor arrays

ACS Paragon Plus Environment

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ABSTRACT Two-dimensional transition metal dichalcogenides (TMDCs) possess unique electronic and optical properties, which open up a new opportunity for atomically thin optoelectronic devices. Synthesizing large-scale monolayer TMDCs on SiO2/Si substrate is crucial for practical applications, however, it remains a big challenge. In this work, a method which combines chemical vapor deposition (CVD) and thermal evaporation was employed to grow monolayer tungsten disulfide (WS2) crystals. Through controlling the density and the distribution of W precursors, wafer-scale continuous uniform WS2 film was achieved, with the structural and spectral characterizations confirming a monolayer configuration and a high crystalline quality. Wafer-scale field effect transistor (FET) arrays based on the monolayer WS2 were fabricated. The devices show superior electrical performances, and the maximal mobility is almost one order of magnitude higher than those of CVD grown large-scale TMDCs devices reported so far.

INTRODUCTION Recently, monolayer two-dimensional TMDCs have aroused significant research interest in the scientific community due to their rich species and intrinsic adjustable


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bandgap. 1-12 Among the various TMDCs, monolayer WS2 has been demonstrated to possess high mobility, superior chemical robustness, and large spin-valley splitting, which make it a promising candidate for future functional optoelectronic devices. 6,13,14 In order to realize practical applications, synthesis of high-quality two-dimensional WS2 monolayer in large scale, and even to wafer scale, is significantly crucial.

CVD method has been widely used to synthesize two-dimensional layered materials because of its easy operation and low cost. Much effort has been made for the CVD growth of large-scale two-dimensional WS2 crystals. 15,16 For instance, Zhang et.al. used an ultra-smooth sapphire substrate to obtain completely covered mono- and few-layer WS2 flakes; 17 Ren et.al. adopted catalytic active Au foils to achieve uniform monolayer WS2 single crystals in millimeter size; 18 Kobayashi et.al. employed cleaved graphite surface to avoid charged impurities and structural defects from substrate, and fabricated high-quality and nondoped monolayer WS2. 19 Throughout these works, the substrates are either insulating or metallic. Further transfer process is unavoidable for optoelectronic applications, which will cause damage or induce contamination to the


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materials, and thus degrade the device performance. Considering the compatibility with modern microelectronic devices, SiO2/Si is the superior option as the growth substrate. However, owing to surface roughness and residual dangling bonds, as-grown twodimensional WS2 films were mostly of small areas and low uniformity. 5,20 Up to date, directly synthesis of high-quality and large-scale monolayer WS2 crystals on SiO2/Si substrate is still a challenge, and large-area integrated device arrays based on monolayer WS2 crystals were thus even barely reported. 21

In this work, we used a novel method by combining CVD and thermal evaporation to grow monolayer WS2 crystals on SiO2/Si substrate. The effects of pivotal growth conditions were systematically studied with an eye towards elucidation of growth mechanism. By optimizing the growth parameters, wafer-scale uniform monolayer WS2 films were successfully achieved. Based on the monolayer WS2, wafer-scale FET arrays were fabricated. The electrical measurements show the mobility of FET units ranges from 0.2 to 4.0 cm2V-1s-1, which is one order of magnitude higher than other CVD grown large-scale TMDCs devices reported so far. 17


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RESULTS AND DISCUSSION In our experiments, the main differences from the traditional CVD growth are the provision of W precursors and the arrangement of the W precursors and the substrate. The W precursors were prepared by depositing a smooth WO3 film on a SiO2/Si (which can also be a quartz or a sapphire) surface through a thermal evaporation. The substrate, another SiO2/Si chip, was placed face-down above the WO3 film with a space of about 500 μm, as shown in Figure 1. The smooth WO3 film acted as a uniform W provision, which is beneficial to homogeneous nucleation on the whole substrate. Meanwhile, the narrow space between the precursors and the substrate created a relatively stable gas environment to promote a large-scale growth (for details, see Supporting Information Figure S1).

Based on the setup of our CVD growth, some key parameters, including temperature, source amount, and gas flow rate were separately optimized for the control growth of monolayer WS2. Figures 2(a)-(e) shows the optic images of the samples grown at 800 °C, 850°C, 900 °C, 950 °C, and 1000 °C, respectively, with the WO3 thickness of 5 nm.


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The clear contrast shows triangular and hexagonal shapes of WS2 domains, which are similar to previous reports. 20,22 The morphologies and domain sizes are found strongly dependent on the growth temperature. For the case at 800 °C, the domain size is relatively small (~15 μm), which could be attributed to the short diffusion length of W and S atoms on substrate surface at low temperature. Meanwhile, many nanoparticles (seeing in the inset of Figure 2(a)) appear on the surface of WS2 materials. This may result from the lattice defects on the surface of layered WS2, which trap the W or S atoms and lead to the multi-nucleation and the formation of nanoparticles. With the increase of the growth temperature, the nanoparticles disappear, and WS2 domain size gradually increase. When the growth temperature reaches up to 950 °C and 1000 °C, the as-grown WS2 crystals have an average domain size of ~150 μm. Interestingly, for the case at 1000 °C, a part of WS2 crystals decomposes because of the exorbitant temperature. To reveal the influence of growth temperature on the crystalline quality, photoluminescence (PL) spectra were measured for the different samples. As seen in Figure 2(f), a single absorption peaks at ~ 630 nm for all the samples, demonstrating the growth of WS2. 23,24 Figure 2(g) plots the full width at half maximum (FWHM) for all


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the spectra. It is found that, even for the worst condition of 800 °C, the FWHM is only ~30 nm. As the growth temperature increases, the FWHM gradually decreases with the minimum value of ~14 nm for the case of 950 °C. This value is comparable or superior to other reports, 25 demonstrating the high crystalline quality for our samples. The uniformity of the crystalline quality is also demonstrated by AFM, Raman and PL mapping, as shown in Figure S2 in Supporting Information. As for the case at 1000°C, the decomposition of the materials damages the single crystal structure, resulting in the broadening of the PL peak. Based on the above results, the growth temperature of 950 °C was adopted in the following experiments.

To optimize the source amount, WO3 films with the thickness of 1nm, 3nm, 5nm, 7nm and 10nm were deposited and serviced as the W precursors. The amount of the S source was kept excessive during the growth process. Figures. 3(a-e) show the optic images of as-grown samples. Obviously, the W amount significantly affects the nucleation density and the morphology of domains. For the case of 1nm WO3, only a few triangle-like crystals with a small size (~ 25 μm) were grown due to insufficient W


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source. When the thickness of WO3 film increases to 3 nm, the density greatly increases owing to increased W amount and nucleating sites, but the domain size remains about ~25 μm. As the thickness of WO3 film further increases to 5 nm, the domain size significantly increases to ~150 μm due to the process of Ostwald Ripening. 26,27 The optical morphology exhibits the same contrast, indicative of a uniform thickness. AFM measurement further confirms the crystals to be monolayer structure (seeing the inset in Figure 3(c)). Generally, atoms are difficult to nucleate on a perfect WS2 surface because the absorption on layered structural WS2 crystals relies on the weak Van der Walls interaction, which leads to the growth of monolayer. However, as for the case of 7 nm and 10 nm WO3 films, the increased WO3 amount promotes the supersaturation of the W source, and then causes increased growth rate and defect density. 28 As a result, many ad-layers or clusters were grown on the top of monolayer WS2.

In order to grow wafer-scale monolayer WS2, H2 was mixed into the carrier gas, which was potential to promote the reaction of W and S sources. 29 Figures 4(a-c) show the optic images of the samples grown at H2 flow rate of 3 sccm, 5 sccm, and 10 sccm,


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respectively. Statistical results suggest that, as increasing the H2 flow rate from 3 sccm to 10 sccm, monolayer WS2 coverage is increased from 40% to 100%. It is noticeable that, the growth of monolayer WS2 can be effectively scaled up to a 2-inch substrate with the H2 flow rate of 10 sccm, as shown in Figure 4(d). To elucidate the effect of H2 on WS2 growth, the schematic illustration is shown in Figure 4(e). It was reported that, W5+ ions play an important role in the synthesis of WS2 crystals as being favorable to combine the S atoms. 29, 30 However, in WO3 film, W6+ ions are dominant without the H2 flux. Even at high temperature, the production of W5+ ions is still low. Limited by the ultrathin WO3 film, the coverage of as-grown WS2 monolayer is hardly increased even when increasing the growth time. As H2 is introduced, W6+ ions in WO3 film can easily reacts with H2 according to the following formula: W6++H2=W5++2H+. With the increase of H2 flow, more and more the W6+ ions are transformed to W5+ ions, which is beneficial to form high density and uniform distribution of the W5+ ions in the space between the substrate and the WO3 source. As a result, formation of uniform WS2 film with high coverage was promoted and wafer-scale monolayer was finally achieved. We have to say that, the nucleation density is more or less increased also, leading to a reduced


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scale of the single crystalline than that grown without the H2. In spite of this, the average single domain size was estimated to be around 80 μm (Supporting Information Figure S3), which is still comparable with the general reported results. 20

The morphology of the wafer-scale monolayer WS2 was characterized by AFM, as shown in Figure 5(a). The image exhibits a uniform contrast with a measured thickness of 0.85 nm, indicating a monolayer character. X-ray photoelectron spectroscopy (XPS) was used to characterize the W and S states. As shown in Figure 5(b), the W 4f spectrum is composed of W4f7/2 , W4f5/2 and W4p3/2 peaks with the binding energy of 33.47 eV ,35.59 eV and 38.72eV, respectively. The S 2p spectrum clearly illustrates two peaks at 164.22 eV and 163.09 eV, assigned to S 2p1/2 and S 2p3/2 states, respectively. The ratio of the integrated area on the W 4f and the S 2p peaks is estimated to be 1:2, entirely coincident with the element compositions of WS2 material. Figure 5(c) shows the Raman spectrum of the wafer-scale monolayer WS2. The peak at ~418.2 cm-1 is assigned to the out-ofplane vibration mode A1g(Γ) of the S atoms. Another peak at ~351.5 cm-1 can be resolved into two peaks at 351.0 cm-1 and 356.2 cm-1 by multi-peak Lorentzian fitting,


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corresponding to the longitudinal acoustic mode 2LA(M) and the in-plane vibration mode E12g(Γ), respectively. A frequency separation of ~62 cm-1 between A1g(Γ) and E12g(Γ) confirms the monolayer configuration. To further examine the uniformity of the waferscale monolayer WS2, Raman spectra at random positions were measured. As shown in Figure 5(d), the E12g(Γ) and A1g(Γ) peaks in all spectra at different positions are almost coincident and comply the monolayer property. Besides, as shown in Figures 5(e) and (f), the mapping images of Raman peaks of E12g(Γ) and A1g(Γ) show the uniform intensity distributions, further demonstrating the homogeneous structure. The crystalline quality of the wafer-scale monolayer WS2 is also demonstrated by the intensity and FWHW mapping of PL spectra, as seen in Figures 5(g) and (h). The mapping images show even intensity and generally small FWHW below 20 nm, indicative of high crystalline quality. Lattice structure of the wafer-scale monolayer WS2 was characterized by using the transmission electron microscopy (TEM). The WS2 film was transferred on a TEM grid and located the unfolded monolayer area, as shown in Figure 6(a) (Supporting Information Figure S4). Selected-area electron diffraction (SAED) patterns in Figure 6(b) exhibit a hexagonal structure with a threefold symmetry, which is composed of two sets


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of spots Ka (red arrows) and Kb (yellow arrows). Figure 6(c) shows the high-resolution TEM (HRTEM) image, in which the bright and dim spots correspond to W atoms (blue spheres) and S atoms (yellow spheres), respectively. The uniform contrast difference between the bright and dim spots demonstrates the defect-free atomic lattices. The lattice fringes with interplanar spacing of ~ 0.16 nm and ~ 0.25 nm correspond to the (11-20) and the (10-10) plane of WS2 lattices, respectively. The insert in Figure 6(c) shows the fast Fourier transform (FFT) image, revealing the monolayer structure. The atomic and electronic structures of the wafer-scale WS2 monolayer were characterized by scanning tunneling microscope (STM). As shown in Figure 6(d), the atomic lattices exhibit a honeycomb morphology with the periodic lattice constant of 3.17Å, confirming the structure of WS2. 31 Three STS spectra in Figure 6(e) were taken at different positions. The measured valence band maximum (VBM) and conduction band minimum (CBM) of the WS2, denoted by dashed black lines, locate at -1.94 eV and 0.13 eV, respectively, indicating an n-type semiconducting character. The calculated bandgap is approximately ∼2.07 eV, consistent with the bandgap of monolayer WS2. 31


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Back-gate FETs with the schematic in Figure 7(a) were fabricated for the characterization of the electrical properties of WS2 samples. Figure 7(b) shows an optical image of the FET device based on a single crystal WS2 domain. During the transfer characteristic tests, a constant voltage (10 V) Vds was applied between the source and drain, and a various gate bias Vg, was applied on the bottom of the SiO2/Si substrate. Simultaneously, the drain-source current (Ids) was monitored as a function of Vg through an electrical feedthrough. The transfer curve of the FET displayed in Figure 7(c) clearly shows an n-type behavior. The electron mobility is extracted from the linear regime of the transfer curve using the equation: 32

μ = [dIds/dVg] * [L/(W * VdsCi)]

(1)

where dIds/dVg is the transconductance, L, W, and Ci is the channel length, the channel width, and the gate capacitance between the gate and the channel per unit area, respectively. The evaluated carrier mobility is appropriately 8.1 cm2V-1s-1, which is much higher than that of previously CVD-grown WS2 and even comparable with that of the mechanically exfoliated samples. 33-35 The ON/OFF ratio reaches the order of 105, which


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is also comparable or superior to the previously reported values. 34,35 Figure 7(d) is the output characteristics of the FET with the Vg ranging from -20 V to +60 V. The basically linear behavior demonstrates an Ohmic contact.

Successful achievement of monolayer wafer provides further avenues for wafer-scale two-dimensional devices arrays, which is seldom reported on two-dimensional WS2 monolayer before. We fabricated wafer-scale WS2 FET arrays, as shown in Figure 7(e). The inset displays an optic image of an FET unit with an area of 300μm × 300μm. The transfer curve and output characteristics are shown in Figures 7(f) and (g), respectively, in which the electrical performances are found almost similar to that of the devices fabricated on the single crystal WS2 domains (Figures 7(c) and (d)). By comparison, Ids is enhanced by one order of magnitude due to the increased current channels. To demonstrate the electrical uniformity of the wafer-scale WS2 monolayer, near 100 devices were measured on the wafer-scale FET array. Partial representative data of the transfer curves are provided in Figure S5. The calculated current ON/OFF ratio is ranging from 10 to 105. Figure 7(h) gives the statistics of the mobility, which are in the


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range of 0.2~4.0 cm2V-1s-1 with the most probable value of about 1.3 cm2V-1s-1. The mobility is relatively smaller compared with that of our single crystal sample, which is ascribed to two main reasons. One is the grain boundaries that could be present in the channel areas of the wafer-scale FET arrays because the channels were defined randomly in the WS2 monolayer. The other is device technique during the fabrication process. Since the device technique for the wafer-scale FET arrays was more complicated, which requires higher stability and uniformity. More defects and damages can also be introduced during the lithography process of large-area FET arrays than those of single device. Although the value is smaller than the reported best result of 18 cm2V-1s-1 from the MOCVD grown WS2,21 it is still one order of magnitude higher than other CVD grown large-scale TMDCs devices reported so far, 36 indicating the better crystalline quality of our samples and further the superior electrical performance for our wafer-scale device arrays.

CONCLUSION


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In summary, we develop a method by combining the CVD and thermal evaporation to grow monolayer WS2 crystals. Critical growth conditions, including growth temperature, source amount, and H2 flow rate were systematically studied to understand the growth mechanism. By controlling the density and the distribution of W precursors, wafer-scale continuous uniform WS2 film was achieved. Structural and spectral characterization results demonstrated a monolayer configuration and a high crystalline quality of the film. FET arrays fabricated on the wafer-scale monolayer WS2 further shows superior electrical performances. The measured maximal mobility of the device arrays is almost one order of magnitude higher than those of large-scale TMDCs devices reported so far. This work provides a reference for a universal growth strategy for large-scale twodimensional layered TMDCs and paves the possibility of the practical application of monolayer WS2.

METHODS

Growth of two-dimensional WS2 crystals: In this work: two-dimensional WS2 crystals were synthesized by the CVD method in a one-temperature zone furnace with a quartz


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tube (6 cm in diameter). Thin WO3 film (Alfa Aesar, 99.9%), as W precursors, was first deposited onto a SiO2/Si (which can be a quartz or a sapphire also) surface through a thermal evaporation before the CVD process. The WO3 film coated SiO2/Si was then loaded into the center of the quartz tube, and another clean SiO2/Si (p-doped Si substrate with 300nm SiO2) substrate was placed face down beyond the WO3 film with a space of about 500 μm. Sufficient S powder (Aladdin, 99.99%) was placed in the edge of the temperature zone, with a distance of about 27 cm from the substrate. A heater band was used to control the temperature of the S powder accurately and separately.

Before the growth, the quartz tube was flushed with high pure Ar (99.999%) gas several times and the background pressure was purged to 4×10-2 Torr with a mechanical pump. Then, the pumping was stop, and Ar gas with a flow rate of 100 sccm was introduced into the tube and maintained during the whole growth process. After the vacuum of the tube recovered to ambient pressure, the furnace was heated to set temperature in 50 min and the S powder was heated to 300 ℃ meanwhile. The temperature of the furnace was held for 30 min, and subsequently, cooled down to room temperature naturally. For


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the growth of large-scale WS2 monolayer, high pure H2 (99.999%) gas mixed with Ar gas was used, and the growth time was increased to 1 h.

Structure and optical properties characterization: Raman and PL were performed using a ×100 objective in Horiba LabRam HR Evolution confocal spectrometer. The wavelength of the excitation laser is 532 nm. The laser beam size is about 1 μm, and an 800 nm step size was applied in mapping to cover the whole scanning region. Thickness of WS2 films were measured using a SPA400-Nanonavi AFM. 37 TEM images including HRTEM and SAED were obtained on a field emission TEM (JEM-2100) operating at an accelerating voltage of 200 kV. Multi-scan digital CCD camera with a resolution of 1024 × 1024 pixels and binning of 1 × 1 was used for the image acquisition. STM image was taken using an ultrahigh vacuum (the pressure is superior to 6×10-11 torr) low-temperature STM system (UNISOKU). The characterization was conducted in constant current mode with a chemically etched tungsten tip at 77 K. 38 For STS measurements, a tunneling current of 0.2 nA was applied and a modulation signal


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of 10 mV peak-to-peak at 957 Hz was added to the dc sample bias to obtain the dI/dV data.

Electrical property measurements of monolayer: WS2 Back gate FETs were directly fabricated on as-grown monolayer WS2 on SiO2/Si substrate. The single designed electrodes pattern was exposed to lithography without a mask, while the FET arrays with interdigital electrodes was patterned by standard photolithography. Ti/Au (5/100 nm) films were deposited on the pattern area as the source and drain electrodes, which consequently defined a transport channel of 15 μm in width and 10 μm in length for the single designed electrodes pattern, and of 15 μm in length, 250 μm in width for each pair of the interdigital electrodes. After lift-off process, all the FETs were directly measured with a semiconductor analyze system (Keithley 4200-SCS) combined with a probe station in atmospheric environment.

AUTHOR INFORMATION

Corresponding Author


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*E-mail: [email protected] *E-mail: [email protected]. *E-mail: [email protected]

Author Contributions The manuscript was written through contributions of all authors. All authors have given approval to the final version of the manuscript.

Notes The authors declare no competing financial interest.

ACKNOWLEDGMENT The authors gratefully acknowledge the National Key Research and Development Program of China (Grant No. 2016YFB0400801), the National Natural Science Foundations of China (Grant Nos. 11604275, 61774128, 61674124, 61704040 and 61874092); the Natural Science Foundation of Fujian Province (Grant Nos. 2018I0017 and 2017J01012) of China, Fundamental Research Funds for the Central Universities (Grant Nos. 20720170012, 20720170085, and 20720170018). This research was also


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supported by Zhejiang Provincial Natural Science Foundation of China under Grant No. LGG19F040003.

ASSOCIATED CONTENT Supporting Information

Supporting Information Available: Conventional CVD setups and as-grown WS2 crystals, characterization of triangle-like WS2 crystal, TEM characterization of the fold WS2 layers, and partial representative data of FET arrays. (PDF)

This material is available free of charge via the Internet at http://pubs.acs.org. ABBREVIATIONS TMDCs, Two-dimensional transition metal dichalcogenides; CVD, chemical vapor deposition; WS2, tungsten disulfide; FET, field effect transistor; PL, photoluminescence; FWHM, full width at half maximum; XPS, X-ray photoelectron spectroscopy; TEM, transmission electron microscopy; SAED, Selected-area electron diffraction; HRTEM, high-resolution TEM; FFT, fast Fourier transform; STM, scanning tunneling microscope; VBM, valence band maximum; CBM, conduction band minimum.


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Figure 1 Schematic illustration of WS2 growth process.


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Figure 2 Optic images of WS2 crystals grown at different temperatures, (a) 800℃, (b) 850℃, (c) 900℃, (d) 950℃, (e) 1000℃ with the WO3 thickness of 5 nm. (f) Normalized PL spectra. (g) FWHM of the PL peaks in (f).


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Figure 3 Optic images of WS2 crystals grown with different WO3 thicknesses, (a) 1 nm, (b) 3 nm, (c) 5nm, (d) 7 nm, (e) 10 nm with the growth temperature of 950 ℃.


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Figure 4 Optic images of WS2 crystals grown at different H2 flow rates, (a) 3 sccm, (b) 5 sccm, (c) 10 sccm with the growth temperature of 950℃ and the WO3 thicknesses of 5 nm. (d) Photograph of wafer-scale monolayer WS2 crystal. (e) Schematic illustration of the effect of H2 on WS2 growth, the blue balls and the gray balls represent the W5+ ions and the H atoms, respectively.


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Figure 5 Morphological and spectroscopic characterizations, (a) AFM image of wafer scale monolayer WS2. (b) XPS spectra of monolayer WS2 crystal. (c) Raman spectra of monolayer WS2 crystal. (d) Raman spectra of different position marked in the inset image. (e) and (f) are the mapping of 𝐸12𝑔 and 𝐴1𝑔 Raman peak. (g) and (h) are the PL mapping of monolayer WS2 crystal and the FWHM of the PL peak, respectively.


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Figure 6 TEM and STM characterizations, (a) TEM image at low magnification, (b) SAED pattern, (c) HRTEM image, and (d) STM image of the wafer-scale monolayer WS2 crystal. (e) STS spectra at three different positions in (d).


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Figure 7 Electrical property characterizations of the triangle-like WS2 and wafer-scale monolayer WS2, (a) Schematic illustration of back gate FET. (b) Optic image of FET based on a single crystal WS2 domain. (c) Transfer curve of the FET in (b). (d) Output characteristics of the FET with different Vg. (e) Photograph of FET arrays based on wafer-scale monolayer WS2 crystal, and the inset is an FET unit. (f) and (g) Transfer curve and output characteristics of the FET unit in (e). (h) A statistical mobility result on the FET arrays.


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Synthesis of Wafer-Scale Monolayer WS2 Crystal Towards the

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